提交 b9dea861 编写于 作者: F Fabio Estevam 提交者: Shawn Guo

ARM: dts: imx7s-warp: Let the codec control MCLK pinctrl

sgtl5000 codec needs MCLK clock to be provided so that it can
successfully read/write via I2C, so we should better let the
codec control the pinctrl for such pin.

Thanks to Stefan Agner who provided the fix on Toradex's tree:
http://git.toradex.com/cgit/linux-toradex.git/commit/?h=toradex_imx_4.1.15_1.0.0_ga-next&id=0a55a7e5f58d46eef0d4d1d357d89e36d0c32fa4Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
上级 e355e0f6
...@@ -199,6 +199,8 @@ ...@@ -199,6 +199,8 @@
reg = <0x0a>; reg = <0x0a>;
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1_mclk>;
VDDA-supply = <&vgen4_reg>; VDDA-supply = <&vgen4_reg>;
VDDIO-supply = <&vgen4_reg>; VDDIO-supply = <&vgen4_reg>;
VDDD-supply = <&vgen2_reg>; VDDD-supply = <&vgen2_reg>;
...@@ -291,7 +293,12 @@ ...@@ -291,7 +293,12 @@
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30 MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f >;
};
pinctrl_sai1_mclk: sai1mclkgrp {
fsl,pins = <
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
>; >;
}; };
......
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