kbuild: remove extra ifdef/endif of top Makefile
The GNU make's origin function know undefined variable well, so the outer ifdef/endif conditional checking is unneeded. From `info make` documentation, origin will return `undefined' if VARIABLE was never defined. `command line' if VARIABLE was defined on the command line. ... Therefore, $(origin V) will get a value anyway, killing ifdef/endif is viable and safe. Furthermore, I've checked the minimal requirements from Documentation/Changes is GNU make 3.79.1, and that version of GNU make has support of origin function well already, so now it's safe to kill the outer conditional checking, without upgrading the minimal requirements. Signed-off-by: NCheng Renquan <crq@kernel.org> Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
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