提交 b2991676 编写于 作者: M Max Filippov 提交者: Wolfram Sang

i2c: ocores: support big-endian register layout

This allows using OpenCores I2C controller attached to its host in
native-endian mode with bi-endian CPUs. Example of such system is Xtensa
XTFPGA platform.
Acked-by: NPeter Korsgaard <peter@korsgaard.com>
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
上级 8a5e3d47
...@@ -92,6 +92,16 @@ static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value) ...@@ -92,6 +92,16 @@ static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value)
iowrite32(value, i2c->base + (reg << i2c->reg_shift)); iowrite32(value, i2c->base + (reg << i2c->reg_shift));
} }
static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u8 value)
{
iowrite16be(value, i2c->base + (reg << i2c->reg_shift));
}
static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u8 value)
{
iowrite32be(value, i2c->base + (reg << i2c->reg_shift));
}
static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg) static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg)
{ {
return ioread8(i2c->base + (reg << i2c->reg_shift)); return ioread8(i2c->base + (reg << i2c->reg_shift));
...@@ -107,6 +117,16 @@ static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg) ...@@ -107,6 +117,16 @@ static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg)
return ioread32(i2c->base + (reg << i2c->reg_shift)); return ioread32(i2c->base + (reg << i2c->reg_shift));
} }
static inline u8 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
{
return ioread16be(i2c->base + (reg << i2c->reg_shift));
}
static inline u8 oc_getreg_32be(struct ocores_i2c *i2c, int reg)
{
return ioread32be(i2c->base + (reg << i2c->reg_shift));
}
static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value) static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
{ {
i2c->setreg(i2c, reg, value); i2c->setreg(i2c, reg, value);
...@@ -428,6 +448,9 @@ static int ocores_i2c_probe(struct platform_device *pdev) ...@@ -428,6 +448,9 @@ static int ocores_i2c_probe(struct platform_device *pdev)
i2c->reg_io_width = 1; /* Set to default value */ i2c->reg_io_width = 1; /* Set to default value */
if (!i2c->setreg || !i2c->getreg) { if (!i2c->setreg || !i2c->getreg) {
bool be = pdata ? pdata->big_endian :
of_device_is_big_endian(pdev->dev.of_node);
switch (i2c->reg_io_width) { switch (i2c->reg_io_width) {
case 1: case 1:
i2c->setreg = oc_setreg_8; i2c->setreg = oc_setreg_8;
...@@ -435,13 +458,13 @@ static int ocores_i2c_probe(struct platform_device *pdev) ...@@ -435,13 +458,13 @@ static int ocores_i2c_probe(struct platform_device *pdev)
break; break;
case 2: case 2:
i2c->setreg = oc_setreg_16; i2c->setreg = be ? oc_setreg_16be : oc_setreg_16;
i2c->getreg = oc_getreg_16; i2c->getreg = be ? oc_getreg_16be : oc_getreg_16;
break; break;
case 4: case 4:
i2c->setreg = oc_setreg_32; i2c->setreg = be ? oc_setreg_32be : oc_setreg_32;
i2c->getreg = oc_getreg_32; i2c->getreg = be ? oc_getreg_32be : oc_getreg_32;
break; break;
default: default:
......
...@@ -15,6 +15,7 @@ struct ocores_i2c_platform_data { ...@@ -15,6 +15,7 @@ struct ocores_i2c_platform_data {
u32 reg_shift; /* register offset shift value */ u32 reg_shift; /* register offset shift value */
u32 reg_io_width; /* register io read/write width */ u32 reg_io_width; /* register io read/write width */
u32 clock_khz; /* input clock in kHz */ u32 clock_khz; /* input clock in kHz */
bool big_endian; /* registers are big endian */
u8 num_devices; /* number of devices in the devices list */ u8 num_devices; /* number of devices in the devices list */
struct i2c_board_info const *devices; /* devices connected to the bus */ struct i2c_board_info const *devices; /* devices connected to the bus */
}; };
......
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