提交 b1721d0d 编写于 作者: H Harvey Harrison 提交者: Linus Torvalds

v4l/dvb: add statics to avoid multiple definitions

Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 bc84e0a1
...@@ -299,7 +299,7 @@ static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap) ...@@ -299,7 +299,7 @@ static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
} }
/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */ /* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
struct dibx000_agc_config xc3028_agc_config = { static struct dibx000_agc_config xc3028_agc_config = {
BAND_VHF | BAND_UHF, /* band_caps */ BAND_VHF | BAND_UHF, /* band_caps */
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
...@@ -342,7 +342,7 @@ struct dibx000_agc_config xc3028_agc_config = { ...@@ -342,7 +342,7 @@ struct dibx000_agc_config xc3028_agc_config = {
}; };
/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */ /* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
struct dibx000_bandwidth_config xc3028_bw_config = { static struct dibx000_bandwidth_config xc3028_bw_config = {
60000, 30000, /* internal, sampling */ 60000, 30000, /* internal, sampling */
1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */ 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */
0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc, 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, ADClkSrc,
......
...@@ -191,7 +191,7 @@ static struct tda18271_config hauppauge_hvr1200_tuner_config = { ...@@ -191,7 +191,7 @@ static struct tda18271_config hauppauge_hvr1200_tuner_config = {
.gate = TDA18271_GATE_ANALOG, .gate = TDA18271_GATE_ANALOG,
}; };
struct dibx000_agc_config xc3028_agc_config = { static struct dibx000_agc_config xc3028_agc_config = {
BAND_VHF | BAND_UHF, /* band_caps */ BAND_VHF | BAND_UHF, /* band_caps */
/* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
...@@ -237,7 +237,7 @@ struct dibx000_agc_config xc3028_agc_config = { ...@@ -237,7 +237,7 @@ struct dibx000_agc_config xc3028_agc_config = {
/* PLL Configuration for COFDM BW_MHz = 8.000000 /* PLL Configuration for COFDM BW_MHz = 8.000000
* With external clock = 30.000000 */ * With external clock = 30.000000 */
struct dibx000_bandwidth_config xc3028_bw_config = { static struct dibx000_bandwidth_config xc3028_bw_config = {
60000, /* internal */ 60000, /* internal */
30000, /* sampling */ 30000, /* sampling */
1, /* pll_cfg: prediv */ 1, /* pll_cfg: prediv */
......
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