提交 adba9e23 编写于 作者: S Stephen Hemminger 提交者: Jeff Garzik

[PATCH] skge: clear PCI PHY COMA mode on boot

When skge is booted up, the PHY may be stuck in power down state
by the previous OS. So we may need to turn it on.
Signed-off-by: NStephen Hemminger <shemminger@osdl.org>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
上级 3133c5e8
...@@ -2893,6 +2893,7 @@ static const char *skge_board_name(const struct skge_hw *hw) ...@@ -2893,6 +2893,7 @@ static const char *skge_board_name(const struct skge_hw *hw)
*/ */
static int skge_reset(struct skge_hw *hw) static int skge_reset(struct skge_hw *hw)
{ {
u32 reg;
u16 ctst; u16 ctst;
u8 t8, mac_cfg, pmd_type, phy_type; u8 t8, mac_cfg, pmd_type, phy_type;
int i; int i;
...@@ -2971,6 +2972,7 @@ static int skge_reset(struct skge_hw *hw) ...@@ -2971,6 +2972,7 @@ static int skge_reset(struct skge_hw *hw)
/* switch power to VCC (WA for VAUX problem) */ /* switch power to VCC (WA for VAUX problem) */
skge_write8(hw, B0_POWER_CTRL, skge_write8(hw, B0_POWER_CTRL,
PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
/* avoid boards with stuck Hardware error bits */ /* avoid boards with stuck Hardware error bits */
if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) && if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) &&
(skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) { (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) {
...@@ -2978,6 +2980,14 @@ static int skge_reset(struct skge_hw *hw) ...@@ -2978,6 +2980,14 @@ static int skge_reset(struct skge_hw *hw)
hw->intr_mask &= ~IS_HW_ERR; hw->intr_mask &= ~IS_HW_ERR;
} }
/* Clear PHY COMA */
skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg);
reg &= ~PCI_PHY_COMA;
pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg);
skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
for (i = 0; i < hw->ports; i++) { for (i = 0; i < hw->ports; i++) {
skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
......
...@@ -6,6 +6,8 @@ ...@@ -6,6 +6,8 @@
/* PCI config registers */ /* PCI config registers */
#define PCI_DEV_REG1 0x40 #define PCI_DEV_REG1 0x40
#define PCI_PHY_COMA 0x8000000
#define PCI_VIO 0x2000000
#define PCI_DEV_REG2 0x44 #define PCI_DEV_REG2 0x44
#define PCI_REV_DESC 0x4 #define PCI_REV_DESC 0x4
......
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