提交 a5d3598d 编写于 作者: R Rafał Miłecki 提交者: John W. Linville

b43: N-PHY: fix some typos, conditions, set gain_boost

Signed-off-by: NRafał Miłecki <zajec5@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 c0f05b98
......@@ -919,15 +919,15 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
B43_NPHY_C2_CGAINI_CL2DETECT);
/* Set narrowband clip threshold */
b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
if (!dev->phy.is_40mhz) {
/* Set dwell lengths */
b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
}
/* Set wideband clip 2 threshold */
......@@ -949,7 +949,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
}
b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
if (nphy->gain_boost) {
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
......@@ -970,10 +970,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x7C));
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x7C));
/* specs say about 2 loops, but wl does 4 */
for (i = 0; i < 4; i++)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x7C));
b43_nphy_adjust_lna_gain_table(dev);
......@@ -991,10 +991,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x74));
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x74));
/* specs say about 2 loops, but wl does 4 */
for (i = 0; i < 4; i++)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x74));
}
if (dev->phy.rev == 2) {
......@@ -1034,7 +1034,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
b43_nphy_classifier(dev, 1, 0);
else
b43_nphy_classifier(dev, 1, 1);
......@@ -3459,7 +3459,8 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
memset(nphy, 0, sizeof(*nphy));
//TODO init struct b43_phy_n
/* wl goes path which is executed for gain_boost, assume it is true */
nphy->gain_boost = true;
}
static void b43_nphy_op_free(struct b43_wldev *dev)
......
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