提交 a38b0ba1 编写于 作者: K Kan Liang 提交者: Ingo Molnar

perf/x86/intel: Support Extended PEBS for Goldmont Plus

Enable the extended PEBS for Goldmont Plus.

There is no specific PEBS constrains for Goldmont Plus. Removing the
pebs_constraints for Goldmont Plus.
Signed-off-by: NKan Liang <kan.liang@linux.intel.com>
Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/20180309021542.11374-4-kan.liang@linux.intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
上级 ec71a398
...@@ -4077,7 +4077,6 @@ __init int intel_pmu_init(void) ...@@ -4077,7 +4077,6 @@ __init int intel_pmu_init(void)
intel_pmu_lbr_init_skl(); intel_pmu_lbr_init_skl();
x86_pmu.event_constraints = intel_slm_event_constraints; x86_pmu.event_constraints = intel_slm_event_constraints;
x86_pmu.pebs_constraints = intel_glp_pebs_event_constraints;
x86_pmu.extra_regs = intel_glm_extra_regs; x86_pmu.extra_regs = intel_glm_extra_regs;
/* /*
* It's recommended to use CPU_CLK_UNHALTED.CORE_P + NPEBS * It's recommended to use CPU_CLK_UNHALTED.CORE_P + NPEBS
...@@ -4087,6 +4086,7 @@ __init int intel_pmu_init(void) ...@@ -4087,6 +4086,7 @@ __init int intel_pmu_init(void)
x86_pmu.pebs_prec_dist = true; x86_pmu.pebs_prec_dist = true;
x86_pmu.lbr_pt_coexist = true; x86_pmu.lbr_pt_coexist = true;
x86_pmu.flags |= PMU_FL_HAS_RSP_1; x86_pmu.flags |= PMU_FL_HAS_RSP_1;
x86_pmu.flags |= PMU_FL_PEBS_ALL;
x86_pmu.get_event_constraints = glp_get_event_constraints; x86_pmu.get_event_constraints = glp_get_event_constraints;
x86_pmu.cpu_events = glm_events_attrs; x86_pmu.cpu_events = glm_events_attrs;
/* Goldmont Plus has 4-wide pipeline */ /* Goldmont Plus has 4-wide pipeline */
......
...@@ -713,12 +713,6 @@ struct event_constraint intel_glm_pebs_event_constraints[] = { ...@@ -713,12 +713,6 @@ struct event_constraint intel_glm_pebs_event_constraints[] = {
EVENT_CONSTRAINT_END EVENT_CONSTRAINT_END
}; };
struct event_constraint intel_glp_pebs_event_constraints[] = {
/* Allow all events as PEBS with no flags */
INTEL_ALL_EVENT_CONSTRAINT(0, 0xf),
EVENT_CONSTRAINT_END
};
struct event_constraint intel_nehalem_pebs_event_constraints[] = { struct event_constraint intel_nehalem_pebs_event_constraints[] = {
INTEL_PLD_CONSTRAINT(0x100b, 0xf), /* MEM_INST_RETIRED.* */ INTEL_PLD_CONSTRAINT(0x100b, 0xf), /* MEM_INST_RETIRED.* */
INTEL_FLAGS_EVENT_CONSTRAINT(0x0f, 0xf), /* MEM_UNCORE_RETIRED.* */ INTEL_FLAGS_EVENT_CONSTRAINT(0x0f, 0xf), /* MEM_UNCORE_RETIRED.* */
......
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