scsi: aacraid: Insure we don't access PCIe space during AER/EEH
[ Upstream commit b6554cfe09e1f610aed7d57164ab7760be57acd9 ] There are a few windows during AER/EEH when we can access PCIe I/O mapped registers. This will harden the access to insure we do not allow PCIe access during errors Signed-off-by: NDave Carroll <david.carroll@microsemi.com> Reviewed-by: NSagar Biradar <sagar.biradar@microchip.com> Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com> Signed-off-by: NSasha Levin (Microsoft) <sashal@kernel.org>
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