tools/power/x86/intel-speed-select: Display TRL buckets for just base config level

task #29499913

commit 1434a3d357d656d4b11fcbdc9b6c35dc673292a0 upstream

When only base config level is present, this tool is displaying TRL
(Turbo-ratio-limits) by reading legacy MSR. In this case, also present
core count for TRL by reading MSR 0x1AE.
Signed-off-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NErwei Deng <erwei@linux.alibaba.com>
Reviewed-by: NArtie Ding <artie.ding@linux.alibaba.com>

tools/power/x86/intel-speed-select/isst-core.c

@@ -681,6 +681,7 @@ int isst_get_process_ctdp(int cpu, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
 			}
 
 			isst_get_get_trl_from_msr(cpu, ctdp_level->trl_sse_active_cores);
+			isst_get_trl_bucket_info(cpu, &ctdp_level->buckets_info);
 			continue;
 		}