提交 98d8df63 编写于 作者: J Jason Cooper

Merge tag 'marvell-xor-board-dt-changes-3.8-v2' of...

Merge tag 'marvell-xor-board-dt-changes-3.8-v2' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything

Marvell XOR driver DT changes for 3.8

Conflicts:
	arch/arm/boot/dts/armada-xp.dtsi
...@@ -89,6 +89,42 @@ ...@@ -89,6 +89,42 @@
#clock-cells = <1>; #clock-cells = <1>;
}; };
xor@d0060800 {
compatible = "marvell,orion-xor";
reg = <0xd0060800 0x100
0xd0060A00 0x100>;
status = "okay";
xor00 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
xor@d0060900 {
compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100
0xd0060b00 0x100>;
status = "okay";
xor10 {
interrupts = <94>;
dmacap,memcpy;
dmacap,xor;
};
xor11 {
interrupts = <95>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
}; };
}; };
...@@ -87,5 +87,45 @@ ...@@ -87,5 +87,45 @@
clocks = <&gateclk 1>; clocks = <&gateclk 1>;
status = "disabled"; status = "disabled";
}; };
xor@d0060900 {
compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100
0xd0060b00 0x100>;
clocks = <&gateclk 22>;
status = "okay";
xor10 {
interrupts = <51>;
dmacap,memcpy;
dmacap,xor;
};
xor11 {
interrupts = <52>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
xor@d00f0900 {
compatible = "marvell,orion-xor";
reg = <0xd00F0900 0x100
0xd00F0B00 0x100>;
clocks = <&gateclk 28>;
status = "okay";
xor00 {
interrupts = <94>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <95>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
}; };
}; };
...@@ -174,5 +174,47 @@ ...@@ -174,5 +174,47 @@
clocks = <&gate_clk 15>; clocks = <&gate_clk 15>;
status = "okay"; status = "okay";
}; };
xor0: dma-engine@60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60a00 0x100>;
clocks = <&gate_clk 23>;
status = "okay";
channel0 {
interrupts = <39>;
dmacap,memcpy;
dmacap,xor;
};
channel1 {
interrupts = <40>;
dmacap,memset;
dmacap,memcpy;
dmacap,xor;
};
};
xor1: dma-engine@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0x60b00 0x100>;
clocks = <&gate_clk 24>;
status = "okay";
channel0 {
interrupts = <42>;
dmacap,memcpy;
dmacap,xor;
};
channel1 {
interrupts = <43>;
dmacap,memset;
dmacap,memcpy;
dmacap,xor;
};
};
}; };
}; };
...@@ -94,6 +94,46 @@ ...@@ -94,6 +94,46 @@
status = "okay"; status = "okay";
}; };
xor@60800 {
compatible = "marvell,orion-xor";
reg = <0x60800 0x100
0x60A00 0x100>;
status = "okay";
clocks = <&gate_clk 8>;
xor00 {
interrupts = <5>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <6>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
0xd0B00 0x100>;
status = "okay";
clocks = <&gate_clk 16>;
xor00 {
interrupts = <7>;
dmacap,memcpy;
dmacap,xor;
};
xor01 {
interrupts = <8>;
dmacap,memcpy;
dmacap,xor;
dmacap,memset;
};
};
sata@80000 { sata@80000 {
compatible = "marvell,orion-sata"; compatible = "marvell,orion-sata";
reg = <0x80000 0x5000>; reg = <0x80000 0x5000>;
......
...@@ -409,14 +409,6 @@ static void __init dove_legacy_clk_init(void) ...@@ -409,14 +409,6 @@ static void __init dove_legacy_clk_init(void)
clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
orion_clkdev_add("1", "pcie", orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec)); of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_XOR0;
orion_clkdev_add(NULL, MV_XOR_NAME ".0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_XOR1;
orion_clkdev_add(NULL, MV_XOR_NAME ".1",
of_clk_get_from_provider(&clkspec));
} }
static void __init dove_of_clk_init(void) static void __init dove_of_clk_init(void)
...@@ -444,8 +436,6 @@ static void __init dove_dt_init(void) ...@@ -444,8 +436,6 @@ static void __init dove_dt_init(void)
/* Internal devices not ported to DT yet */ /* Internal devices not ported to DT yet */
dove_rtc_init(); dove_rtc_init();
dove_xor0_init();
dove_xor1_init();
dove_ge00_init(&dove_dt_ge00_data); dove_ge00_init(&dove_dt_ge00_data);
dove_ehci0_init(); dove_ehci0_init();
......
...@@ -21,7 +21,6 @@ ...@@ -21,7 +21,6 @@
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/bridge-regs.h> #include <mach/bridge-regs.h>
#include <linux/platform_data/usb-ehci-orion.h> #include <linux/platform_data/usb-ehci-orion.h>
#include <linux/platform_data/dma-mv_xor.h>
#include <plat/irq.h> #include <plat/irq.h>
#include <plat/common.h> #include <plat/common.h>
#include "common.h" #include "common.h"
...@@ -60,14 +59,6 @@ static void __init kirkwood_legacy_clk_init(void) ...@@ -60,14 +59,6 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add(NULL, "orion-ehci.0", orion_clkdev_add(NULL, "orion-ehci.0",
of_clk_get_from_provider(&clkspec)); of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_XOR0;
orion_clkdev_add(NULL, MV_XOR_NAME ".0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_XOR1;
orion_clkdev_add(NULL, MV_XOR_NAME ".1",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_PEX1; clkspec.args[0] = CGC_BIT_PEX1;
orion_clkdev_add("1", "pcie", orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec)); of_clk_get_from_provider(&clkspec));
...@@ -103,10 +94,6 @@ static void __init kirkwood_dt_init(void) ...@@ -103,10 +94,6 @@ static void __init kirkwood_dt_init(void)
/* Setup root of clk tree */ /* Setup root of clk tree */
kirkwood_of_clk_init(); kirkwood_of_clk_init();
/* internal devices that every board has */
kirkwood_xor0_init();
kirkwood_xor1_init();
#ifdef CONFIG_KEXEC #ifdef CONFIG_KEXEC
kexec_reinit = kirkwood_enable_pcie; kexec_reinit = kirkwood_enable_pcie;
#endif #endif
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册