提交 987240cc 编写于 作者: B Ben Dooks 提交者: Russell King

[ARM] 4586/1: S3C2412: power register updates

Add the INFORM register block which are retained
over sleep.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 180005c4
...@@ -18,6 +18,11 @@ ...@@ -18,6 +18,11 @@
#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
#define S3C2412_PWRCFG_BATF_IGNORE (0<<0) #define S3C2412_PWRCFG_BATF_IGNORE (0<<0)
#define S3C2412_PWRCFG_BATF_SLEEP (3<<0) #define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
#define S3C2412_PWRCFG_BATF_MASK (3<<0) #define S3C2412_PWRCFG_BATF_MASK (3<<0)
......
...@@ -17,5 +17,7 @@ ...@@ -17,5 +17,7 @@
#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) #define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
#define S3C2412_SWRST_RESET (0x533C2412) #define S3C2412_SWRST_RESET (0x533C2412)
/* see regs-power.h for the other registers in the power block. */
#endif /* __ASM_ARCH_REGS_S3C2412_H */ #endif /* __ASM_ARCH_REGS_S3C2412_H */
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