提交 9836c985 编写于 作者: Z Zhang Rui 提交者: Joseph Qi

ICX: intel_rapl: abstract register address

commit 7fde2712a7adab721eaabafbd8ff93dff3262d35 upstream.

MSR and MMIO RAPL interface have different sets of registers, thus the
RAPL register address should be obtained from interface specific
structure, i.e. struct rapl_if_private, instead.
Reviewed-by: NPandruvada, Srinivas <srinivas.pandruvada@intel.com>
Tested-by: NPandruvada, Srinivas <srinivas.pandruvada@intel.com>
Signed-off-by: NZhang Rui <rui.zhang@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: NYouquan Song <youquan.song@intel.com>
Signed-off-by: NJeffle Xu <jefflexu@linux.alibaba.com>
Acked-by: NJoseph Qi <joseph.qi@linux.alibaba.com>
Acked-by: NCaspar Zhang <caspar@linux.alibaba.com>
上级 dc9e7782
...@@ -88,7 +88,19 @@ enum unit_type { ...@@ -88,7 +88,19 @@ enum unit_type {
}; };
/* private data for RAPL MSR Interface */ /* private data for RAPL MSR Interface */
static struct rapl_if_priv rapl_msr_priv; static struct rapl_if_priv rapl_msr_priv = {
.reg_unit = MSR_RAPL_POWER_UNIT,
.regs[RAPL_DOMAIN_PACKAGE] = {
MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
.regs[RAPL_DOMAIN_PP0] = {
MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
.regs[RAPL_DOMAIN_PP1] = {
MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
.regs[RAPL_DOMAIN_DRAM] = {
MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
.regs[RAPL_DOMAIN_PLATFORM] = {
MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
};
/* per domain data, some are optional */ /* per domain data, some are optional */
#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2) #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
...@@ -553,15 +565,17 @@ static void rapl_init_domains(struct rapl_package *rp) ...@@ -553,15 +565,17 @@ static void rapl_init_domains(struct rapl_package *rp)
for (i = 0; i < RAPL_DOMAIN_MAX; i++) { for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
unsigned int mask = rp->domain_map & (1 << i); unsigned int mask = rp->domain_map & (1 << i);
rd->regs[RAPL_DOMAIN_REG_LIMIT] = rp->priv->regs[i][RAPL_DOMAIN_REG_LIMIT];
rd->regs[RAPL_DOMAIN_REG_STATUS] = rp->priv->regs[i][RAPL_DOMAIN_REG_STATUS];
rd->regs[RAPL_DOMAIN_REG_PERF] = rp->priv->regs[i][RAPL_DOMAIN_REG_PERF];
rd->regs[RAPL_DOMAIN_REG_POLICY] = rp->priv->regs[i][RAPL_DOMAIN_REG_POLICY];
rd->regs[RAPL_DOMAIN_REG_INFO] = rp->priv->regs[i][RAPL_DOMAIN_REG_INFO];
switch (mask) { switch (mask) {
case BIT(RAPL_DOMAIN_PACKAGE): case BIT(RAPL_DOMAIN_PACKAGE):
rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE]; rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE];
rd->id = RAPL_DOMAIN_PACKAGE; rd->id = RAPL_DOMAIN_PACKAGE;
rd->regs[RAPL_DOMAIN_REG_LIMIT] = MSR_PKG_POWER_LIMIT;
rd->regs[RAPL_DOMAIN_REG_STATUS] = MSR_PKG_ENERGY_STATUS;
rd->regs[RAPL_DOMAIN_REG_PERF] = MSR_PKG_PERF_STATUS;
rd->regs[RAPL_DOMAIN_REG_POLICY] = 0;
rd->regs[RAPL_DOMAIN_REG_INFO] = MSR_PKG_POWER_INFO;
rd->rpl[0].prim_id = PL1_ENABLE; rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name; rd->rpl[0].name = pl1_name;
rd->rpl[1].prim_id = PL2_ENABLE; rd->rpl[1].prim_id = PL2_ENABLE;
...@@ -570,33 +584,18 @@ static void rapl_init_domains(struct rapl_package *rp) ...@@ -570,33 +584,18 @@ static void rapl_init_domains(struct rapl_package *rp)
case BIT(RAPL_DOMAIN_PP0): case BIT(RAPL_DOMAIN_PP0):
rd->name = rapl_domain_names[RAPL_DOMAIN_PP0]; rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
rd->id = RAPL_DOMAIN_PP0; rd->id = RAPL_DOMAIN_PP0;
rd->regs[RAPL_DOMAIN_REG_LIMIT] = MSR_PP0_POWER_LIMIT;
rd->regs[RAPL_DOMAIN_REG_STATUS] = MSR_PP0_ENERGY_STATUS;
rd->regs[RAPL_DOMAIN_REG_PERF] = 0;
rd->regs[RAPL_DOMAIN_REG_POLICY] = MSR_PP0_POLICY;
rd->regs[RAPL_DOMAIN_REG_INFO] = 0;
rd->rpl[0].prim_id = PL1_ENABLE; rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name; rd->rpl[0].name = pl1_name;
break; break;
case BIT(RAPL_DOMAIN_PP1): case BIT(RAPL_DOMAIN_PP1):
rd->name = rapl_domain_names[RAPL_DOMAIN_PP1]; rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
rd->id = RAPL_DOMAIN_PP1; rd->id = RAPL_DOMAIN_PP1;
rd->regs[RAPL_DOMAIN_REG_LIMIT] = MSR_PP1_POWER_LIMIT;
rd->regs[RAPL_DOMAIN_REG_STATUS] = MSR_PP1_ENERGY_STATUS;
rd->regs[RAPL_DOMAIN_REG_PERF] = 0;
rd->regs[RAPL_DOMAIN_REG_POLICY] = MSR_PP1_POLICY;
rd->regs[RAPL_DOMAIN_REG_INFO] = 0;
rd->rpl[0].prim_id = PL1_ENABLE; rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name; rd->rpl[0].name = pl1_name;
break; break;
case BIT(RAPL_DOMAIN_DRAM): case BIT(RAPL_DOMAIN_DRAM):
rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM]; rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
rd->id = RAPL_DOMAIN_DRAM; rd->id = RAPL_DOMAIN_DRAM;
rd->regs[RAPL_DOMAIN_REG_LIMIT] = MSR_DRAM_POWER_LIMIT;
rd->regs[RAPL_DOMAIN_REG_STATUS] = MSR_DRAM_ENERGY_STATUS;
rd->regs[RAPL_DOMAIN_REG_PERF] = MSR_DRAM_PERF_STATUS;
rd->regs[RAPL_DOMAIN_REG_POLICY] = 0;
rd->regs[RAPL_DOMAIN_REG_INFO] = MSR_DRAM_POWER_INFO;
rd->rpl[0].prim_id = PL1_ENABLE; rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name; rd->rpl[0].name = pl1_name;
rd->domain_energy_unit = rd->domain_energy_unit =
...@@ -818,9 +817,9 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu) ...@@ -818,9 +817,9 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
u64 msr_val; u64 msr_val;
u32 value; u32 value;
if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) {
pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
MSR_RAPL_POWER_UNIT, cpu); rp->priv->reg_unit, cpu);
return -ENODEV; return -ENODEV;
} }
...@@ -844,9 +843,9 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu) ...@@ -844,9 +843,9 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
u64 msr_val; u64 msr_val;
u32 value; u32 value;
if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) { if (rdmsrl_safe_on_cpu(cpu, rp->priv->reg_unit, &msr_val)) {
pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n", pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
MSR_RAPL_POWER_UNIT, cpu); rp->priv->reg_unit, cpu);
return -ENODEV; return -ENODEV;
} }
value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
...@@ -1190,10 +1189,10 @@ static int __init rapl_register_psys(void) ...@@ -1190,10 +1189,10 @@ static int __init rapl_register_psys(void)
struct powercap_zone *power_zone; struct powercap_zone *power_zone;
u64 val; u64 val;
if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_ENERGY_STATUS, &val) || !val) if (rdmsrl_safe_on_cpu(0, rapl_msr_priv.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS], &val) || !val)
return -ENODEV; return -ENODEV;
if (rdmsrl_safe_on_cpu(0, MSR_PLATFORM_POWER_LIMIT, &val) || !val) if (rdmsrl_safe_on_cpu(0, rapl_msr_priv.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT], &val) || !val)
return -ENODEV; return -ENODEV;
rd = kzalloc(sizeof(*rd), GFP_KERNEL); rd = kzalloc(sizeof(*rd), GFP_KERNEL);
...@@ -1202,8 +1201,8 @@ static int __init rapl_register_psys(void) ...@@ -1202,8 +1201,8 @@ static int __init rapl_register_psys(void)
rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM]; rd->name = rapl_domain_names[RAPL_DOMAIN_PLATFORM];
rd->id = RAPL_DOMAIN_PLATFORM; rd->id = RAPL_DOMAIN_PLATFORM;
rd->regs[RAPL_DOMAIN_REG_LIMIT] = MSR_PLATFORM_POWER_LIMIT; rd->regs[RAPL_DOMAIN_REG_LIMIT] = rapl_msr_priv.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT];
rd->regs[RAPL_DOMAIN_REG_STATUS] = MSR_PLATFORM_ENERGY_STATUS; rd->regs[RAPL_DOMAIN_REG_STATUS] = rapl_msr_priv.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS];
rd->rpl[0].prim_id = PL1_ENABLE; rd->rpl[0].prim_id = PL1_ENABLE;
rd->rpl[0].name = pl1_name; rd->rpl[0].name = pl1_name;
rd->rpl[1].prim_id = PL2_ENABLE; rd->rpl[1].prim_id = PL2_ENABLE;
...@@ -1235,23 +1234,17 @@ static int __init rapl_register_powercap(void) ...@@ -1235,23 +1234,17 @@ static int __init rapl_register_powercap(void)
return 0; return 0;
} }
static int rapl_check_domain(int cpu, int domain) static int rapl_check_domain(int cpu, int domain, struct rapl_package *rp)
{ {
unsigned msr; u32 reg;
u64 val = 0; u64 val = 0;
switch (domain) { switch (domain) {
case RAPL_DOMAIN_PACKAGE: case RAPL_DOMAIN_PACKAGE:
msr = MSR_PKG_ENERGY_STATUS;
break;
case RAPL_DOMAIN_PP0: case RAPL_DOMAIN_PP0:
msr = MSR_PP0_ENERGY_STATUS;
break;
case RAPL_DOMAIN_PP1: case RAPL_DOMAIN_PP1:
msr = MSR_PP1_ENERGY_STATUS;
break;
case RAPL_DOMAIN_DRAM: case RAPL_DOMAIN_DRAM:
msr = MSR_DRAM_ENERGY_STATUS; reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS];
break; break;
case RAPL_DOMAIN_PLATFORM: case RAPL_DOMAIN_PLATFORM:
/* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */ /* PSYS(PLATFORM) is not a CPU domain, so avoid printng error */
...@@ -1263,7 +1256,7 @@ static int rapl_check_domain(int cpu, int domain) ...@@ -1263,7 +1256,7 @@ static int rapl_check_domain(int cpu, int domain)
/* make sure domain counters are available and contains non-zero /* make sure domain counters are available and contains non-zero
* values, otherwise skip it. * values, otherwise skip it.
*/ */
if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val) if (rdmsrl_safe_on_cpu(cpu, reg, &val) || !val)
return -ENODEV; return -ENODEV;
return 0; return 0;
...@@ -1310,7 +1303,7 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu) ...@@ -1310,7 +1303,7 @@ static int rapl_detect_domains(struct rapl_package *rp, int cpu)
for (i = 0; i < RAPL_DOMAIN_MAX; i++) { for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
/* use physical package id to read counters */ /* use physical package id to read counters */
if (!rapl_check_domain(cpu, i)) { if (!rapl_check_domain(cpu, i, rp)) {
rp->domain_map |= 1 << i; rp->domain_map |= 1 << i;
pr_info("Found RAPL domain %s\n", rapl_domain_names[i]); pr_info("Found RAPL domain %s\n", rapl_domain_names[i]);
} }
......
...@@ -95,11 +95,15 @@ struct rapl_domain { ...@@ -95,11 +95,15 @@ struct rapl_domain {
* @platform_rapl_domain: Optional. Some RAPL interface may have platform * @platform_rapl_domain: Optional. Some RAPL interface may have platform
* level RAPL control. * level RAPL control.
* @pcap_rapl_online: CPU hotplug state for each RAPL interface. * @pcap_rapl_online: CPU hotplug state for each RAPL interface.
* @reg_unit: Register for getting energy/power/time unit.
* @regs: Register sets for different RAPL Domains.
*/ */
struct rapl_if_priv { struct rapl_if_priv {
struct powercap_control_type *control_type; struct powercap_control_type *control_type;
struct rapl_domain *platform_rapl_domain; struct rapl_domain *platform_rapl_domain;
enum cpuhp_state pcap_rapl_online; enum cpuhp_state pcap_rapl_online;
u32 reg_unit;
u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
}; };
/* maximum rapl package domain name: package-%d-die-%d */ /* maximum rapl package domain name: package-%d-die-%d */
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册