提交 97c67b65 编写于 作者: T Takashi Iwai 提交者: Jaroslav Kysela

[ALSA] au88x0 - 64bit arch fixes

Modules: au88x0 driver

Fix the driver codes to run on 64bit architectures.
The patch taken from ALSA BTS bug#1047.
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
上级 7a6c8ff1
......@@ -151,14 +151,18 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
// check PCI availability (DMA).
if ((err = pci_enable_device(pci)) < 0)
return err;
if (pci_set_dma_mask(pci, DMA_32BIT_MASK)) {
if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
printk(KERN_ERR "error to set DMA mask\n");
pci_disable_device(pci);
return -ENXIO;
}
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (chip == NULL)
if (chip == NULL) {
pci_disable_device(pci);
return -ENOMEM;
}
chip->card = card;
......@@ -208,6 +212,8 @@ snd_vortex_create(struct snd_card *card, struct pci_dev *pci, vortex_t ** rchip)
goto alloc_out;
}
snd_card_set_dev(card, &pci->dev);
*rchip = chip;
return 0;
......
......@@ -39,8 +39,8 @@
#include "au88x0_wt.h"
#endif
#define hwread(x,y) readl((x)+((y)>>2))
#define hwwrite(x,y,z) writel((z),(x)+((y)>>2))
#define hwread(x,y) readl((x)+(y))
#define hwwrite(x,y,z) writel((z),(x)+(y))
/* Vortex MPU401 defines. */
#define MIDI_CLOCK_DIV 0x61
......@@ -113,7 +113,7 @@ typedef struct {
//int this_08; /* Still unknown */
int fifo_enabled; /* this_24 */
int fifo_status; /* this_1c */
int dma_ctrl; /* this_78 (ADB), this_7c (WT) */
u32 dma_ctrl; /* this_78 (ADB), this_7c (WT) */
int dma_unknown; /* this_74 (ADB), this_78 (WT). WDM: +8 */
int cfg0;
int cfg1;
......@@ -178,7 +178,7 @@ struct snd_vortex {
/* PCI hardware resources */
unsigned long io;
unsigned long __iomem *mmio;
void __iomem *mmio;
unsigned int irq;
spinlock_t lock;
......@@ -201,14 +201,14 @@ static void vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
int count);
static void vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie,
int dir, int fmt, int d,
unsigned long offset);
u32 offset);
static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb);
#ifndef CHIP_AU8810
static void vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
struct snd_sg_buf * sgbuf, int size,
int count);
static void vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d, /*int e, */
unsigned long offset);
u32 offset);
static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb);
#endif
......
......@@ -376,7 +376,7 @@ vortex_mixer_delWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
static void vortex_mixer_init(vortex_t * vortex)
{
unsigned long addr;
u32 addr;
int x;
// FIXME: get rid of this crap.
......@@ -639,7 +639,7 @@ static void vortex_src_setupchannel(vortex_t * card, unsigned char src,
static void vortex_srcblock_init(vortex_t * vortex)
{
unsigned long addr;
u32 addr;
int x;
hwwrite(vortex->mmio, VORTEX_SRC_SOURCESIZE, 0x1ff);
/*
......@@ -1035,7 +1035,7 @@ vortex_fifo_setwtctrl(vortex_t * vortex, int fifo, int ctrl, int priority,
static void vortex_fifo_init(vortex_t * vortex)
{
int x;
unsigned long addr;
u32 addr;
/* ADB DMA channels fifos. */
addr = VORTEX_FIFO_ADBCTRL + ((NR_ADB - 1) * 4);
......@@ -1054,7 +1054,7 @@ static void vortex_fifo_init(vortex_t * vortex)
hwwrite(vortex->mmio, addr, FIFO_U0);
if (hwread(vortex->mmio, addr) != FIFO_U0)
printk(KERN_ERR
"bad wt fifo reset (0x%08lx, 0x%08x)!\n",
"bad wt fifo reset (0x%08x, 0x%08x)!\n",
addr, hwread(vortex->mmio, addr));
vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE);
addr -= 4;
......@@ -1152,7 +1152,7 @@ vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
static void
vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie, int dir,
int fmt, int d, unsigned long offset)
int fmt, int d, u32 offset)
{
stream_t *dma = &vortex->dma_adb[adbdma];
......@@ -1411,7 +1411,7 @@ vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
static void
vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d,
/*int e, */ unsigned long offset)
/*int e, */ u32 offset)
{
stream_t *dma = &vortex->dma_wt[wtdma];
......
......@@ -377,23 +377,23 @@ static void vortex_EqHw_GetLevels(vortex_t * vortex, u16 a[])
#endif
/* Global Control */
static void vortex_EqHw_SetControlReg(vortex_t * vortex, unsigned long reg)
static void vortex_EqHw_SetControlReg(vortex_t * vortex, u32 reg)
{
hwwrite(vortex->mmio, 0x2b440, reg);
}
static void vortex_EqHw_SetSampleRate(vortex_t * vortex, int sr)
static void vortex_EqHw_SetSampleRate(vortex_t * vortex, u32 sr)
{
hwwrite(vortex->mmio, 0x2b440, ((sr & 0x1f) << 3) | 0xb800);
}
#if 0
static void vortex_EqHw_GetControlReg(vortex_t * vortex, unsigned long *reg)
static void vortex_EqHw_GetControlReg(vortex_t * vortex, u32 *reg)
{
*reg = hwread(vortex->mmio, 0x2b440);
}
static void vortex_EqHw_GetSampleRate(vortex_t * vortex, int *sr)
static void vortex_EqHw_GetSampleRate(vortex_t * vortex, u32 *sr)
{
*sr = (hwread(vortex->mmio, 0x2b440) >> 3) & 0x1f;
}
......@@ -554,7 +554,7 @@ static void vortex_Eqlzr_SetRightGain(vortex_t * vortex, u16 index, u16 gain)
#if 0
static int
vortex_Eqlzr_GetAllBands(vortex_t * vortex, u16 * gains, unsigned long *cnt)
vortex_Eqlzr_GetAllBands(vortex_t * vortex, u16 * gains, s32 *cnt)
{
eqlzr_t *eq = &(vortex->eq);
int si = 0;
......@@ -586,7 +586,7 @@ static int vortex_Eqlzr_SetAllBandsFromActiveCoeffSet(vortex_t * vortex)
}
static int
vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], unsigned long count)
vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], s32 count)
{
eqlzr_t *eq = &(vortex->eq);
int i;
......@@ -604,11 +604,10 @@ vortex_Eqlzr_SetAllBands(vortex_t * vortex, u16 gains[], unsigned long count)
}
static void
vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, unsigned long a,
unsigned long b)
vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, u32 a, u32 b)
{
eqlzr_t *eq = &(vortex->eq);
int eax, ebx;
u32 eax, ebx;
eq->this58 = a;
eq->this5c = b;
......@@ -624,7 +623,7 @@ vortex_Eqlzr_SetA3dBypassGain(vortex_t * vortex, unsigned long a,
static void vortex_Eqlzr_ProgramA3dBypassGain(vortex_t * vortex)
{
eqlzr_t *eq = &(vortex->eq);
int eax, ebx;
u32 eax, ebx;
if (eq->this54)
eax = eq->this0e;
......@@ -641,7 +640,7 @@ static void vortex_Eqlzr_ShutDownA3d(vortex_t * vortex)
vortex_EqHw_ZeroA3DIO(vortex);
}
static void vortex_Eqlzr_SetBypass(vortex_t * vortex, long bp)
static void vortex_Eqlzr_SetBypass(vortex_t * vortex, u32 bp)
{
eqlzr_t *eq = &(vortex->eq);
......@@ -651,8 +650,8 @@ static void vortex_Eqlzr_SetBypass(vortex_t * vortex, long bp)
vortex_EqHw_SetBypassGain(vortex, eq->this08, eq->this08);
} else {
/* EQ disabled. */
vortex_EqHw_SetLeftGainsTarget(vortex, (u16 *) (eq->this14));
vortex_EqHw_SetRightGainsTarget(vortex, (u16 *) (eq->this14));
vortex_EqHw_SetLeftGainsTarget(vortex, eq->this14_array);
vortex_EqHw_SetRightGainsTarget(vortex, eq->this14_array);
vortex_EqHw_SetBypassGain(vortex, eq->this0c, eq->this0c);
}
vortex_Eqlzr_ProgramA3dBypassGain(vortex);
......@@ -706,7 +705,7 @@ static void vortex_Eqlzr_init(vortex_t * vortex)
eq->this5c = 0xffff;
/* Set gains. */
memset(eq->this14, 0, 2 * 10);
memset(eq->this14_array, 0, sizeof(eq->this14_array));
/* Actual init. */
vortex_EqHw_ZeroState(vortex);
......@@ -792,7 +791,7 @@ snd_vortex_eq_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucon
{
vortex_t *vortex = snd_kcontrol_chip(kcontrol);
int i = kcontrol->private_value;
u16 gainL, gainR;
u16 gainL = 0, gainR = 0;
vortex_Eqlzr_GetLeftGain(vortex, i, &gainL);
vortex_Eqlzr_GetRightGain(vortex, i, &gainR);
......@@ -806,7 +805,7 @@ snd_vortex_eq_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucon
{
vortex_t *vortex = snd_kcontrol_chip(kcontrol);
int changed = 0, i = kcontrol->private_value;
u16 gainL, gainR;
u16 gainL = 0, gainR = 0;
vortex_Eqlzr_GetLeftGain(vortex, i, &gainL);
vortex_Eqlzr_GetRightGain(vortex, i, &gainR);
......
......@@ -18,26 +18,26 @@ typedef struct {
} auxxEqCoeffSet_t;
typedef struct {
unsigned int *this00; /*CAsp4HwIO */
long this04; /* How many filters for each side (default = 10) */
long this08; /* inited to cero. Stereo flag? */
u32 ptr_this00; /*CAsp4HwIO */
s32 this04; /* How many filters for each side (default = 10) */
s32 this08; /* inited to cero. Stereo flag? */
} eqhw_t;
typedef struct {
unsigned int *this00; /*CAsp4Core */
u32 ptr_this00; /*CAsp4Core */
eqhw_t this04; /* CHwEq */
short this08; /* Bad codec flag ? SetBypassGain: bypass gain */
short this0a;
short this0c; /* SetBypassGain: bypass gain when this28 is not set. */
short this0e;
u16 this08; /* Bad codec flag ? SetBypassGain: bypass gain */
u16 this0a;
u16 this0c; /* SetBypassGain: bypass gain when this28 is not set. */
u16 this0e;
long this10; /* How many gains are used for each side (right or left). */
u16 this14[32]; /* SetLeftGainsTarget: Left (and right?) EQ gains */
long this24;
long this28; /* flag related to EQ enabled or not. Gang flag ? */
long this54; /* SetBypass */
long this58;
long this5c;
s32 this10; /* How many gains are used for each side (right or left). */
u16 this14_array[32]; /* SetLeftGainsTarget: Left (and right?) EQ gains */
s32 this24;
s32 this28; /* flag related to EQ enabled or not. Gang flag ? */
s32 this54; /* SetBypass */
s32 this58;
s32 this5c;
/*0x60 */ auxxEqCoeffSet_t coefset;
/* 50 u16 word each channel. */
u16 this130[20]; /* Left and Right gains */
......
......@@ -104,7 +104,11 @@ static u16 asEqOutStateZeros[48] = {
};
/*_rodataba0:*/
static long eq_levels[32] = {
static u16 eq_levels[64] = {
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
......
......@@ -95,7 +95,7 @@ static int __devinit snd_vortex_midi(vortex_t * vortex)
return temp;
}
#else
port = (unsigned long)(vortex->mmio + (VORTEX_MIDI_DATA >> 2));
port = (unsigned long)(vortex->mmio + VORTEX_MIDI_DATA);
if ((temp =
snd_mpu401_uart_new(vortex->card, 0, MPU401_HW_AUREAL, port,
1, 0, 0, &rmidi)) != 0) {
......@@ -105,7 +105,7 @@ static int __devinit snd_vortex_midi(vortex_t * vortex)
return temp;
}
mpu = rmidi->private_data;
mpu->cport = (unsigned long)(vortex->mmio + (VORTEX_MIDI_CMD >> 2));
mpu->cport = (unsigned long)(vortex->mmio + VORTEX_MIDI_CMD);
#endif
vortex->rmidi = rmidi;
return 0;
......
......@@ -32,7 +32,7 @@ static void vortex_connection_mixin_mix(vortex_t * vortex, int en,
unsigned char mix, int a);
static void vortex_fifo_wtinitialize(vortex_t * vortex, int fifo, int j);
static int vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
unsigned long val);
u32 val);
/* WT */
......@@ -166,7 +166,7 @@ static int vortex_wt_GetReg(vortex_t * vortex, char reg, int wt)
/* WT hardware abstraction layer generic register interface. */
static int
vortex_wt_SetReg2(vortex_t * vortex, unsigned char reg, int wt,
unsigned short val)
u16 val)
{
/*
int eax, edx;
......@@ -190,7 +190,7 @@ vortex_wt_SetReg2(vortex_t * vortex, unsigned char reg, int wt,
#endif
static int
vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
unsigned long val)
u32 val)
{
int ecx;
......@@ -279,7 +279,7 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt,
static void vortex_wt_init(vortex_t * vortex)
{
int var4, var8, varc, var10 = 0, edi;
u32 var4, var8, varc, var10 = 0, edi;
var10 &= 0xFFFFFFE3;
var10 |= 0x22;
......@@ -353,7 +353,7 @@ static void vortex_wt_SetVolume(vortex_t * vortex, int wt, int vol[])
static void vortex_wt_SetFrequency(vortex_t * vortex, int wt, unsigned int sr)
{
wt_voice_t *voice = &(vortex->wt_voice[wt]);
long int eax, edx;
u32 eax, edx;
//FIXME: 64 bit operation.
eax = ((sr << 0xf) * 0x57619F1) & 0xffffffff;
......
......@@ -53,11 +53,11 @@ enum {
#endif
typedef struct {
unsigned int parm0; /* this_1E4 */
unsigned int parm1; /* this_1E8 */
unsigned int parm2; /* this_1EC */
unsigned int parm3; /* this_1F0 */
unsigned int this_1D0;
u32 parm0; /* this_1E4 */
u32 parm1; /* this_1E8 */
u32 parm2; /* this_1EC */
u32 parm3; /* this_1F0 */
u32 this_1D0;
} wt_voice_t;
#endif /* _AU88X0_WT_H */
......
......@@ -562,7 +562,7 @@ static void
vortex_XtalkHw_SetDelay(vortex_t * vortex, unsigned short right,
unsigned short left)
{
int esp0 = 0;
u32 esp0 = 0;
esp0 &= 0x1FFFFFFF;
esp0 |= 0xA0000000;
......@@ -632,18 +632,18 @@ static void vortex_XtalkHw_GetRightDline(vortex_t * vortex, xtalk_dline_t dline)
/* Control/Global stuff */
#if 0
static void vortex_XtalkHw_SetControlReg(vortex_t * vortex, unsigned long ctrl)
static void vortex_XtalkHw_SetControlReg(vortex_t * vortex, u32 ctrl)
{
hwwrite(vortex->mmio, 0x24660, ctrl);
}
static void vortex_XtalkHw_GetControlReg(vortex_t * vortex, unsigned long *ctrl)
static void vortex_XtalkHw_GetControlReg(vortex_t * vortex, u32 *ctrl)
{
*ctrl = hwread(vortex->mmio, 0x24660);
}
#endif
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr)
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, u32 sr)
{
int temp;
u32 temp;
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
temp = (temp & 0xffffff07) | ((sr & 0x1f) << 3);
......@@ -651,7 +651,7 @@ static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr)
}
#if 0
static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, int *sr)
static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, u32 *sr)
{
*sr = (hwread(vortex->mmio, 0x24660) >> 3) & 0x1f;
}
......@@ -659,7 +659,7 @@ static void vortex_XtalkHw_GetSampleRate(vortex_t * vortex, int *sr)
#endif
static void vortex_XtalkHw_Enable(vortex_t * vortex)
{
int temp;
u32 temp;
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
temp |= 1;
......@@ -669,7 +669,7 @@ static void vortex_XtalkHw_Enable(vortex_t * vortex)
static void vortex_XtalkHw_Disable(vortex_t * vortex)
{
int temp;
u32 temp;
temp = (hwread(vortex->mmio, 0x24660) & 0x1FFFFFFF) | 0xC0000000;
temp &= 0xfffffffe;
......
......@@ -39,16 +39,16 @@
#define XT_SPEAKER1 3
#define XT_DIAMOND 4
typedef long xtalk_dline_t[XTDLINE_SZ];
typedef short xtalk_gains_t[XTGAINS_SZ];
typedef short xtalk_instate_t[XTINST_SZ];
typedef short xtalk_coefs_t[5][5];
typedef short xtalk_state_t[5][4];
typedef u32 xtalk_dline_t[XTDLINE_SZ];
typedef u16 xtalk_gains_t[XTGAINS_SZ];
typedef u16 xtalk_instate_t[XTINST_SZ];
typedef u16 xtalk_coefs_t[5][5];
typedef u16 xtalk_state_t[5][4];
static void vortex_XtalkHw_SetGains(vortex_t * vortex,
xtalk_gains_t const gains);
static void vortex_XtalkHw_SetGainsAllChan(vortex_t * vortex);
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, int sr);
static void vortex_XtalkHw_SetSampleRate(vortex_t * vortex, u32 sr);
static void vortex_XtalkHw_ProgramPipe(vortex_t * vortex);
static void vortex_XtalkHw_ProgramPipe(vortex_t * vortex);
static void vortex_XtalkHw_ProgramXtalkWide(vortex_t * vortex);
......
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