提交 934b7024 编写于 作者: L Linus Torvalds

Fix cardbus resource allocation

Commit 88452565 ("PCI: clean up resource
alignment management") didn't set the alignment information for the
cardbus window resources, causing their subsequent allocations to fail
miserably with a message like

  yenta_cardbus 0000:15:00.0: device not available because of BAR 7 [100:1ff] collisions
  yenta_cardbus: probe of 0000:15:00.0 failed with error -16

or similar.

This fixes it and clarifies the code a bit too (we used to have to use
the insane PCI bridge alignment logic that put the alignment in the
"start" field, this makes it use the slightly easier-to-understand
size-based alignment, and allows us to set the resource start to zero
until it gets allocated).
Reported-and-tested-by: NJeff Chua <jeff.chua.linux@gmail.com>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 29591b92
...@@ -416,13 +416,13 @@ static void pci_bus_size_cardbus(struct pci_bus *bus) ...@@ -416,13 +416,13 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
* Reserve some resources for CardBus. We reserve * Reserve some resources for CardBus. We reserve
* a fixed amount of bus space for CardBus bridges. * a fixed amount of bus space for CardBus bridges.
*/ */
b_res[0].start = pci_cardbus_io_size; b_res[0].start = 0;
b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1; b_res[0].end = pci_cardbus_io_size - 1;
b_res[0].flags |= IORESOURCE_IO; b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
b_res[1].start = pci_cardbus_io_size; b_res[1].start = 0;
b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1; b_res[1].end = pci_cardbus_io_size - 1;
b_res[1].flags |= IORESOURCE_IO; b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
/* /*
* Check whether prefetchable memory is supported * Check whether prefetchable memory is supported
...@@ -441,17 +441,17 @@ static void pci_bus_size_cardbus(struct pci_bus *bus) ...@@ -441,17 +441,17 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
* twice the size. * twice the size.
*/ */
if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
b_res[2].start = pci_cardbus_mem_size; b_res[2].start = 0;
b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1; b_res[2].end = pci_cardbus_mem_size - 1;
b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN;
b_res[3].start = pci_cardbus_mem_size; b_res[3].start = 0;
b_res[3].end = b_res[3].start + pci_cardbus_mem_size - 1; b_res[3].end = pci_cardbus_mem_size - 1;
b_res[3].flags |= IORESOURCE_MEM; b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
} else { } else {
b_res[3].start = pci_cardbus_mem_size * 2; b_res[3].start = 0;
b_res[3].end = b_res[3].start + pci_cardbus_mem_size * 2 - 1; b_res[3].end = pci_cardbus_mem_size * 2 - 1;
b_res[3].flags |= IORESOURCE_MEM; b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
} }
} }
......
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