提交 8e20ce94 编写于 作者: A Andrew Morton 提交者: Linus Torvalds

convert some DMA_nnBIT_MASK() callers

We're about to make DMA_nnBIT_MASK() emit `deprecated' warnings.  Convert the
remaining stragglers which are visible to the x86_64 build.

Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: Eric Moore <Eric.Moore@lsil.com>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Alexander Duyck <alexander.h.duyck@intel.com>
Cc: Yi Zou <yi.zou@intel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
上级 a90b0375
......@@ -4414,11 +4414,11 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
* 1078 errata workaround for the 36GB limitation
*/
if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078 &&
ioc->dma_mask > DMA_35BIT_MASK) {
ioc->dma_mask > DMA_BIT_MASK(35)) {
if (!pci_set_dma_mask(ioc->pcidev, DMA_BIT_MASK(32))
&& !pci_set_consistent_dma_mask(ioc->pcidev,
DMA_BIT_MASK(32))) {
dma_mask = DMA_35BIT_MASK;
dma_mask = DMA_BIT_MASK(35);
d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
"setting 35 bit addressing for "
"Request/Reply/Chain and Sense Buffers\n",
......@@ -4575,7 +4575,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
alloc_dma += ioc->reply_sz;
}
if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
ioc->dma_mask) && !pci_set_consistent_dma_mask(ioc->pcidev,
ioc->dma_mask))
d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
......@@ -4602,7 +4602,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc)
ioc->sense_buf_pool = NULL;
}
if (dma_mask == DMA_35BIT_MASK && !pci_set_dma_mask(ioc->pcidev,
if (dma_mask == DMA_BIT_MASK(35) && !pci_set_dma_mask(ioc->pcidev,
DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(ioc->pcidev,
DMA_BIT_MASK(64)))
d36memprintk(ioc, printk(MYIOC_s_DEBUG_FMT
......
......@@ -1281,7 +1281,7 @@ static void igbvf_configure_tx(struct igbvf_adapter *adapter)
/* Setup the HW Tx Head and Tail descriptor pointers */
ew32(TDLEN(0), tx_ring->count * sizeof(union e1000_adv_tx_desc));
tdba = tx_ring->dma;
ew32(TDBAL(0), (tdba & DMA_32BIT_MASK));
ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
ew32(TDBAH(0), (tdba >> 32));
ew32(TDH(0), 0);
ew32(TDT(0), 0);
......@@ -1367,7 +1367,7 @@ static void igbvf_configure_rx(struct igbvf_adapter *adapter)
* the Base and Length of the Rx Descriptor Ring
*/
rdba = rx_ring->dma;
ew32(RDBAL(0), (rdba & DMA_32BIT_MASK));
ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
ew32(RDBAH(0), (rdba >> 32));
ew32(RDLEN(0), rx_ring->count * sizeof(union e1000_adv_rx_desc));
rx_ring->head = E1000_RDH(0);
......@@ -2628,15 +2628,16 @@ static int __devinit igbvf_probe(struct pci_dev *pdev,
return err;
pci_using_dac = 0;
err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
if (!err) {
err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
if (!err)
pci_using_dac = 1;
} else {
err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (err) {
err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
err = pci_set_consistent_dma_mask(pdev,
DMA_BIT_MASK(32));
if (err) {
dev_err(&pdev->dev, "No usable DMA "
"configuration, aborting\n");
......
......@@ -251,7 +251,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
/* program DMA context */
hw = &adapter->hw;
spin_lock_bh(&fcoe->lock);
IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_32BIT_MASK);
IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
......
......@@ -988,7 +988,7 @@ static int __devinit snd_lx6464es_create(struct snd_card *card,
pci_set_master(pci);
/* check if we can restrict PCI DMA transfers to 32 bits */
err = pci_set_dma_mask(pci, DMA_32BIT_MASK);
err = pci_set_dma_mask(pci, DMA_BIT_MASK(32));
if (err < 0) {
snd_printk(KERN_ERR "architecture does not support "
"32bit PCI busmaster DMA\n");
......
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