clk: versatile: fixup IM-PD1 clock implementation
Register both VCO clocks, give per-logical module unique names to the clocks so we can have several IM-PD1's connected (in theory). Implement all the fixed-factor clocks as children of VCO2. Tested by using the UARTs and the PL181 MMC block on the IM-PD1, works flawlessly. Acked-by: NMike Turquette <mturquette@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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