Skip to content

cloud-kernel
cloud-kernel

openanolis / cloud-kernel
1 年多 前同步成功

通知 160
Star 36
Fork 7
cloud-kernel
cloud-kernel
提交 8a20a04b 编写于 作者: L Linus Torvalds
浏览文件
操作

Merge tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull more ARM DT changes from Arnd Bergmann:
 "Here are some final updates for ARM SoC specific dts files:

   - The i.MX changes were sent relatively late, and had a dependency on
     the clk tree, so I delayed that a bit.  Support for the new i.MX6qp
     SoC and a couple of new boards is added in this branch.

   - Uniphier renames a few files to match the final product names that
     were decided by the company, kudos to the kernel developer(s) for
     getting support upstream before the product release.  Also two
     boards are added.  The patches were posted early enough and nice
     overall, but we forgot to apply them and decided to give it some
     more time in linux-next

   - at91 has two small bug fixes"

* tag 'armsoc-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: dts: at91: sama5d4 Xplained: don't disable hsmci regulator
  ARM: dts: at91: sama5d3 Xplained: don't disable hsmci regulator
  ARM: dts: uniphier: add pinmux node for I2C ch4
  ARM: dts: uniphier: add @{address} to EEPROM node
  ARM: dts: uniphier: add PH1-Pro4 Sanji board support
  ARM: dts: uniphier: add PH1-Pro4 Ace board support
  ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil board
  ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil board
  ARM: dts: uniphier: add reference clock nodes
  ARM: dts: uniphier: rework UniPhier System Bus nodes
  ARM: dts: uniphier: factor out ranges property of support card
  arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
  ARM: dts: imx53-qsb: Fix gpio button polarity
  ARM: dts: vfxxx: Add DAC node for Vybrid SoC
  ARM: dts: imx6q: add missing links between ipu2 and mipi dsi
  ARM: dts: imx: Add support for Advantech/GE B850v3
  ARM: dts: imx: Add support for Advantech/GE B650v3
  ARM: dts: imx: Add support for Advantech/GE B450v3
  ARM: dts: imx: Add support for Advantech/GE Bx50v3
  ARM: dts: imx: Add Advantech BA-16 Qseven module
  ...
上级 732b84ee 6fe35ab7
展开全部 隐藏空白更改
内联 并排
Showing with 6088 addition and 1339 deletion
Documentation/devicetree/bindings/vendor-prefixes.txt
浏览文件 @ 8a20a04b
......@@ -10,6 +10,7 @@ ad Avionic Design GmbH
adapteva Adapteva, Inc.
adh AD Holdings Plc.
adi Analog Devices, Inc.
advantech Advantech Corporation
aeroflexgaisler Aeroflex Gaisler AB
al Annapurna Labs
allwinner Allwinner Technology Co., Ltd.
......@@ -89,6 +90,7 @@ fcs Fairchild Semiconductor
firefly Firefly
focaltech FocalTech Systems Co.,Ltd
fsl Freescale Semiconductor
ge General Electric Company
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
geniatech Geniatech, Inc.
......
arch/arm/boot/dts/Makefile
浏览文件 @ 8a20a04b
......@@ -325,12 +325,17 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-udoo.dtb \
imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \
imx6q-apalis-ixora.dtb \
imx6q-apf6dev.dtb \
imx6q-arm2.dtb \
imx6q-b450v3.dtb \
imx6q-b650v3.dtb \
imx6q-b850v3.dtb \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
imx6q-dfi-fs700-m60.dtb \
imx6q-dmo-edmqmx6.dtb \
imx6q-evi.dtb \
imx6q-gk802.dtb \
imx6q-gw51xx.dtb \
imx6q-gw52xx.dtb \
......@@ -340,6 +345,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \
imx6q-gw552x.dtb \
imx6q-hummingboard.dtb \
imx6q-icore-rqs.dtb \
imx6q-nitrogen6x.dtb \
imx6q-nitrogen6_max.dtb \
imx6q-novena.dtb \
......@@ -357,7 +363,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-tx6q-1110.dtb \
imx6q-udoo.dtb \
imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb
imx6q-wandboard-revb1.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \
imx6sl-warp.dtb
......@@ -752,7 +760,9 @@ dtb-$(CONFIG_ARCH_U8500) += \
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-ld4-ref.dtb \
uniphier-ph1-ld6b-ref.dtb \
uniphier-ph1-pro4-ace.dtb \
uniphier-ph1-pro4-ref.dtb \
uniphier-ph1-pro4-sanji.dtb \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-sld8-ref.dtb \
uniphier-proxstream2-gentil.dtb \
......
arch/arm/boot/dts/at91-sama5d3_xplained.dts
浏览文件 @ 8a20a04b
......@@ -303,6 +303,7 @@
regulator-name = "mmc0-card-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
gpio_keys {
......
arch/arm/boot/dts/at91-sama5d4_xplained.dts
浏览文件 @ 8a20a04b
......@@ -268,5 +268,6 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_reg>;
regulator-always-on;
};
};
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
浏览文件 @ 8a20a04b
......@@ -30,7 +30,7 @@
label = "BP1";
gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
gpio-key,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx25.dtsi
浏览文件 @ 8a20a04b
......@@ -269,13 +269,36 @@
status = "disabled";
};
tsc: tsc@50030000 {
compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
reg = <0x50030000 0x4000>;
tscadc: tscadc@50030000 {
compatible = "fsl,imx25-tsadc";
reg = <0x50030000 0xc>;
interrupts = <46>;
clocks = <&clks 119>;
clock-names = "ipg";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
adc: adc@50030800 {
compatible = "fsl,imx25-gcq";
reg = <0x50030800 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tsc: tcq@50030400 {
compatible = "fsl,imx25-tcq";
reg = <0x50030400 0x60>;
interrupt-parent = <&tscadc>;
interrupts = <0>;
fsl,wires = <4>;
status = "disabled";
};
};
ssi1: ssi@50034000 {
......@@ -497,7 +520,8 @@
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
reg = <0x53ff4000 0x0200>;
interrupts = <37>;
clocks = <&clks 70>;
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
clock-names = "ipg", "ahb", "per";
fsl,usbmisc = <&usbmisc 0>;
fsl,usbphy = <&usbphy0>;
status = "disabled";
......@@ -507,7 +531,8 @@
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
reg = <0x53ff4400 0x0200>;
interrupts = <35>;
clocks = <&clks 70>;
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
clock-names = "ipg", "ahb", "per";
fsl,usbmisc = <&usbmisc 1>;
fsl,usbphy = <&usbphy1>;
status = "disabled";
......@@ -516,8 +541,6 @@
usbmisc: usbmisc@53ff4600 {
#index-cells = <1>;
compatible = "fsl,imx25-usbmisc";
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
clock-names = "ipg", "ahb", "per";
reg = <0x53ff4600 0x00f>;
};
......
arch/arm/boot/dts/imx28-apf28dev.dts
浏览文件 @ 8a20a04b
......@@ -225,7 +225,7 @@
label = "User button";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
gpio-key,wakeup;
wakeup-source;
};
};
};
arch/arm/boot/dts/imx28-eukrea-mbmx28lc.dtsi
浏览文件 @ 8a20a04b
......@@ -36,7 +36,7 @@
label = "SW3";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
gpio-key,wakeup;
wakeup-source;
};
};
......@@ -49,7 +49,7 @@
label = "SW4";
gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
gpio-key,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx28-tx28.dts
浏览文件 @ 8a20a04b
......@@ -130,7 +130,7 @@
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-frequency = <26000000>;
};
};
......@@ -202,7 +202,7 @@
0x02020049 /* row 2, col 2, KEY_KP9 */
>;
gpio-activelow;
linux,wakeup;
wakeup-source;
debounce-delay-ms = <100>;
col-scan-delay-us = <5000>;
linux,no-autorepeat;
......
arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts
浏览文件 @ 8a20a04b
......@@ -30,7 +30,7 @@
label = "BP1";
gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
gpio-key,wakeup;
wakeup-source;
linux,input-type = <1>;
};
};
......
arch/arm/boot/dts/imx35.dtsi
浏览文件 @ 8a20a04b
......@@ -305,7 +305,8 @@
compatible = "fsl,imx35-usb", "fsl,imx27-usb";
reg = <0x53ff4000 0x0200>;
interrupts = <37>;
clocks = <&clks 73>;
clocks = <&clks 9>, <&clks 73>, <&clks 28>;
clock-names = "ipg", "ahb", "per";
fsl,usbmisc = <&usbmisc 0>;
fsl,usbphy = <&usbphy0>;
status = "disabled";
......@@ -315,7 +316,8 @@
compatible = "fsl,imx35-usb", "fsl,imx27-usb";
reg = <0x53ff4400 0x0200>;
interrupts = <35>;
clocks = <&clks 73>;
clocks = <&clks 9>, <&clks 73>, <&clks 28>;
clock-names = "ipg", "ahb", "per";
fsl,usbmisc = <&usbmisc 1>;
fsl,usbphy = <&usbphy1>;
dr_mode = "host";
......@@ -325,8 +327,6 @@
usbmisc: usbmisc@53ff4600 {
#index-cells = <1>;
compatible = "fsl,imx35-usbmisc";
clocks = <&clks 9>, <&clks 73>, <&clks 28>;
clock-names = "ipg", "ahb", "per";
reg = <0x53ff4600 0x00f>;
};
};
......
arch/arm/boot/dts/imx51-babbage.dts
浏览文件 @ 8a20a04b
......@@ -107,7 +107,7 @@
label = "Power Button";
gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
浏览文件 @ 8a20a04b
......@@ -156,7 +156,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>;
cap-sdio-irq;
enable-sdio-wakeup;
wakeup-source;
keep-power-in-suspend;
max-frequency = <50000000>;
no-1-8-v;
......
arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
浏览文件 @ 8a20a04b
......@@ -41,7 +41,7 @@
label = "BP1";
gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
linux,code = <256>;
gpio-key,wakeup;
wakeup-source;
linux,input-type = <1>;
};
};
......
arch/arm/boot/dts/imx51-pinfunc.h
浏览文件 @ 8a20a04b
......@@ -536,7 +536,6 @@
#define MX51_PAD_DISPB2_SER_CLK__DISP1_PIN7 0x2c4 0x6c4 0x000 0x3 0x0
#define MX51_PAD_DISPB2_SER_CLK__DISPB2_SER_CLK 0x2c4 0x6c4 0x000 0x0 0x0
#define MX51_PAD_DISPB2_SER_CLK__GPIO3_7 0x2c4 0x6c4 0x990 0x4 0x1
#define MX51_PAD_DISPB2_SER_RS__DISP1_EXT_CLK 0x2c8 0x6c8 0x000 0x2 0x0
#define MX51_PAD_DISPB2_SER_RS__DISP1_PIN16 0x2c8 0x6c8 0x000 0x2 0x0
#define MX51_PAD_DISPB2_SER_RS__DISP1_PIN8 0x2c8 0x6c8 0x000 0x3 0x0
#define MX51_PAD_DISPB2_SER_RS__DISPB2_SER_RS 0x2c8 0x6c8 0x000 0x0 0x0
......
arch/arm/boot/dts/imx53-ard.dts
浏览文件 @ 8a20a04b
......@@ -69,21 +69,21 @@
label = "Home";
gpios = <&gpio5 10 0>;
linux,code = <102>; /* KEY_HOME */
gpio-key,wakeup;
wakeup-source;
};
back {
label = "Back";
gpios = <&gpio5 11 0>;
linux,code = <158>; /* KEY_BACK */
gpio-key,wakeup;
wakeup-source;
};
program {
label = "Program";
gpios = <&gpio5 12 0>;
linux,code = <362>; /* KEY_PROGRAM */
gpio-key,wakeup;
wakeup-source;
};
volume-up {
......
arch/arm/boot/dts/imx53-qsb-common.dtsi
浏览文件 @ 8a20a04b
......@@ -59,22 +59,22 @@
power {
label = "Power Button";
gpios = <&gpio1 8 0>;
linux,code = <116>; /* KEY_POWER */
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
};
volume-up {
label = "Volume Up";
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
gpio-key,wakeup;
gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
wakeup-source;
};
volume-down {
label = "Volume Down";
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
gpio-key,wakeup;
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx53-tx53-x03x.dts
浏览文件 @ 8a20a04b
......@@ -231,7 +231,7 @@
interrupts = <26 0>;
gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
ti,x-plate-ohms = <660>;
linux,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx53-tx53-x13x.dts
浏览文件 @ 8a20a04b
......@@ -101,7 +101,7 @@
interrupt-parent = <&gpio3>;
interrupts = <23 0>;
wakeup-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
linux,wakeup;
wakeup-source;
};
};
......@@ -126,7 +126,7 @@
interrupt-parent = <&gpio3>;
interrupts = <22 0>;
wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
linux,wakeup;
wakeup-source;
};
};
......@@ -183,13 +183,14 @@
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&lvds_timing0>;
lvds_timing0: hsd100pxn1 {
native-mode = <&lvds0_timing0>;
lvds0_timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
......@@ -202,19 +203,36 @@
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
pixelclk-active = <1>;
};
lvds0_timing1: nl12880bc20 {
clock-frequency = <71000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <50>;
hsync-len = <60>;
hfront-porch = <50>;
vback-porch = <5>;
vsync-len = <13>;
vfront-porch = <5>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
};
lvds1: lvds-channel@1 {
fsl,data-mapping = "jeida";
fsl,data-width = <24>;
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&lvds_timing1>;
lvds_timing1: hsd100pxn1 {
native-mode = <&lvds1_timing0>;
lvds1_timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
......@@ -227,7 +245,7 @@
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
pixelclk-active = <1>;
};
};
};
......
arch/arm/boot/dts/imx53-tx53.dtsi
浏览文件 @ 8a20a04b
......@@ -37,7 +37,7 @@
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-frequency = <26000000>;
};
};
......@@ -50,7 +50,7 @@
label = "Power Button";
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx6dl-tx6u-811x.dts
浏览文件 @ 8a20a04b
......@@ -77,7 +77,7 @@
interrupt-parent = <&gpio3>;
interrupts = <22 0>;
wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
linux,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx6dl-wandboard-revb1.dts
浏览文件 @ 8a20a04b
......@@ -13,7 +13,7 @@
#include "imx6qdl-wandboard-revb1.dtsi"
/ {
model = "Wandboard i.MX6 Dual Lite Board";
model = "Wandboard i.MX6 Dual Lite Board rev B1";
compatible = "wand,imx6dl-wandboard", "fsl,imx6dl";
memory {
......
arch/arm/boot/dts/imx6q-apalis-ixora.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2014-2016 Toradex AG
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6q.dtsi"
#include "imx6qdl-apalis.dtsi"
/ {
model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board";
compatible = "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q",
"fsl,imx6q";
aliases {
i2c0 = &i2cddc;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
};
aliases {
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
wakeup {
label = "Wake-Up";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds_ixora>;
led4-green {
label = "LED_4_GREEN";
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
};
led4-red {
label = "LED_4_RED";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
};
led5-green {
label = "LED_5_GREEN";
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
};
led5-red {
label = "LED_5_RED";
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};
};
pwmleds {
compatible = "pwm-leds";
ledpwm1 {
label = "PWM1";
pwms = <&pwm1 0 50000>;
max-brightness = <255>;
};
ledpwm2 {
label = "PWM2";
pwms = <&pwm2 0 50000>;
max-brightness = <255>;
};
ledpwm3 {
label = "PWM3";
pwms = <&pwm3 0 50000>;
max-brightness = <255>;
};
};
};
&backlight {
brightness-levels = <0 127 191 223 239 247 251 255>;
default-brightness-level = <1>;
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2cddc>;
status = "okay";
};
&i2cddc {
status = "okay";
};
/* GEN1_I2C: I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
/* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 {
compatible = "st,m41t00";
reg = <0x68>;
};
};
&ldb {
status = "okay";
};
&pcie {
/* active-low meaning opposite of regular PERST# active-low polarity */
reset-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&pwm3 {
status = "okay";
};
&pwm4 {
status = "okay";
};
&reg_usb_otg_vbus {
status = "okay";
};
&reg_usb_host_vbus {
status = "okay";
};
&sata {
status = "okay";
};
&sound_spdif {
status = "okay";
};
&spdif {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart4 {
status = "okay";
};
&uart5 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
status = "okay";
};
/* SD1 */
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd_cd>;
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay";
};
&iomuxc {
/*
* Mux the Apalis GPIOs
* GPIO5, 6 used by optional fusion_F0710A kernel module
*/
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
&pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
&pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
>;
pinctrl_leds_ixora: ledsixoragrp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
>;
};
};
arch/arm/boot/dts/imx6q-b450v3.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q-bx50v3.dtsi"
/ {
model = "General Electric B450v3";
compatible = "ge,imx6q-b450v3", "advantech,imx6q-ba16", "fsl,imx6q";
chosen {
stdout-path = &uart3;
};
panel-lvds0 {
compatible = "innolux,g121x1-l03";
backlight = <&backlight_lvds>;
power-supply = <&reg_lvds>;
port {
panel_in_lvds0: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
};
};
arch/arm/boot/dts/imx6q-b650v3.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q-bx50v3.dtsi"
/ {
model = "General Electric B650v3";
compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q";
chosen {
stdout-path = &uart3;
};
panel-lvds0 {
compatible = "innolux,g121x1-l03";
backlight = <&backlight_lvds>;
power-supply = <&reg_lvds>;
port {
panel_in_lvds0: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
};
};
arch/arm/boot/dts/imx6q-b850v3.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q-bx50v3.dtsi"
/ {
model = "General Electric B850v3";
compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q";
chosen {
stdout-path = &uart3;
};
panel-lvds0 {
compatible = "auo,b133htn01";
backlight = <&backlight_lvds>;
ddc-i2c-bus = <&mux2_i2c2>;
port {
panel_in_lvds0: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
fsl,dual-channel;
status = "okay";
lvds0: lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
};
};
&i2c2 {
pca9547_ddc: mux@70 {
compatible = "nxp,pca9547";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
mux2_i2c1: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
};
mux2_i2c2: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
mux2_i2c3: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
mux2_i2c4: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
};
mux2_i2c5: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
};
mux2_i2c6: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
mux2_i2c7: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
mux2_i2c8: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&hdmi {
ddc-i2c-bus = <&mux2_i2c1>;
};
&mux1_i2c1 {
ads7830@4a {
compatible = "ti,ads7830";
reg = <0x4a>;
};
};
arch/arm/boot/dts/imx6q-ba16.dtsi 0 → 100644
浏览文件 @ 8a20a04b
/*
* Support for imx6 based Advantech DMS-BA16 Qseven module
*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6q.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
memory {
reg = <0x10000000 0x40000000>;
};
backlight_lvds: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_display>;
pwms = <&pwm1 0 5000000>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100 101 102 103 104 105 106 107 108 109
110 111 112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127 128 129
130 131 132 133 134 135 136 137 138 139
140 141 142 143 144 145 146 147 148 149
150 151 152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167 168 169
170 171 172 173 174 175 176 177 178 179
180 181 182 183 184 185 186 187 188 189
190 191 192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207 208 209
210 211 212 213 214 215 216 217 218 219
220 221 222 223 224 225 226 227 228 229
230 231 232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247 248 249
250 251 252 253 254 255>;
default-brightness-level = <255>;
enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_lvds: regulator-lvds {
compatible = "regulator-fixed";
regulator-name = "lvds_ppen";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_h1_vbus: regulator-usbh1vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usb_otg_vbus: regulator-usbotgvbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash: n25q032@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <20000000>;
reg = <0>;
partition@0 {
label = "U-Boot";
reg = <0x0 0xc0000>;
};
partition@c0000 {
label = "env";
reg = <0xc0000 0x10000>;
};
partition@d0000 {
label = "spare";
reg = <0xd0000 0x130000>;
};
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio7>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
onkey {
compatible = "dlg,da9063-onkey";
};
regulators {
vdd_bcore1: bcore1 {
regulator-min-microvolt = <1420000>;
regulator-max-microvolt = <1420000>;
regulator-always-on;
regulator-boot-on;
};
vdd_bcore2: bcore2 {
regulator-min-microvolt = <1420000>;
regulator-max-microvolt = <1420000>;
regulator-always-on;
regulator-boot-on;
};
vdd_bpro: bpro {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
vdd_bmem: bmem {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_bio: bio {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
vdd_bperi: bperi {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd_ldo1: ldo1 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1860000>;
};
vdd_ldo2: ldo2 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <1860000>;
};
vdd_ldo3: ldo3 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3440000>;
};
vdd_ldo4: ldo4 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3440000>;
};
vdd_ldo5: ldo5 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo6: ldo6 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo7: ldo7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo8: ldo8 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo9: ldo9 {
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo10: ldo10 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
};
vdd_ldo11: ldo11 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3600000>;
regulator-always-on;
regulator-boot-on;
};
};
};
rtc@32 {
compatible = "epson,rx8010";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
reg = <0x32>;
interrupt-parent = <&gpio4>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
};
&sata {
status = "okay";
};
&ssi1 {
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
fsl,uart-has-rtscts;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbhub>;
vbus-supply = <&reg_usb_h1_vbus>;
reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
bus-width = <8>;
vmmc-supply = <&vdd_bperi>;
vqmmc-supply = <&vdd_bio>;
non-removable;
keep-power-in-suspend;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>;
};
pinctrl_display: dispgrp {
fsl,pins = <
/* BLEN_OUT */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
/* LVDS_PPEN_OUT */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
/* SPI1 CS */
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>;
};
pinctrl_ecspi5: ecspi5grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
/* FEC Reset */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
/* AR8033 Interrupt */
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
/* GPIO 0-7 */
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
/* SUS_S3_OUT to CPLD */
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
/* PCIe Reset */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
/* PCIe Wake */
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
/* PMIC Interrupt */
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
>;
};
pinctrl_rtc: rtcgrp {
fsl,pins = <
/* RTC_INT */
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbhub: usbhubgrp {
fsl,pins = <
/* HUB_RESET */
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
/* uSDHC2 CD */
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
pinctrl_usdhc3_reset: usdhc3grp-reset {
fsl,pins = <
MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
/* uSDHC4 CD */
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
/* uSDHC4 SDIO PWR */
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
/* uSDHC4 SDIO WP */
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
/* uSDHC4 SDIO LED */
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
>;
};
};
arch/arm/boot/dts/imx6q-bx50v3.dtsi 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2015 Timesys Corporation.
* Copyright 2015 General Electric Company
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6q-ba16.dtsi"
/ {
clocks {
mclk: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <22000000>;
};
};
reg_wl18xx_vmmc: regulator-wl18xx {
compatible = "regulator-fixed";
regulator-name = "vwl1807";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <70000>;
enable-active-high;
};
reg_wlan: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "3P3V_wlan";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
};
sound {
compatible = "fsl,imx6q-ba16-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6q-ba16-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&ecspi5 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi5>;
status = "okay";
m25_eeprom: m25p80@0 {
compatible = "atmel,at25";
spi-max-frequency = <20000000>;
size = <0x8000>;
pagesize = <64>;
reg = <0>;
address-width = <16>;
};
};
&i2c1 {
pca9547: mux@70 {
compatible = "nxp,pca9547";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
mux1_i2c1: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
ads7830: ads7830@48 {
compatible = "ti,ads7830";
reg = <0x48>;
};
mma8453: mma8453@1c {
compatible = "fsl,mma8453";
reg = <0x1c>;
};
};
mux1_i2c2: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
eeprom: eeprom@50 {
compatible = "atmel,24c08";
reg = <0x50>;
};
mpl3115: mpl3115@60 {
compatible = "fsl,mpl3115";
reg = <0x60>;
};
};
mux1_i2c3: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
mux1_i2c4: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&mclk>;
VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>;
};
};
mux1_i2c5: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x4>;
pca9539: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
interrupt-parent = <&gpio2>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
};
};
mux1_i2c6: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x5>;
};
mux1_i2c7: i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x6>;
};
mux1_i2c8: i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x7>;
};
};
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <4>;
vmmc-supply = <&reg_wl18xx_vmmc>;
no-1-8-v;
non-removable;
wakeup-source;
keep-power-in-suspend;
cap-power-off-card;
max-frequency = <25000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupt-parent = <&gpio2>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
tcxo-clock-frequency = <26000000>;
};
};
arch/arm/boot/dts/imx6q-evi.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2016 United Western Technologies.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
/dts-v1/;
#include "imx6q.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Uniwest Evi";
compatible = "uniwest,imx6q-evi", "fsl,imx6q";
memory {
reg = <0x10000000 0x40000000>;
};
reg_usbh1_vbus: regulator-usbhubreset {
compatible = "regulator-fixed";
regulator-name = "usbh1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
startup-delay-us = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1_hubreset>;
gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
};
reg_usb_otg_vbus: regulator-usbotgvbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotgvbus>;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
panel {
compatible = "sharp,lq101k1ly04";
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1cs>;
status = "okay";
};
&ecspi3 {
fsl,spi-num-chipselects = <3>;
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
<&gpio4 25 GPIO_ACTIVE_LOW>,
<&gpio4 26 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3cs>;
status = "okay";
};
&ecspi5 {
fsl,spi-num-chipselects = <4>;
cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>,
<&gpio1 13 GPIO_ACTIVE_LOW>,
<&gpio1 12 GPIO_ACTIVE_LOW>,
<&gpio2 9 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi5 &pinctrl_ecspi5cs>;
status = "okay";
eeprom: m95m02@1 {
compatible = "st,m95m02", "atmel,at25";
size = <262144>;
pagesize = <256>;
address-width = <24>;
spi-max-frequency = <5000000>;
reg = <1>;
};
pb_rtc: rtc@3 {
compatible = "nxp,rtc-pcf2123";
spi-max-frequency = <2450000>;
spi-cs-high;
reg = <3>;
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 0>;
status = "okay";
};
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpminand>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_gpio>;
clock-frequency = <100000>;
scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
status = "okay";
battery: sbs-battery@b {
compatible = "sbs,sbs-battery";
reg = <0x0b>;
sbs,poll-retry-count = <100>;
sbs,i2c-retry-count = <100>;
};
};
&ldb {
status = "okay";
lvds0: lvds-channel@0 {
status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usbh1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
dr_mode = "host";
disable-over-current;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
dr_mode = "otg";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
non-removable;
status = "okay";
};
&weim {
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x08000000 0x08000000>;
fsl,weim-cs-gpr = <&gpr>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_weimfpga &pinctrl_weimcs>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_hog: hoggrp {
fsl,pins = <
/* pwr mcu alert irq */
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
/* remainder ???? */
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
>;
};
pinctrl_ecspi1cs: ecspi1csgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x10068
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x10068
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x1f068
>;
};
pinctrl_ecspi3cs: ecspi3csgrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b0
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0
MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
>;
};
pinctrl_ecspi5: ecspi5grp {
fsl,pins = <
MX6QDL_PAD_SD2_CLK__ECSPI5_SCLK 0x100b1
MX6QDL_PAD_SD2_CMD__ECSPI5_MOSI 0x100b1
MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO 0x100b1
>;
};
pinctrl_ecspi5cs: ecspi5csgrp {
fsl,pins = <
MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0
MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x1b0b0
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
>;
};
pinctrl_gpminand: gpminandgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001b8b1
>;
};
pinctrl_weimcs: weimcsgrp {
fsl,pins = <
MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0xb0b1
>;
};
pinctrl_weimfpga: weimfpgagrp {
fsl,pins = <
/* weim misc */
MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0xb0b1
MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0xb0b1
MX6QDL_PAD_EIM_EB0__EIM_EB0_B 0xb0b1
MX6QDL_PAD_EIM_EB1__EIM_EB1_B 0xb0b1
MX6QDL_PAD_EIM_EB2__EIM_EB2_B 0xb0b1
MX6QDL_PAD_EIM_EB3__EIM_EB3_B 0xb0b1
/* weim data */
MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0
MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0
MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0
MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0
MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0
MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0
MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0
MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0
MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0
MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0
MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0
MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0
MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0
MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0
MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0
MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0
/* weim address */
MX6QDL_PAD_EIM_A25__EIM_ADDR25 0xb0b1
MX6QDL_PAD_EIM_A24__EIM_ADDR24 0xb0b1
MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1
MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1
MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1
MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1
MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1
MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1
MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1
MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1
MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_CLK__UART2_RTS_B 0x1b0b1
MX6QDL_PAD_SD3_CMD__UART2_CTS_B 0x1b0b1
>;
};
pinctrl_usbh1: usbh1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0
/* usbh1_b OC */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
>;
};
pinctrl_usbh1_hubreset: usbh1hubresetgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
>;
};
pinctrl_usbotgvbus: usbotgvbusgrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>;
};
};
arch/arm/boot/dts/imx6q-gk802.dts
浏览文件 @ 8a20a04b
......@@ -44,7 +44,7 @@
label = "recovery";
gpios = <&gpio3 16 1>;
linux,code = <0x198>; /* KEY_RESTART */
gpio-key,wakeup;
wakeup-source;
};
};
};
......
arch/arm/boot/dts/imx6q-icore-rqs.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright (C) 2015 Amarula Solutions B.V.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-icore-rqs.dtsi"
/ {
model = "Engicam i.CoreM6 Quad SOM";
compatible = "engicam,imx6-icore-rqs", "fsl,imx6q";
sound {
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-audio-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&i2c3 {
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
VDDD-supply = <&reg_1p8v>;
};
};
&sata {
status = "okay";
};
arch/arm/boot/dts/imx6q-tbs2910.dts
浏览文件 @ 8a20a04b
......@@ -91,34 +91,25 @@
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_2p5v: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
reg_2p5v: regulator-2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
};
reg_3p3v: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5p0v: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "5P0V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_5p0v: regulator-5p0v {
compatible = "regulator-fixed";
regulator-name = "5P0V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
sound-sgtl5000 {
......@@ -205,6 +196,10 @@
};
&sata {
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <3330>;
fsl,transmit-atten-16ths = <16>;
fsl,receive-eq-mdB = <3000>;
status = "okay";
};
......@@ -253,6 +248,9 @@
bus-width = <4>;
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
voltage-ranges = <3300 3300>;
no-1-8-v;
status = "okay";
};
......@@ -263,6 +261,9 @@
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
voltage-ranges = <3300 3300>;
no-1-8-v;
status = "okay";
};
......@@ -270,163 +271,160 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
voltage-ranges = <3300 3300>;
non-removable;
no-1-8-v;
status = "okay";
};
&iomuxc {
imx6q-tbs2910 {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
>;
};
pinctrl_hdmi: hdmigrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_gpio_fan: gpiofangrp {
fsl,pins = <
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_hdmi: hdmigrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_ir: irgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_sgtl5000: sgtl5000grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_ir: irgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
>;
};
pinctrl_spdif: spdifgrp {
fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_sgtl5000: sgtl5000grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_spdif: spdifgrp {
fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
>;
};
gpio_fan {
pinctrl_gpio_fan: gpiofangrp {
fsl,pins = <
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
>;
};
gpio_leds {
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
};
arch/arm/boot/dts/imx6q-tx6q-1110.dts
浏览文件 @ 8a20a04b
......@@ -77,7 +77,7 @@
interrupt-parent = <&gpio3>;
interrupts = <22 0>;
wakeup-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
linux,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx6q-wandboard-revb1.dts
浏览文件 @ 8a20a04b
......@@ -13,7 +13,7 @@
#include "imx6qdl-wandboard-revb1.dtsi"
/ {
model = "Wandboard i.MX6 Quad Board";
model = "Wandboard i.MX6 Quad Board rev B1";
compatible = "wand,imx6q-wandboard", "fsl,imx6q";
memory {
......
arch/arm/boot/dts/imx6q.dtsi
浏览文件 @ 8a20a04b
......@@ -22,7 +22,7 @@
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
cpu0: cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
......@@ -162,6 +162,7 @@
};
ipu2_di0_mipi: endpoint@2 {
remote-endpoint = <&mipi_mux_2>;
};
ipu2_di0_lvds0: endpoint@3 {
......@@ -183,6 +184,7 @@
};
ipu2_di1_mipi: endpoint@2 {
remote-endpoint = <&mipi_mux_3>;
};
ipu2_di1_lvds0: endpoint@3 {
......
arch/arm/boot/dts/imx6qdl-apalis.dtsi 0 → 100644
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
浏览文件 @ 8a20a04b
......@@ -94,7 +94,7 @@
label = "User button";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
gpio-key,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
浏览文件 @ 8a20a04b
......@@ -320,13 +320,13 @@
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
>;
};
......
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
浏览文件 @ 8a20a04b
......@@ -473,7 +473,7 @@
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
>;
};
......
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
浏览文件 @ 8a20a04b
......@@ -462,7 +462,7 @@
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
>;
};
......
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
浏览文件 @ 8a20a04b
......@@ -397,8 +397,9 @@
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
pinctrl-names = "default", "state_dio";
pinctrl-0 = <&pinctrl_pwm4_backlight>;
pinctrl-1 = <&pinctrl_pwm4_dio>;
status = "okay";
};
......@@ -573,12 +574,20 @@
>;
};
pinctrl_pwm4: pwm4grp {
pinctrl_pwm4_backlight: pwm4grpbacklight {
fsl,pins = <
/* LVDS_PWM J6.5 */
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
>;
};
pinctrl_pwm4_dio: pwm4grpdio {
fsl,pins = <
/* DIO3 J16.4 */
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
......
arch/arm/boot/dts/imx6qdl-gw552x.dtsi
浏览文件 @ 8a20a04b
......@@ -262,7 +262,7 @@
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
>;
};
......
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
浏览文件 @ 8a20a04b
......@@ -48,7 +48,7 @@
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio3 5 1>;
gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
};
......@@ -67,7 +67,7 @@
reg_usbh1_vbus: usb-h1-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 0>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
......@@ -78,7 +78,7 @@
reg_usbotg_vbus: usb-otg-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 0>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
......@@ -253,7 +253,7 @@
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_pcie_reset>;
reset-gpio = <&gpio3 4 0>;
reset-gpio = <&gpio3 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright (C) 2015 Amarula Solutions B.V.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
/ {
memory {
reg = <0x10000000 0x80000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "1P8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_2p5v: regulator-2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_sd3_vmmc: regulator-sd3-vmmc {
compatible = "regulator-fixed";
regulator-name = "P3V3_SD3_SWITCHED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 4 GPIO_ACTIVE_LOW>;
enable-active-high;
};
reg_sd4_vmmc: regulator-sd4-vmmc {
compatible = "regulator-fixed";
regulator-name = "P3V3_SD4_SWITCHED";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
usb_hub: usb-hub {
compatible = "smsc,usb3503a";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbhub>;
reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>;
clock-names = "refclk";
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>;
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-handle = <&eth_phy>;
phy-mode = "rgmii";
status = "okay";
mdio {
eth_phy: ethernet-phy {
rxc-skew-ps = <1140>;
txc-skew-ps = <1140>;
txen-skew-ps = <600>;
rxdv-skew-ps = <240>;
rxd0-skew-ps = <420>;
rxd1-skew-ps = <600>;
rxd2-skew-ps = <420>;
rxd3-skew-ps = <240>;
txd0-skew-ps = <60>;
txd1-skew-ps = <60>;
txd2-skew-ps = <60>;
txd3-skew-ps = <240>;
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio3 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
disable-over-current;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
no-1-8-v;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
vmcc-supply = <&reg_sd3_vmmc>;
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
bus-witdh=<4>;
no-1-8-v;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
vmcc-supply = <&reg_sd4_vmmc>;
bus-witdh=<8>;
no-1-8-v;
non-removable;
status = "okay";
};
&iomuxc {
pinctrl_audmux: audmux {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1f059 /* PCIe Reset */
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usbhub: usbhubgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1f059 /* HUB USB Reset */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17070
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17070
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17070
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1f059 /* CD */
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f059 /* PWR */
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B1
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B1
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B1
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B1
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B1
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B1
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>;
};
pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>;
};
pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>;
};
};
arch/arm/boot/dts/imx6qdl-microsom.dtsi
浏览文件 @ 8a20a04b
......@@ -154,6 +154,7 @@
bus-width = <4>;
mmc-pwrseq = <&usdhc1_pwrseq>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
vmmc-supply = <&reg_brcm>;
status = "okay";
......
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
浏览文件 @ 8a20a04b
......@@ -138,7 +138,7 @@
label = "Power Button";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
menu {
......
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
浏览文件 @ 8a20a04b
......@@ -119,7 +119,7 @@
label = "Power Button";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
menu {
......
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
浏览文件 @ 8a20a04b
......@@ -105,7 +105,7 @@
label = "Power Button";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
menu {
......
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
浏览文件 @ 8a20a04b
......@@ -79,21 +79,21 @@
power {
label = "Power Button";
gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
wakeup-source;
linux,code = <KEY_POWER>;
};
volume-up {
label = "Volume Up";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
wakeup-source;
linux,code = <KEY_VOLUMEUP>;
};
volume-down {
label = "Volume Down";
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
wakeup-source;
linux,code = <KEY_VOLUMEDOWN>;
};
};
......@@ -238,6 +238,7 @@
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw3a_reg: sw3a {
......
arch/arm/boot/dts/imx6qdl-tx6.dtsi
浏览文件 @ 8a20a04b
......@@ -41,7 +41,7 @@
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-frequency = <26000000>;
};
};
......@@ -52,7 +52,7 @@
label = "Power Button";
gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};
......@@ -227,6 +227,11 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
clocks = <&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET>,
<&clks IMX6QDL_CLK_ENET_REF>,
<&clks IMX6QDL_CLK_ENET_REF>;
clock-names = "ipg", "ahb", "ptp", "enet_out";
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
phy-supply = <&reg_3v3_etn>;
......@@ -276,7 +281,7 @@
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
linux,wakeup;
wakeup-source;
};
touchscreen: tsc2007@48 {
......@@ -288,7 +293,7 @@
interrupts = <26 0>;
gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;
ti,x-plate-ohms = <660>;
linux,wakeup;
wakeup-source;
};
};
......
arch/arm/boot/dts/imx6qdl-udoo.dtsi
浏览文件 @ 8a20a04b
......@@ -34,6 +34,18 @@
gpio = <&gpio7 12 0>;
};
};
sound {
compatible = "fsl,imx6q-udoo-ac97",
"fsl,imx-audio-ac97";
model = "fsl,imx6q-udoo-ac97";
audio-cpu = <&ssi1>;
audio-routing =
"RX", "Mic Jack",
"Headphone Jack", "TX";
mux-int-port = <1>;
mux-ext-port = <6>;
};
};
&fec {
......@@ -109,6 +121,36 @@
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
pinctrl_ac97_running: ac97running {
fsl,pins = <
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>;
};
pinctrl_ac97_warm_reset: ac97warmreset {
fsl,pins = <
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>;
};
pinctrl_ac97_reset: ac97reset {
fsl,pins = <
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>;
};
};
};
......@@ -132,3 +174,18 @@
non-removable;
status = "okay";
};
&audmux {
status = "okay";
};
&ssi1 {
cell-index = <0>;
fsl,mode = "ac97-slave";
pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
pinctrl-0 = <&pinctrl_ac97_running>;
pinctrl-1 = <&pinctrl_ac97_reset>;
pinctrl-2 = <&pinctrl_ac97_warm_reset>;
ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
status = "okay";
};
arch/arm/boot/dts/imx6qdl.dtsi
浏览文件 @ 8a20a04b
......@@ -261,7 +261,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI1>,
<&clks IMX6QDL_CLK_ECSPI1>;
clock-names = "ipg", "per";
dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
dmas = <&sdma 3 8 1>, <&sdma 4 8 2>;
dma-names = "rx", "tx";
status = "disabled";
};
......@@ -275,7 +275,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI2>,
<&clks IMX6QDL_CLK_ECSPI2>;
clock-names = "ipg", "per";
dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
dmas = <&sdma 5 8 1>, <&sdma 6 8 2>;
dma-names = "rx", "tx";
status = "disabled";
};
......@@ -289,7 +289,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI3>,
<&clks IMX6QDL_CLK_ECSPI3>;
clock-names = "ipg", "per";
dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
dmas = <&sdma 7 8 1>, <&sdma 8 8 2>;
dma-names = "rx", "tx";
status = "disabled";
};
......@@ -303,7 +303,7 @@
clocks = <&clks IMX6QDL_CLK_ECSPI4>,
<&clks IMX6QDL_CLK_ECSPI4>;
clock-names = "ipg", "per";
dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
dmas = <&sdma 9 8 1>, <&sdma 10 8 2>;
dma-names = "rx", "tx";
status = "disabled";
};
......
arch/arm/boot/dts/imx6qp-sabreauto.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6qp.dtsi"
#include "imx6qdl-sabreauto.dtsi"
/ {
model = "Freescale i.MX6 Quad Plus SABRE Automotive Board";
compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp";
};
&i2c2 {
max7322: gpio@68 {
compatible = "maxim,max7322";
reg = <0x68>;
gpio-controller;
#gpio-cells = <2>;
};
};
&iomuxc {
imx6qdl-sabreauto {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b018
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b018
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b018
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b018
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b018
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b018
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b018
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b018
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b018
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b018
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b018
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b018
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
};
};
&pcie {
status = "disabled";
};
&vgen3_reg {
regulator-always-on;
};
arch/arm/boot/dts/imx6qp-sabresd.dts 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6qp.dtsi"
#include "imx6qdl-sabresd.dtsi"
/ {
model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
};
&cpu0 {
arm-supply = <&sw2_reg>;
};
&iomuxc {
imx6qdl-sabresd {
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};
};
&pcie {
status = "disabled";
};
arch/arm/boot/dts/imx6qp.dtsi 0 → 100644
浏览文件 @ 8a20a04b
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx6q.dtsi"
/ {
soc {
ocram2: sram@00940000 {
compatible = "mmio-sram";
reg = <0x00940000 0x20000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
ocram3: sram@00960000 {
compatible = "mmio-sram";
reg = <0x00960000 0x20000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
ipu1: ipu@02400000 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
clocks = <&clks IMX6QDL_CLK_IPU1>,
<&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
<&clks IMX6QDL_CLK_PRG0_APB>;
clock-names = "bus",
"di0", "di1",
"di0_sel", "di1_sel",
"ldb_di0", "ldb_di1", "prg";
};
ipu2: ipu@02800000 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
clocks = <&clks IMX6QDL_CLK_IPU2>,
<&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
<&clks IMX6QDL_CLK_PRG1_APB>;
clock-names = "bus",
"di0", "di1",
"di0_sel", "di1_sel",
"ldb_di0", "ldb_di1", "prg";
};
};
};
arch/arm/boot/dts/imx6sl-warp.dts
浏览文件 @ 8a20a04b
......@@ -118,7 +118,7 @@
bus-width = <4>;
non-removable;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
mmc-pwrseq = <&usdhc3_pwrseq>;
status = "okay";
};
......
arch/arm/boot/dts/imx6sx-sabreauto.dts
浏览文件 @ 8a20a04b
......@@ -52,7 +52,7 @@
cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
vmmc-supply = <&vcc_sd3>;
status = "okay";
};
......
arch/arm/boot/dts/imx6sx-sdb.dtsi
浏览文件 @ 8a20a04b
......@@ -184,6 +184,13 @@
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default";
......@@ -283,7 +290,7 @@
non-removable;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
status = "okay";
};
......@@ -296,7 +303,7 @@
cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
vmmc-supply = <&vcc_sd3>;
status = "okay";
};
......@@ -378,6 +385,13 @@
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
......
arch/arm/boot/dts/imx6ul-14x14-evk.dts
浏览文件 @ 8a20a04b
......@@ -8,7 +8,6 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ul.dtsi"
/ {
......@@ -131,7 +130,7 @@
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
vmmc-supply = <&reg_sd1_vmmc>;
status = "okay";
};
......@@ -141,7 +140,7 @@
pinctrl-0 = <&pinctrl_usdhc2>;
no-1-8-v;
keep-power-in-suspend;
enable-sdio-wakeup;
wakeup-source;
status = "okay";
};
......
arch/arm/boot/dts/imx6ul-pinfunc.h
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/imx6ul.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/imx7d-sbc-imx7.dts
浏览文件 @ 8a20a04b
......@@ -22,7 +22,7 @@
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
enable-sdio-wakeup;
wakeup-source;
status = "okay";
};
......
arch/arm/boot/dts/imx7d-sdb.dts
浏览文件 @ 8a20a04b
......@@ -296,7 +296,7 @@
pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
enable-sdio-wakeup;
wakeup-source;
keep-power-in-suspend;
status = "okay";
};
......
arch/arm/boot/dts/imx7d.dtsi
浏览文件 @ 8a20a04b
......@@ -119,6 +119,15 @@
clock-output-names = "osc";
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&intc>;
};
etr@30086000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x30086000 0x1000>;
......
arch/arm/boot/dts/ls1021a.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
浏览文件 @ 8a20a04b
......@@ -72,14 +72,6 @@
};
};
&extbus {
ranges = <1 0x00000000 0x42000000 0x02000000>;
};
&support_card {
ranges = <0x00000000 1 0x01f00000 0x00100000>;
};
&ethsc {
interrupts = <0 49 4>;
};
......
arch/arm/boot/dts/uniphier-ph1-pro4-ace.dts 0 → 100644
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/uniphier-ph1-pro4-sanji.dts 0 → 100644
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/vf-colibri.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/vf500.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/vf610-twr.dts
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/vf610.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
arch/arm/boot/dts/vfxxx.dtsi
浏览文件 @ 8a20a04b
此差异已折叠。
Markdown is supported
0% 或 .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑！
想要评论请 注册 或