提交 8717433c 编写于 作者: R Ralf Baechle

[MIPS] IP27: Don't destroy interrupt routing information on shutdown irq.

This fixes the "not syncing: Could not identify cpu/level ..." panic
when a PCI irq is requested the second time.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 25969354
...@@ -296,7 +296,6 @@ static void shutdown_bridge_irq(unsigned int irq) ...@@ -296,7 +296,6 @@ static void shutdown_bridge_irq(unsigned int irq)
struct bridge_controller *bc = IRQ_TO_BRIDGE(irq); struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu)); struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
bridge_t *bridge = bc->base; bridge_t *bridge = bc->base;
struct slice_data *si = cpu_data[bc->irq_cpu].data;
int pin, swlevel; int pin, swlevel;
cpuid_t cpu; cpuid_t cpu;
...@@ -311,7 +310,6 @@ static void shutdown_bridge_irq(unsigned int irq) ...@@ -311,7 +310,6 @@ static void shutdown_bridge_irq(unsigned int irq)
intr_disconnect_level(cpu, swlevel); intr_disconnect_level(cpu, swlevel);
__clear_bit(swlevel, hub->irq_alloc_mask); __clear_bit(swlevel, hub->irq_alloc_mask);
si->level_to_irq[swlevel] = -1;
bridge->b_int_enable &= ~(1 << pin); bridge->b_int_enable &= ~(1 << pin);
bridge->b_wid_tflush; bridge->b_wid_tflush;
......
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