ACPICA: Change handling of PM1 Status register ignored bit
Ignored bits must be preserved according to the ACPI spec. Usually this means a read/modify/write when writing to the register. However, for status registers, writing a one means clear the event. Writing a zero means preserve the event (do not clear.) This behavior is clarified in the ACPI 4.0 spec, and the ACPICA code now simply always writes a zero to the ignored bit. Signed-off-by: NBob Moore <robert.moore@intel.com> Signed-off-by: NLin Ming <ming.m.lin@intel.com> Signed-off-by: NLen Brown <len.brown@intel.com>
Showing
想要评论请 注册 或 登录