imx-drm: match ipu_di_signal_cfg's clk_pol with its description.
According to the datasheet, setting the di0_polarity_disp_clk field in the GENERAL di register sets the output clock polarity to active high. Signed-off-by: NDenis Carikli <denis@eukrea.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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