提交 808fc878 编写于 作者: I Ingo Molnar

x86, VisWS: turn into generic arch, update asm-x86/mach-visws/mach_apic.h

update asm-x86/mach-visws/mach_apic.h to the generic version.
Signed-off-by: NIngo Molnar <mingo@elte.hu>
上级 5548ed11
#ifndef __ASM_MACH_APIC_H
#define __ASM_MACH_APIC_H
#ifdef CONFIG_X86_LOCAL_APIC
#include <mach_apicdef.h>
#include <asm/smp.h>
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define no_balance_irq (0)
#define esr_disable (0)
#define INT_DELIVERY_MODE dest_LowestPrio
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
static inline cpumask_t target_cpus(void)
{
#ifdef CONFIG_SMP
#define TARGET_CPUS cpu_online_map
return cpu_online_map;
#else
#define TARGET_CPUS cpumask_of_cpu(0)
return cpumask_of_cpu(0);
#endif
}
#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
static inline int apic_id_registered(void)
{
return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map);
}
#define NO_BALANCE_IRQ (0)
#define esr_disable (0)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
#define INT_DEST_MODE (genapic->int_dest_mode)
#define TARGET_CPUS (genapic->target_cpus())
#define apic_id_registered (genapic->apic_id_registered)
#define init_apic_ldr (genapic->init_apic_ldr)
#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
#define phys_pkg_id (genapic->phys_pkg_id)
#define vector_allocation_domain (genapic->vector_allocation_domain)
extern void setup_apic_routing(void);
#else
#define INT_DELIVERY_MODE dest_LowestPrio
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
#define TARGET_CPUS (target_cpus())
/*
* Set up the logical destination ID.
*
......@@ -43,15 +52,55 @@ static inline void init_apic_ldr(void)
apic_write_around(APIC_LDR, val);
}
static inline void summit_check(char *oem, char *productid)
static inline int apic_id_registered(void)
{
return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map);
}
static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
{
return cpus_addr(cpumask)[0];
}
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
{
return cpuid_apic >> index_msb;
}
static inline void setup_apic_routing(void)
{
#ifdef CONFIG_X86_IO_APIC
printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
"Flat", nr_ioapics);
#endif
}
static inline int apicid_to_node(int logical_apicid)
{
#ifdef CONFIG_SMP
return apicid_2_node[hard_smp_processor_id()];
#else
return 0;
#endif
}
#endif
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
return physid_isset(apicid, bitmap);
}
static inline unsigned long check_apicid_present(int bit)
{
return physid_isset(bit, phys_cpu_present_map);
}
static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
{
return phys_map;
}
static inline int multi_timer_check(int apic, int irq)
{
return 0;
}
......@@ -64,40 +113,29 @@ static inline int cpu_to_logical_apicid(int cpu)
static inline int cpu_present_to_apicid(int mps_cpu)
{
if (mps_cpu < get_physical_broadcast())
return mps_cpu;
if (mps_cpu < NR_CPUS && cpu_present(mps_cpu))
return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
else
return BAD_APICID;
}
static inline physid_mask_t apicid_to_cpu_present(int apicid)
static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
{
return physid_mask_of_physid(apicid);
return physid_mask_of_physid(phys_apicid);
}
#define WAKE_SECONDARY_VIA_INIT
static inline void setup_portio_remap(void)
{
}
static inline void enable_apic_mode(void)
{
}
static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
{
return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
}
static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
{
return cpus_addr(cpumask)[0];
}
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
static inline void enable_apic_mode(void)
{
return cpuid_apic >> index_msb;
}
#endif /* CONFIG_X86_LOCAL_APIC */
#endif /* __ASM_MACH_APIC_H */
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