提交 80301cdc 编写于 作者: K Kalle Valo 提交者: John W. Linville

wl1251: use wl1251 prefix everywhere

Last we can change all code prefixes from wl12xx/WL12XX to
wl1251/WL1251.
Signed-off-by: NKalle Valo <kalle.valo@nokia.com>
Reviewed-by: NVidhya Govindan <vidhya.govindan@nokia.com>
Reviewed-by: NLuciano Coelho <luciano.coelho@nokia.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 1e6f172f
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008-2009 Nokia Corporation
......@@ -22,15 +22,15 @@
*
*/
#ifndef __WL12XX_H__
#define __WL12XX_H__
#ifndef __WL1251_H__
#define __WL1251_H__
#include <linux/mutex.h>
#include <linux/list.h>
#include <linux/bitops.h>
#include <net/mac80211.h>
#define DRIVER_NAME "wl12xx"
#define DRIVER_NAME "wl1251"
#define DRIVER_PREFIX DRIVER_NAME ": "
enum {
......@@ -56,25 +56,25 @@ enum {
#define DEBUG_DUMP_LIMIT 1024
#define wl12xx_error(fmt, arg...) \
#define wl1251_error(fmt, arg...) \
printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
#define wl12xx_warning(fmt, arg...) \
#define wl1251_warning(fmt, arg...) \
printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
#define wl12xx_notice(fmt, arg...) \
#define wl1251_notice(fmt, arg...) \
printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
#define wl12xx_info(fmt, arg...) \
#define wl1251_info(fmt, arg...) \
printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
#define wl12xx_debug(level, fmt, arg...) \
#define wl1251_debug(level, fmt, arg...) \
do { \
if (level & DEBUG_LEVEL) \
printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
} while (0)
#define wl12xx_dump(level, prefix, buf, len) \
#define wl1251_dump(level, prefix, buf, len) \
do { \
if (level & DEBUG_LEVEL) \
print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
......@@ -84,7 +84,7 @@ enum {
0); \
} while (0)
#define wl12xx_dump_ascii(level, prefix, buf, len) \
#define wl1251_dump_ascii(level, prefix, buf, len) \
do { \
if (level & DEBUG_LEVEL) \
print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
......@@ -94,10 +94,10 @@ enum {
true); \
} while (0)
#define WL12XX_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
#define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
CFG_BSSID_FILTER_EN)
#define WL12XX_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
#define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \
CFG_RX_MGMT_EN | \
CFG_RX_DATA_EN | \
CFG_RX_CTL_EN | \
......@@ -105,7 +105,7 @@ enum {
CFG_RX_AUTH_EN | \
CFG_RX_ASSOC_EN)
#define WL12XX_BUSY_WORD_LEN 8
#define WL1251_BUSY_WORD_LEN 8
struct boot_attr {
u32 radio_type;
......@@ -117,13 +117,13 @@ struct boot_attr {
u32 bugfix;
};
enum wl12xx_state {
WL12XX_STATE_OFF,
WL12XX_STATE_ON,
WL12XX_STATE_PLT,
enum wl1251_state {
WL1251_STATE_OFF,
WL1251_STATE_ON,
WL1251_STATE_PLT,
};
enum wl12xx_partition_type {
enum wl1251_partition_type {
PART_DOWN,
PART_WORK,
PART_DRPW,
......@@ -131,20 +131,20 @@ enum wl12xx_partition_type {
PART_TABLE_LEN
};
struct wl12xx_partition {
struct wl1251_partition {
u32 size;
u32 start;
};
struct wl12xx_partition_set {
struct wl12xx_partition mem;
struct wl12xx_partition reg;
struct wl1251_partition_set {
struct wl1251_partition mem;
struct wl1251_partition reg;
};
struct wl12xx;
struct wl1251;
/* FIXME: I'm not sure about this structure name */
struct wl12xx_chip {
struct wl1251_chip {
u32 id;
const char *fw_filename;
......@@ -156,23 +156,23 @@ struct wl12xx_chip {
int intr_cmd_complete;
int intr_init_complete;
int (*op_upload_fw)(struct wl12xx *wl);
int (*op_upload_nvs)(struct wl12xx *wl);
int (*op_boot)(struct wl12xx *wl);
void (*op_set_ecpu_ctrl)(struct wl12xx *wl, u32 flag);
void (*op_target_enable_interrupts)(struct wl12xx *wl);
int (*op_hw_init)(struct wl12xx *wl);
int (*op_plt_init)(struct wl12xx *wl);
void (*op_tx_flush)(struct wl12xx *wl);
void (*op_fw_version)(struct wl12xx *wl);
int (*op_cmd_join)(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
int (*op_upload_fw)(struct wl1251 *wl);
int (*op_upload_nvs)(struct wl1251 *wl);
int (*op_boot)(struct wl1251 *wl);
void (*op_set_ecpu_ctrl)(struct wl1251 *wl, u32 flag);
void (*op_target_enable_interrupts)(struct wl1251 *wl);
int (*op_hw_init)(struct wl1251 *wl);
int (*op_plt_init)(struct wl1251 *wl);
void (*op_tx_flush)(struct wl1251 *wl);
void (*op_fw_version)(struct wl1251 *wl);
int (*op_cmd_join)(struct wl1251 *wl, u8 bss_type, u8 dtim_interval,
u16 beacon_interval, u8 wait);
struct wl12xx_partition_set *p_table;
struct wl1251_partition_set *p_table;
enum wl12xx_acx_int_reg *acx_reg_table;
};
struct wl12xx_stats {
struct wl1251_stats {
struct acx_statistics *fw_stats;
unsigned long fw_stats_update;
......@@ -180,7 +180,7 @@ struct wl12xx_stats {
unsigned int excessive_retries;
};
struct wl12xx_debugfs {
struct wl1251_debugfs {
struct dentry *rootdir;
struct dentry *fw_statistics;
......@@ -281,7 +281,7 @@ struct wl12xx_debugfs {
struct dentry *excessive_retries;
};
struct wl12xx {
struct wl1251 {
struct ieee80211_hw *hw;
bool mac80211_registered;
......@@ -290,7 +290,7 @@ struct wl12xx {
void (*set_power)(bool enable);
int irq;
enum wl12xx_state state;
enum wl1251_state state;
struct mutex mutex;
int physical_mem_addr;
......@@ -298,7 +298,7 @@ struct wl12xx {
int virtual_mem_addr;
int virtual_reg_addr;
struct wl12xx_chip chip;
struct wl1251_chip chip;
int cmd_box_addr;
int event_box_addr;
......@@ -385,31 +385,31 @@ struct wl12xx {
/* in dBm */
int power_level;
struct wl12xx_stats stats;
struct wl12xx_debugfs debugfs;
struct wl1251_stats stats;
struct wl1251_debugfs debugfs;
u32 buffer_32;
u32 buffer_cmd;
u8 buffer_busyword[WL12XX_BUSY_WORD_LEN];
struct wl12xx_rx_descriptor *rx_descriptor;
u8 buffer_busyword[WL1251_BUSY_WORD_LEN];
struct wl1251_rx_descriptor *rx_descriptor;
};
int wl12xx_plt_start(struct wl12xx *wl);
int wl12xx_plt_stop(struct wl12xx *wl);
int wl1251_plt_start(struct wl1251 *wl);
int wl1251_plt_stop(struct wl1251 *wl);
#define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */
#define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS
#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
#define WL12XX_DEFAULT_POWER_LEVEL 20
#define WL1251_DEFAULT_POWER_LEVEL 20
#define WL12XX_TX_QUEUE_MAX_LENGTH 20
#define WL1251_TX_QUEUE_MAX_LENGTH 20
/* Different chips need different sleep times after power on. WL1271 needs
* 200ms, WL1251 needs only 10ms. By default we use 200ms, but as soon as we
* know the chip ID, we change the sleep value in the wl12xx chip structure,
* know the chip ID, we change the sleep value in the wl1251 chip structure,
* so in subsequent power ons, we don't waste more time then needed. */
#define WL12XX_DEFAULT_POWER_ON_SLEEP 200
#define WL1251_DEFAULT_POWER_ON_SLEEP 200
#define CHIP_ID_1251_PG10 (0x7010101)
#define CHIP_ID_1251_PG11 (0x7020101)
......
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -22,15 +22,15 @@
*
*/
#ifndef __WL12XX_ACX_H__
#define __WL12XX_ACX_H__
#ifndef __WL1251_ACX_H__
#define __WL1251_ACX_H__
#include "wl1251.h"
#include "wl1251_cmd.h"
/* Target's information element */
struct acx_header {
struct wl12xx_cmd_header cmd;
struct wl1251_cmd_header cmd;
/* acx (or information element) header */
u16 id;
......@@ -91,15 +91,15 @@ struct acx_revision {
u32 hw_version;
} __attribute__ ((packed));
enum wl12xx_psm_mode {
enum wl1251_psm_mode {
/* Active mode */
WL12XX_PSM_CAM = 0,
WL1251_PSM_CAM = 0,
/* Power save mode */
WL12XX_PSM_PS = 1,
WL1251_PSM_PS = 1,
/* Extreme low power */
WL12XX_PSM_ELP = 2,
WL1251_PSM_ELP = 2,
};
struct acx_sleep_auth {
......@@ -1108,39 +1108,39 @@ enum {
};
int wl12xx_acx_frame_rates(struct wl12xx *wl, u8 ctrl_rate, u8 ctrl_mod,
int wl1251_acx_frame_rates(struct wl1251 *wl, u8 ctrl_rate, u8 ctrl_mod,
u8 mgt_rate, u8 mgt_mod);
int wl12xx_acx_station_id(struct wl12xx *wl);
int wl12xx_acx_default_key(struct wl12xx *wl, u8 key_id);
int wl12xx_acx_wake_up_conditions(struct wl12xx *wl, u8 wake_up_event,
int wl1251_acx_station_id(struct wl1251 *wl);
int wl1251_acx_default_key(struct wl1251 *wl, u8 key_id);
int wl1251_acx_wake_up_conditions(struct wl1251 *wl, u8 wake_up_event,
u8 listen_interval);
int wl12xx_acx_sleep_auth(struct wl12xx *wl, u8 sleep_auth);
int wl12xx_acx_fw_version(struct wl12xx *wl, char *buf, size_t len);
int wl12xx_acx_tx_power(struct wl12xx *wl, int power);
int wl12xx_acx_feature_cfg(struct wl12xx *wl);
int wl12xx_acx_mem_map(struct wl12xx *wl,
int wl1251_acx_sleep_auth(struct wl1251 *wl, u8 sleep_auth);
int wl1251_acx_fw_version(struct wl1251 *wl, char *buf, size_t len);
int wl1251_acx_tx_power(struct wl1251 *wl, int power);
int wl1251_acx_feature_cfg(struct wl1251 *wl);
int wl1251_acx_mem_map(struct wl1251 *wl,
struct acx_header *mem_map, size_t len);
int wl12xx_acx_data_path_params(struct wl12xx *wl,
int wl1251_acx_data_path_params(struct wl1251 *wl,
struct acx_data_path_params_resp *data_path);
int wl12xx_acx_rx_msdu_life_time(struct wl12xx *wl, u32 life_time);
int wl12xx_acx_rx_config(struct wl12xx *wl, u32 config, u32 filter);
int wl12xx_acx_pd_threshold(struct wl12xx *wl);
int wl12xx_acx_slot(struct wl12xx *wl, enum acx_slot_type slot_time);
int wl12xx_acx_group_address_tbl(struct wl12xx *wl);
int wl12xx_acx_service_period_timeout(struct wl12xx *wl);
int wl12xx_acx_rts_threshold(struct wl12xx *wl, u16 rts_threshold);
int wl12xx_acx_beacon_filter_opt(struct wl12xx *wl);
int wl12xx_acx_beacon_filter_table(struct wl12xx *wl);
int wl12xx_acx_sg_enable(struct wl12xx *wl);
int wl12xx_acx_sg_cfg(struct wl12xx *wl);
int wl12xx_acx_cca_threshold(struct wl12xx *wl);
int wl12xx_acx_bcn_dtim_options(struct wl12xx *wl);
int wl12xx_acx_aid(struct wl12xx *wl, u16 aid);
int wl12xx_acx_event_mbox_mask(struct wl12xx *wl, u32 event_mask);
int wl12xx_acx_set_preamble(struct wl12xx *wl, enum acx_preamble_type preamble);
int wl12xx_acx_cts_protect(struct wl12xx *wl,
int wl1251_acx_rx_msdu_life_time(struct wl1251 *wl, u32 life_time);
int wl1251_acx_rx_config(struct wl1251 *wl, u32 config, u32 filter);
int wl1251_acx_pd_threshold(struct wl1251 *wl);
int wl1251_acx_slot(struct wl1251 *wl, enum acx_slot_type slot_time);
int wl1251_acx_group_address_tbl(struct wl1251 *wl);
int wl1251_acx_service_period_timeout(struct wl1251 *wl);
int wl1251_acx_rts_threshold(struct wl1251 *wl, u16 rts_threshold);
int wl1251_acx_beacon_filter_opt(struct wl1251 *wl);
int wl1251_acx_beacon_filter_table(struct wl1251 *wl);
int wl1251_acx_sg_enable(struct wl1251 *wl);
int wl1251_acx_sg_cfg(struct wl1251 *wl);
int wl1251_acx_cca_threshold(struct wl1251 *wl);
int wl1251_acx_bcn_dtim_options(struct wl1251 *wl);
int wl1251_acx_aid(struct wl1251 *wl, u16 aid);
int wl1251_acx_event_mbox_mask(struct wl1251 *wl, u32 event_mask);
int wl1251_acx_set_preamble(struct wl1251 *wl, enum acx_preamble_type preamble);
int wl1251_acx_cts_protect(struct wl1251 *wl,
enum acx_ctsprotect_type ctsprotect);
int wl12xx_acx_statistics(struct wl12xx *wl, struct acx_statistics *stats);
int wl12xx_acx_tsf_info(struct wl12xx *wl, u64 *mactime);
int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats);
int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime);
#endif /* __WL12XX_ACX_H__ */
#endif /* __WL1251_ACX_H__ */
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2008 Nokia Corporation
*
......@@ -28,37 +28,37 @@
#include "wl1251_spi.h"
#include "wl1251_event.h"
static void wl12xx_boot_enable_interrupts(struct wl12xx *wl)
static void wl1251_boot_enable_interrupts(struct wl1251 *wl)
{
enable_irq(wl->irq);
}
void wl12xx_boot_target_enable_interrupts(struct wl12xx *wl)
void wl1251_boot_target_enable_interrupts(struct wl1251 *wl)
{
wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
wl12xx_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
wl1251_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
}
int wl12xx_boot_soft_reset(struct wl12xx *wl)
int wl1251_boot_soft_reset(struct wl1251 *wl)
{
unsigned long timeout;
u32 boot_data;
/* perform soft reset */
wl12xx_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
wl1251_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
/* SOFT_RESET is self clearing */
timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);
while (1) {
boot_data = wl12xx_reg_read32(wl, ACX_REG_SLV_SOFT_RESET);
wl12xx_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);
boot_data = wl1251_reg_read32(wl, ACX_REG_SLV_SOFT_RESET);
wl1251_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);
if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0)
break;
if (time_after(jiffies, timeout)) {
/* 1.2 check pWhalBus->uSelfClearTime if the
* timeout was reached */
wl12xx_error("soft reset timeout");
wl1251_error("soft reset timeout");
return -1;
}
......@@ -66,15 +66,15 @@ int wl12xx_boot_soft_reset(struct wl12xx *wl)
}
/* disable Rx/Tx */
wl12xx_reg_write32(wl, ENABLE, 0x0);
wl1251_reg_write32(wl, ENABLE, 0x0);
/* disable auto calibration on start*/
wl12xx_reg_write32(wl, SPARE_A2, 0xffff);
wl1251_reg_write32(wl, SPARE_A2, 0xffff);
return 0;
}
int wl12xx_boot_init_seq(struct wl12xx *wl)
int wl1251_boot_init_seq(struct wl1251 *wl)
{
u32 scr_pad6, init_data, tmp, elp_cmd, ref_freq;
......@@ -96,23 +96,23 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
};
/* read NVS params */
scr_pad6 = wl12xx_reg_read32(wl, SCR_PAD6);
wl12xx_debug(DEBUG_BOOT, "scr_pad6 0x%x", scr_pad6);
scr_pad6 = wl1251_reg_read32(wl, SCR_PAD6);
wl1251_debug(DEBUG_BOOT, "scr_pad6 0x%x", scr_pad6);
/* read ELP_CMD */
elp_cmd = wl12xx_reg_read32(wl, ELP_CMD);
wl12xx_debug(DEBUG_BOOT, "elp_cmd 0x%x", elp_cmd);
elp_cmd = wl1251_reg_read32(wl, ELP_CMD);
wl1251_debug(DEBUG_BOOT, "elp_cmd 0x%x", elp_cmd);
/* set the BB calibration time to be 300 usec (PLL_CAL_TIME) */
ref_freq = scr_pad6 & 0x000000FF;
wl12xx_debug(DEBUG_BOOT, "ref_freq 0x%x", ref_freq);
wl1251_debug(DEBUG_BOOT, "ref_freq 0x%x", ref_freq);
wl12xx_reg_write32(wl, PLL_CAL_TIME, 0x9);
wl1251_reg_write32(wl, PLL_CAL_TIME, 0x9);
/*
* PG 1.2: set the clock buffer time to be 210 usec (CLK_BUF_TIME)
*/
wl12xx_reg_write32(wl, CLK_BUF_TIME, 0x6);
wl1251_reg_write32(wl, CLK_BUF_TIME, 0x6);
/*
* set the clock detect feature to work in the restart wu procedure
......@@ -120,18 +120,18 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
* (ELP_CFG_MODE[13:12])
*/
tmp = ((scr_pad6 & 0x0000FF00) << 4) | 0x00004000;
wl12xx_reg_write32(wl, ELP_CFG_MODE, tmp);
wl1251_reg_write32(wl, ELP_CFG_MODE, tmp);
/* PG 1.2: enable the BB PLL fix. Enable the PLL_LIMP_CLK_EN_CMD */
elp_cmd |= 0x00000040;
wl12xx_reg_write32(wl, ELP_CMD, elp_cmd);
wl1251_reg_write32(wl, ELP_CMD, elp_cmd);
/* PG 1.2: Set the BB PLL stable time to be 1000usec
* (PLL_STABLE_TIME) */
wl12xx_reg_write32(wl, CFG_PLL_SYNC_CNT, 0x20);
wl1251_reg_write32(wl, CFG_PLL_SYNC_CNT, 0x20);
/* PG 1.2: read clock request time */
init_data = wl12xx_reg_read32(wl, CLK_REQ_TIME);
init_data = wl1251_reg_read32(wl, CLK_REQ_TIME);
/*
* PG 1.2: set the clock request time to be ref_clk_settling_time -
......@@ -141,35 +141,35 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
tmp = init_data - 0x21;
else
tmp = 0;
wl12xx_reg_write32(wl, CLK_REQ_TIME, tmp);
wl1251_reg_write32(wl, CLK_REQ_TIME, tmp);
/* set BB PLL configurations in RF AFE */
wl12xx_reg_write32(wl, 0x003058cc, 0x4B5);
wl1251_reg_write32(wl, 0x003058cc, 0x4B5);
/* set RF_AFE_REG_5 */
wl12xx_reg_write32(wl, 0x003058d4, 0x50);
wl1251_reg_write32(wl, 0x003058d4, 0x50);
/* set RF_AFE_CTRL_REG_2 */
wl12xx_reg_write32(wl, 0x00305948, 0x11c001);
wl1251_reg_write32(wl, 0x00305948, 0x11c001);
/*
* change RF PLL and BB PLL divider for VCO clock and adjust VCO
* bais current(RF_AFE_REG_13)
*/
wl12xx_reg_write32(wl, 0x003058f4, 0x1e);
wl1251_reg_write32(wl, 0x003058f4, 0x1e);
/* set BB PLL configurations */
tmp = LUT[ref_freq][LUT_PARAM_INTEGER_DIVIDER] | 0x00017000;
wl12xx_reg_write32(wl, 0x00305840, tmp);
wl1251_reg_write32(wl, 0x00305840, tmp);
/* set fractional divider according to Appendix C-BB PLL
* Calculations
*/
tmp = LUT[ref_freq][LUT_PARAM_FRACTIONAL_DIVIDER];
wl12xx_reg_write32(wl, 0x00305844, tmp);
wl1251_reg_write32(wl, 0x00305844, tmp);
/* set the initial data for the sigma delta */
wl12xx_reg_write32(wl, 0x00305848, 0x3039);
wl1251_reg_write32(wl, 0x00305848, 0x3039);
/*
* set the accumulator attenuation value, calibration loop1
......@@ -178,14 +178,14 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
*/
tmp = (LUT[ref_freq][LUT_PARAM_ATTN_BB] << 16) |
(LUT[ref_freq][LUT_PARAM_ALPHA_BB] << 12) | 0x1;
wl12xx_reg_write32(wl, 0x00305854, tmp);
wl1251_reg_write32(wl, 0x00305854, tmp);
/*
* set the calibration stop time after holdoff time expires and set
* settling time HOLD_OFF_TIME_BB
*/
tmp = LUT[ref_freq][LUT_PARAM_STOP_TIME_BB] | 0x000A0000;
wl12xx_reg_write32(wl, 0x00305858, tmp);
wl1251_reg_write32(wl, 0x00305858, tmp);
/*
* set BB PLL Loop filter capacitor3- BB_C3[2:0] and set BB PLL
......@@ -193,7 +193,7 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
* BB_ILOOPF[7:3]
*/
tmp = LUT[ref_freq][LUT_PARAM_BB_PLL_LOOP_FILTER] | 0x00000030;
wl12xx_reg_write32(wl, 0x003058f8, tmp);
wl1251_reg_write32(wl, 0x003058f8, tmp);
/*
* set regulator output voltage for n divider to
......@@ -201,10 +201,10 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
* set BB PLL Loop filter capacitor2- BB_C2[7:5], set gain of BB
* PLL auto-call to normal mode- BB_CALGAIN_3DB[8]
*/
wl12xx_reg_write32(wl, 0x003058f0, 0x29);
wl1251_reg_write32(wl, 0x003058f0, 0x29);
/* enable restart wakeup sequence (ELP_CMD[0]) */
wl12xx_reg_write32(wl, ELP_CMD, elp_cmd | 0x1);
wl1251_reg_write32(wl, ELP_CMD, elp_cmd | 0x1);
/* restart sequence completed */
udelay(2000);
......@@ -212,19 +212,19 @@ int wl12xx_boot_init_seq(struct wl12xx *wl)
return 0;
}
int wl12xx_boot_run_firmware(struct wl12xx *wl)
int wl1251_boot_run_firmware(struct wl1251 *wl)
{
int loop, ret;
u32 chip_id, interrupt;
wl->chip.op_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
chip_id = wl12xx_reg_read32(wl, CHIP_ID_B);
chip_id = wl1251_reg_read32(wl, CHIP_ID_B);
wl12xx_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
wl1251_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
if (chip_id != wl->chip.id) {
wl12xx_error("chip id doesn't match after firmware boot");
wl1251_error("chip id doesn't match after firmware boot");
return -EIO;
}
......@@ -232,41 +232,41 @@ int wl12xx_boot_run_firmware(struct wl12xx *wl)
loop = 0;
while (loop++ < INIT_LOOP) {
udelay(INIT_LOOP_DELAY);
interrupt = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
interrupt = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
if (interrupt == 0xffffffff) {
wl12xx_error("error reading hardware complete "
wl1251_error("error reading hardware complete "
"init indication");
return -EIO;
}
/* check that ACX_INTR_INIT_COMPLETE is enabled */
else if (interrupt & wl->chip.intr_init_complete) {
wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
wl->chip.intr_init_complete);
break;
}
}
if (loop >= INIT_LOOP) {
wl12xx_error("timeout waiting for the hardware to "
wl1251_error("timeout waiting for the hardware to "
"complete initialization");
return -EIO;
}
/* get hardware config command mail box */
wl->cmd_box_addr = wl12xx_reg_read32(wl, REG_COMMAND_MAILBOX_PTR);
wl->cmd_box_addr = wl1251_reg_read32(wl, REG_COMMAND_MAILBOX_PTR);
/* get hardware config event mail box */
wl->event_box_addr = wl12xx_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
wl->event_box_addr = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
/* set the working partition to its "running" mode offset */
wl12xx_set_partition(wl,
wl1251_set_partition(wl,
wl->chip.p_table[PART_WORK].mem.start,
wl->chip.p_table[PART_WORK].mem.size,
wl->chip.p_table[PART_WORK].reg.start,
wl->chip.p_table[PART_WORK].reg.size);
wl12xx_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",
wl1251_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",
wl->cmd_box_addr, wl->event_box_addr);
wl->chip.op_fw_version(wl);
......@@ -277,20 +277,20 @@ int wl12xx_boot_run_firmware(struct wl12xx *wl)
*/
/* enable gpio interrupts */
wl12xx_boot_enable_interrupts(wl);
wl1251_boot_enable_interrupts(wl);
wl->chip.op_target_enable_interrupts(wl);
/* unmask all mbox events */
wl->event_mask = 0xffffffff;
ret = wl12xx_event_unmask(wl);
ret = wl1251_event_unmask(wl);
if (ret < 0) {
wl12xx_error("EVENT mask setting failed");
wl1251_error("EVENT mask setting failed");
return ret;
}
wl12xx_event_mbox_config(wl);
wl1251_event_mbox_config(wl);
/* firmware startup completed */
return 0;
......
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2008 Nokia Corporation
*
......@@ -26,10 +26,10 @@
#include "wl1251.h"
int wl12xx_boot_soft_reset(struct wl12xx *wl);
int wl12xx_boot_init_seq(struct wl12xx *wl);
int wl12xx_boot_run_firmware(struct wl12xx *wl);
void wl12xx_boot_target_enable_interrupts(struct wl12xx *wl);
int wl1251_boot_soft_reset(struct wl1251 *wl);
int wl1251_boot_init_seq(struct wl1251 *wl);
int wl1251_boot_run_firmware(struct wl1251 *wl);
void wl1251_boot_target_enable_interrupts(struct wl1251 *wl);
/* number of times we try to read the INIT interrupt */
#define INIT_LOOP 20000
......
......@@ -5,7 +5,6 @@
#include <linux/spi/spi.h>
#include "wl1251.h"
#include "wl12xx_80211.h"
#include "reg.h"
#include "wl1251_spi.h"
#include "wl1251_ps.h"
......@@ -19,9 +18,9 @@
* @buf: buffer containing the command, must work with dma
* @len: length of the buffer
*/
int wl12xx_cmd_send(struct wl12xx *wl, u16 id, void *buf, size_t len)
int wl1251_cmd_send(struct wl1251 *wl, u16 id, void *buf, size_t len)
{
struct wl12xx_cmd_header *cmd;
struct wl1251_cmd_header *cmd;
unsigned long timeout;
u32 intr;
int ret = 0;
......@@ -32,26 +31,26 @@ int wl12xx_cmd_send(struct wl12xx *wl, u16 id, void *buf, size_t len)
WARN_ON(len % 4 != 0);
wl12xx_spi_mem_write(wl, wl->cmd_box_addr, buf, len);
wl1251_spi_mem_write(wl, wl->cmd_box_addr, buf, len);
wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD);
wl1251_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD);
timeout = jiffies + msecs_to_jiffies(WL12XX_COMMAND_TIMEOUT);
timeout = jiffies + msecs_to_jiffies(WL1251_COMMAND_TIMEOUT);
intr = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
while (!(intr & wl->chip.intr_cmd_complete)) {
if (time_after(jiffies, timeout)) {
wl12xx_error("command complete timeout");
wl1251_error("command complete timeout");
ret = -ETIMEDOUT;
goto out;
}
msleep(1);
intr = wl12xx_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
}
wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
wl->chip.intr_cmd_complete);
out:
......@@ -66,33 +65,33 @@ int wl12xx_cmd_send(struct wl12xx *wl, u16 id, void *buf, size_t len)
* @len: length of the buffer
* @answer: is answer needed
*/
int wl12xx_cmd_test(struct wl12xx *wl, void *buf, size_t buf_len, u8 answer)
int wl1251_cmd_test(struct wl1251 *wl, void *buf, size_t buf_len, u8 answer)
{
int ret;
wl12xx_debug(DEBUG_CMD, "cmd test");
wl1251_debug(DEBUG_CMD, "cmd test");
ret = wl12xx_cmd_send(wl, CMD_TEST, buf, buf_len);
ret = wl1251_cmd_send(wl, CMD_TEST, buf, buf_len);
if (ret < 0) {
wl12xx_warning("TEST command failed");
wl1251_warning("TEST command failed");
return ret;
}
if (answer) {
struct wl12xx_command *cmd_answer;
struct wl1251_command *cmd_answer;
/*
* The test command got in, we can read the answer.
* The answer would be a wl12xx_command, where the
* The answer would be a wl1251_command, where the
* parameter array contains the actual answer.
*/
wl12xx_spi_mem_read(wl, wl->cmd_box_addr, buf, buf_len);
wl1251_spi_mem_read(wl, wl->cmd_box_addr, buf, buf_len);
cmd_answer = buf;
if (cmd_answer->header.status != CMD_STATUS_SUCCESS)
wl12xx_error("TEST command answer error: %d",
wl1251_error("TEST command answer error: %d",
cmd_answer->header.status);
}
......@@ -107,30 +106,30 @@ int wl12xx_cmd_test(struct wl12xx *wl, void *buf, size_t buf_len, u8 answer)
* @buf: buffer for the response, including all headers, must work with dma
* @len: lenght of buf
*/
int wl12xx_cmd_interrogate(struct wl12xx *wl, u16 id, void *buf, size_t len)
int wl1251_cmd_interrogate(struct wl1251 *wl, u16 id, void *buf, size_t len)
{
struct acx_header *acx = buf;
int ret;
wl12xx_debug(DEBUG_CMD, "cmd interrogate");
wl1251_debug(DEBUG_CMD, "cmd interrogate");
acx->id = id;
/* payload length, does not include any headers */
acx->len = len - sizeof(*acx);
ret = wl12xx_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx));
ret = wl1251_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx));
if (ret < 0) {
wl12xx_error("INTERROGATE command failed");
wl1251_error("INTERROGATE command failed");
goto out;
}
/* the interrogate command got in, we can read the answer */
wl12xx_spi_mem_read(wl, wl->cmd_box_addr, buf, len);
wl1251_spi_mem_read(wl, wl->cmd_box_addr, buf, len);
acx = buf;
if (acx->cmd.status != CMD_STATUS_SUCCESS)
wl12xx_error("INTERROGATE command error: %d",
wl1251_error("INTERROGATE command error: %d",
acx->cmd.status);
out:
......@@ -145,34 +144,34 @@ int wl12xx_cmd_interrogate(struct wl12xx *wl, u16 id, void *buf, size_t len)
* @buf: buffer containing acx, including all headers, must work with dma
* @len: length of buf
*/
int wl12xx_cmd_configure(struct wl12xx *wl, u16 id, void *buf, size_t len)
int wl1251_cmd_configure(struct wl1251 *wl, u16 id, void *buf, size_t len)
{
struct acx_header *acx = buf;
int ret;
wl12xx_debug(DEBUG_CMD, "cmd configure");
wl1251_debug(DEBUG_CMD, "cmd configure");
acx->id = id;
/* payload length, does not include any headers */
acx->len = len - sizeof(*acx);
ret = wl12xx_cmd_send(wl, CMD_CONFIGURE, acx, len);
ret = wl1251_cmd_send(wl, CMD_CONFIGURE, acx, len);
if (ret < 0) {
wl12xx_warning("CONFIGURE command NOK");
wl1251_warning("CONFIGURE command NOK");
return ret;
}
return 0;
}
int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
int wl1251_cmd_vbm(struct wl1251 *wl, u8 identity,
void *bitmap, u16 bitmap_len, u8 bitmap_control)
{
struct wl12xx_cmd_vbm_update *vbm;
struct wl1251_cmd_vbm_update *vbm;
int ret;
wl12xx_debug(DEBUG_CMD, "cmd vbm");
wl1251_debug(DEBUG_CMD, "cmd vbm");
vbm = kzalloc(sizeof(*vbm), GFP_KERNEL);
if (!vbm) {
......@@ -183,7 +182,7 @@ int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
/* Count and period will be filled by the target */
vbm->tim.bitmap_ctrl = bitmap_control;
if (bitmap_len > PARTIAL_VBM_MAX) {
wl12xx_warning("cmd vbm len is %d B, truncating to %d",
wl1251_warning("cmd vbm len is %d B, truncating to %d",
bitmap_len, PARTIAL_VBM_MAX);
bitmap_len = PARTIAL_VBM_MAX;
}
......@@ -193,9 +192,9 @@ int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
vbm->len = cpu_to_le16(bitmap_len + 5);
ret = wl12xx_cmd_send(wl, CMD_VBM, vbm, sizeof(*vbm));
ret = wl1251_cmd_send(wl, CMD_VBM, vbm, sizeof(*vbm));
if (ret < 0) {
wl12xx_error("VBM command failed");
wl1251_error("VBM command failed");
goto out;
}
......@@ -204,13 +203,13 @@ int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
return 0;
}
int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, bool enable)
int wl1251_cmd_data_path(struct wl1251 *wl, u8 channel, bool enable)
{
struct cmd_enabledisable_path *cmd;
int ret;
u16 cmd_rx, cmd_tx;
wl12xx_debug(DEBUG_CMD, "cmd data path");
wl1251_debug(DEBUG_CMD, "cmd data path");
cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
if (!cmd) {
......@@ -228,24 +227,24 @@ int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, bool enable)
cmd_tx = CMD_DISABLE_TX;
}
ret = wl12xx_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd));
ret = wl1251_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd));
if (ret < 0) {
wl12xx_error("rx %s cmd for channel %d failed",
wl1251_error("rx %s cmd for channel %d failed",
enable ? "start" : "stop", channel);
goto out;
}
wl12xx_debug(DEBUG_BOOT, "rx %s cmd channel %d",
wl1251_debug(DEBUG_BOOT, "rx %s cmd channel %d",
enable ? "start" : "stop", channel);
ret = wl12xx_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd));
ret = wl1251_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd));
if (ret < 0) {
wl12xx_error("tx %s cmd for channel %d failed",
wl1251_error("tx %s cmd for channel %d failed",
enable ? "start" : "stop", channel);
return ret;
}
wl12xx_debug(DEBUG_BOOT, "tx %s cmd channel %d",
wl1251_debug(DEBUG_BOOT, "tx %s cmd channel %d",
enable ? "start" : "stop", channel);
out:
......@@ -253,7 +252,7 @@ int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, bool enable)
return ret;
}
int wl1251_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
int wl1251_cmd_join(struct wl1251 *wl, u8 bss_type, u8 dtim_interval,
u16 beacon_interval, u8 wait)
{
unsigned long timeout;
......@@ -268,14 +267,14 @@ int wl1251_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
}
/* FIXME: this should be in main.c */
ret = wl12xx_acx_frame_rates(wl, DEFAULT_HW_GEN_TX_RATE,
ret = wl1251_acx_frame_rates(wl, DEFAULT_HW_GEN_TX_RATE,
DEFAULT_HW_GEN_MODULATION_TYPE,
wl->tx_mgmt_frm_rate,
wl->tx_mgmt_frm_mod);
if (ret < 0)
goto out;
wl12xx_debug(DEBUG_CMD, "cmd join");
wl1251_debug(DEBUG_CMD, "cmd join");
/* Reverse order BSSID */
bssid = (u8 *) &join->bssid_lsb;
......@@ -294,9 +293,9 @@ int wl1251_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
join->channel = wl->channel;
join->ctrl = JOIN_CMD_CTRL_TX_FLUSH;
ret = wl12xx_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join));
ret = wl1251_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join));
if (ret < 0) {
wl12xx_error("failed to initiate cmd join");
wl1251_error("failed to initiate cmd join");
goto out;
}
......@@ -314,20 +313,20 @@ int wl1251_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
return ret;
}
int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode)
int wl1251_cmd_ps_mode(struct wl1251 *wl, u8 ps_mode)
{
struct wl12xx_cmd_ps_params *ps_params = NULL;
struct wl1251_cmd_ps_params *ps_params = NULL;
int ret = 0;
/* FIXME: this should be in ps.c */
ret = wl12xx_acx_wake_up_conditions(wl, WAKE_UP_EVENT_DTIM_BITMAP,
ret = wl1251_acx_wake_up_conditions(wl, WAKE_UP_EVENT_DTIM_BITMAP,
wl->listen_int);
if (ret < 0) {
wl12xx_error("couldn't set wake up conditions");
wl1251_error("couldn't set wake up conditions");
goto out;
}
wl12xx_debug(DEBUG_CMD, "cmd set ps mode");
wl1251_debug(DEBUG_CMD, "cmd set ps mode");
ps_params = kzalloc(sizeof(*ps_params), GFP_KERNEL);
if (!ps_params) {
......@@ -341,10 +340,10 @@ int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode)
ps_params->hang_over_period = 128;
ps_params->null_data_rate = 1; /* 1 Mbps */
ret = wl12xx_cmd_send(wl, CMD_SET_PS_MODE, ps_params,
ret = wl1251_cmd_send(wl, CMD_SET_PS_MODE, ps_params,
sizeof(*ps_params));
if (ret < 0) {
wl12xx_error("cmd set_ps_mode failed");
wl1251_error("cmd set_ps_mode failed");
goto out;
}
......@@ -353,13 +352,13 @@ int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode)
return ret;
}
int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, void *answer,
int wl1251_cmd_read_memory(struct wl1251 *wl, u32 addr, void *answer,
size_t len)
{
struct cmd_read_write_memory *cmd;
int ret = 0;
wl12xx_debug(DEBUG_CMD, "cmd read memory");
wl1251_debug(DEBUG_CMD, "cmd read memory");
cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
if (!cmd) {
......@@ -373,17 +372,17 @@ int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, void *answer,
cmd->addr = addr;
cmd->size = len;
ret = wl12xx_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd));
ret = wl1251_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd));
if (ret < 0) {
wl12xx_error("read memory command failed: %d", ret);
wl1251_error("read memory command failed: %d", ret);
goto out;
}
/* the read command got in, we can now read the answer */
wl12xx_spi_mem_read(wl, wl->cmd_box_addr, cmd, sizeof(*cmd));
wl1251_spi_mem_read(wl, wl->cmd_box_addr, cmd, sizeof(*cmd));
if (cmd->header.status != CMD_STATUS_SUCCESS)
wl12xx_error("error in read command result: %d",
wl1251_error("error in read command result: %d",
cmd->header.status);
memcpy(answer, cmd->value, len);
......@@ -393,17 +392,17 @@ int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, void *answer,
return ret;
}
int wl12xx_cmd_template_set(struct wl12xx *wl, u16 cmd_id,
int wl1251_cmd_template_set(struct wl1251 *wl, u16 cmd_id,
void *buf, size_t buf_len)
{
struct wl12xx_cmd_packet_template *cmd;
struct wl1251_cmd_packet_template *cmd;
size_t cmd_len;
int ret = 0;
wl12xx_debug(DEBUG_CMD, "cmd template %d", cmd_id);
wl1251_debug(DEBUG_CMD, "cmd template %d", cmd_id);
WARN_ON(buf_len > WL12XX_MAX_TEMPLATE_SIZE);
buf_len = min_t(size_t, buf_len, WL12XX_MAX_TEMPLATE_SIZE);
WARN_ON(buf_len > WL1251_MAX_TEMPLATE_SIZE);
buf_len = min_t(size_t, buf_len, WL1251_MAX_TEMPLATE_SIZE);
cmd_len = ALIGN(sizeof(*cmd) + buf_len, 4);
cmd = kzalloc(cmd_len, GFP_KERNEL);
......@@ -417,9 +416,9 @@ int wl12xx_cmd_template_set(struct wl12xx *wl, u16 cmd_id,
if (buf)
memcpy(cmd->data, buf, buf_len);
ret = wl12xx_cmd_send(wl, cmd_id, cmd, cmd_len);
ret = wl1251_cmd_send(wl, cmd_id, cmd, cmd_len);
if (ret < 0) {
wl12xx_warning("cmd set_template failed: %d", ret);
wl1251_warning("cmd set_template failed: %d", ret);
goto out;
}
......
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -22,32 +22,32 @@
*
*/
#ifndef __WL12XX_CMD_H__
#define __WL12XX_CMD_H__
#ifndef __WL1251_CMD_H__
#define __WL1251_CMD_H__
#include "wl1251.h"
struct acx_header;
int wl12xx_cmd_send(struct wl12xx *wl, u16 type, void *buf, size_t buf_len);
int wl12xx_cmd_test(struct wl12xx *wl, void *buf, size_t buf_len, u8 answer);
int wl12xx_cmd_interrogate(struct wl12xx *wl, u16 id, void *buf, size_t len);
int wl12xx_cmd_configure(struct wl12xx *wl, u16 id, void *buf, size_t len);
int wl12xx_cmd_vbm(struct wl12xx *wl, u8 identity,
int wl1251_cmd_send(struct wl1251 *wl, u16 type, void *buf, size_t buf_len);
int wl1251_cmd_test(struct wl1251 *wl, void *buf, size_t buf_len, u8 answer);
int wl1251_cmd_interrogate(struct wl1251 *wl, u16 id, void *buf, size_t len);
int wl1251_cmd_configure(struct wl1251 *wl, u16 id, void *buf, size_t len);
int wl1251_cmd_vbm(struct wl1251 *wl, u8 identity,
void *bitmap, u16 bitmap_len, u8 bitmap_control);
int wl12xx_cmd_data_path(struct wl12xx *wl, u8 channel, bool enable);
int wl1251_cmd_join(struct wl12xx *wl, u8 bss_type, u8 dtim_interval,
int wl1251_cmd_data_path(struct wl1251 *wl, u8 channel, bool enable);
int wl1251_cmd_join(struct wl1251 *wl, u8 bss_type, u8 dtim_interval,
u16 beacon_interval, u8 wait);
int wl12xx_cmd_ps_mode(struct wl12xx *wl, u8 ps_mode);
int wl12xx_cmd_read_memory(struct wl12xx *wl, u32 addr, void *answer,
int wl1251_cmd_ps_mode(struct wl1251 *wl, u8 ps_mode);
int wl1251_cmd_read_memory(struct wl1251 *wl, u32 addr, void *answer,
size_t len);
int wl12xx_cmd_template_set(struct wl12xx *wl, u16 cmd_id,
int wl1251_cmd_template_set(struct wl1251 *wl, u16 cmd_id,
void *buf, size_t buf_len);
/* unit ms */
#define WL12XX_COMMAND_TIMEOUT 2000
#define WL1251_COMMAND_TIMEOUT 2000
enum wl12xx_commands {
enum wl1251_commands {
CMD_RESET = 0,
CMD_INTERROGATE = 1, /*use this to read information elements*/
CMD_CONFIGURE = 2, /*use this to write information elements*/
......@@ -95,15 +95,15 @@ enum wl12xx_commands {
#define MAX_CMD_PARAMS 572
struct wl12xx_cmd_header {
struct wl1251_cmd_header {
u16 id;
u16 status;
/* payload */
u8 data[0];
} __attribute__ ((packed));
struct wl12xx_command {
struct wl12xx_cmd_header header;
struct wl1251_command {
struct wl1251_cmd_header header;
u8 parameters[MAX_CMD_PARAMS];
};
......@@ -145,7 +145,7 @@ enum {
#define MAX_READ_SIZE 256
struct cmd_read_write_memory {
struct wl12xx_cmd_header header;
struct wl1251_cmd_header header;
/* The address of the memory to read from or write to.*/
u32 addr;
......@@ -214,7 +214,7 @@ struct basic_scan_channel_parameters {
#define SCAN_MAX_NUM_OF_CHANNELS 16
struct cmd_scan {
struct wl12xx_cmd_header header;
struct wl1251_cmd_header header;
struct basic_scan_parameters params;
struct basic_scan_channel_parameters channels[SCAN_MAX_NUM_OF_CHANNELS];
......@@ -232,7 +232,7 @@ enum {
struct cmd_join {
struct wl12xx_cmd_header header;
struct wl1251_cmd_header header;
u32 bssid_lsb;
u16 bssid_msb;
......@@ -269,16 +269,16 @@ struct cmd_join {
} __attribute__ ((packed));
struct cmd_enabledisable_path {
struct wl12xx_cmd_header header;
struct wl1251_cmd_header header;
u8 channel;
u8 padding[3];
} __attribute__ ((packed));
#define WL12XX_MAX_TEMPLATE_SIZE 300
#define WL1251_MAX_TEMPLATE_SIZE 300
struct wl12xx_cmd_packet_template {
struct wl12xx_cmd_header header;
struct wl1251_cmd_packet_template {
struct wl1251_cmd_header header;
__le16 size;
u8 data[0];
......@@ -287,7 +287,7 @@ struct wl12xx_cmd_packet_template {
#define TIM_ELE_ID 5
#define PARTIAL_VBM_MAX 251
struct wl12xx_tim {
struct wl1251_tim {
u8 identity;
u8 length;
u8 dtim_count;
......@@ -297,20 +297,20 @@ struct wl12xx_tim {
} __attribute__ ((packed));
/* Virtual Bit Map update */
struct wl12xx_cmd_vbm_update {
struct wl12xx_cmd_header header;
struct wl1251_cmd_vbm_update {
struct wl1251_cmd_header header;
__le16 len;
u8 padding[2];
struct wl12xx_tim tim;
struct wl1251_tim tim;
} __attribute__ ((packed));
enum wl12xx_cmd_ps_mode {
enum wl1251_cmd_ps_mode {
STATION_ACTIVE_MODE,
STATION_POWER_SAVE_MODE
};
struct wl12xx_cmd_ps_params {
struct wl12xx_cmd_header header;
struct wl1251_cmd_ps_params {
struct wl1251_cmd_header header;
u8 ps_mode; /* STATION_* */
u8 send_null_data; /* Do we have to send NULL data packet ? */
......@@ -325,8 +325,8 @@ struct wl12xx_cmd_ps_params {
u8 pad[2];
} __attribute__ ((packed));
struct wl12xx_cmd_trigger_scan_to {
struct wl12xx_cmd_header header;
struct wl1251_cmd_trigger_scan_to {
struct wl1251_cmd_header header;
u32 timeout;
};
......@@ -340,14 +340,14 @@ struct wl12xx_cmd_trigger_scan_to {
/* When set, disable HW decryption */
#define DF_SNIFF_MODE_ENABLE 0x80
enum wl12xx_cmd_key_action {
enum wl1251_cmd_key_action {
KEY_ADD_OR_REPLACE = 1,
KEY_REMOVE = 2,
KEY_SET_ID = 3,
MAX_KEY_ACTION = 0xffff,
};
enum wl12xx_cmd_key_type {
enum wl1251_cmd_key_type {
KEY_WEP_DEFAULT = 0,
KEY_WEP_ADDR = 1,
KEY_AES_GROUP = 4,
......@@ -374,8 +374,8 @@ enum wl12xx_cmd_key_type {
*
*/
struct wl12xx_cmd_set_keys {
struct wl12xx_cmd_header header;
struct wl1251_cmd_set_keys {
struct wl1251_cmd_header header;
/* Ignored for default WEP key */
u8 addr[ETH_ALEN];
......@@ -404,4 +404,4 @@ struct wl12xx_cmd_set_keys {
} __attribute__ ((packed));
#endif /* __WL12XX_CMD_H__ */
#endif /* __WL1251_CMD_H__ */
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2009 Nokia Corporation
*
......@@ -30,7 +30,7 @@
#include "wl1251_ps.h"
/* ms */
#define WL12XX_DEBUGFS_STATS_LIFETIME 1000
#define WL1251_DEBUGFS_STATS_LIFETIME 1000
/* debugfs macros idea from mac80211 */
......@@ -38,7 +38,7 @@
static ssize_t name## _read(struct file *file, char __user *userbuf, \
size_t count, loff_t *ppos) \
{ \
struct wl12xx *wl = file->private_data; \
struct wl1251 *wl = file->private_data; \
char buf[buflen]; \
int res; \
\
......@@ -48,7 +48,7 @@ static ssize_t name## _read(struct file *file, char __user *userbuf, \
\
static const struct file_operations name## _ops = { \
.read = name## _read, \
.open = wl12xx_open_file_generic, \
.open = wl1251_open_file_generic, \
};
#define DEBUGFS_ADD(name, parent) \
......@@ -71,11 +71,11 @@ static ssize_t sub## _ ##name## _read(struct file *file, \
char __user *userbuf, \
size_t count, loff_t *ppos) \
{ \
struct wl12xx *wl = file->private_data; \
struct wl1251 *wl = file->private_data; \
char buf[buflen]; \
int res; \
\
wl12xx_debugfs_update_stats(wl); \
wl1251_debugfs_update_stats(wl); \
\
res = scnprintf(buf, buflen, fmt "\n", \
wl->stats.fw_stats->sub.name); \
......@@ -84,7 +84,7 @@ static ssize_t sub## _ ##name## _read(struct file *file, \
\
static const struct file_operations sub## _ ##name## _ops = { \
.read = sub## _ ##name## _read, \
.open = wl12xx_open_file_generic, \
.open = wl1251_open_file_generic, \
};
#define DEBUGFS_FWSTATS_ADD(sub, name) \
......@@ -93,30 +93,30 @@ static const struct file_operations sub## _ ##name## _ops = { \
#define DEBUGFS_FWSTATS_DEL(sub, name) \
DEBUGFS_DEL(sub## _ ##name)
static void wl12xx_debugfs_update_stats(struct wl12xx *wl)
static void wl1251_debugfs_update_stats(struct wl1251 *wl)
{
int ret;
mutex_lock(&wl->mutex);
ret = wl12xx_ps_elp_wakeup(wl);
ret = wl1251_ps_elp_wakeup(wl);
if (ret < 0)
goto out;
if (wl->state == WL12XX_STATE_ON &&
if (wl->state == WL1251_STATE_ON &&
time_after(jiffies, wl->stats.fw_stats_update +
msecs_to_jiffies(WL12XX_DEBUGFS_STATS_LIFETIME))) {
wl12xx_acx_statistics(wl, wl->stats.fw_stats);
msecs_to_jiffies(WL1251_DEBUGFS_STATS_LIFETIME))) {
wl1251_acx_statistics(wl, wl->stats.fw_stats);
wl->stats.fw_stats_update = jiffies;
}
wl12xx_ps_elp_sleep(wl);
wl1251_ps_elp_sleep(wl);
out:
mutex_unlock(&wl->mutex);
}
static int wl12xx_open_file_generic(struct inode *inode, struct file *file)
static int wl1251_open_file_generic(struct inode *inode, struct file *file)
{
file->private_data = inode->i_private;
return 0;
......@@ -221,7 +221,7 @@ DEBUGFS_READONLY_FILE(excessive_retries, 20, "%u",
static ssize_t tx_queue_len_read(struct file *file, char __user *userbuf,
size_t count, loff_t *ppos)
{
struct wl12xx *wl = file->private_data;
struct wl1251 *wl = file->private_data;
u32 queue_len;
char buf[20];
int res;
......@@ -234,10 +234,10 @@ static ssize_t tx_queue_len_read(struct file *file, char __user *userbuf,
static const struct file_operations tx_queue_len_ops = {
.read = tx_queue_len_read,
.open = wl12xx_open_file_generic,
.open = wl1251_open_file_generic,
};
static void wl12xx_debugfs_delete_files(struct wl12xx *wl)
static void wl1251_debugfs_delete_files(struct wl1251 *wl)
{
DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow);
......@@ -335,7 +335,7 @@ static void wl12xx_debugfs_delete_files(struct wl12xx *wl)
DEBUGFS_DEL(excessive_retries);
}
static int wl12xx_debugfs_add_files(struct wl12xx *wl)
static int wl1251_debugfs_add_files(struct wl1251 *wl)
{
int ret = 0;
......@@ -436,19 +436,19 @@ static int wl12xx_debugfs_add_files(struct wl12xx *wl)
out:
if (ret < 0)
wl12xx_debugfs_delete_files(wl);
wl1251_debugfs_delete_files(wl);
return ret;
}
void wl12xx_debugfs_reset(struct wl12xx *wl)
void wl1251_debugfs_reset(struct wl1251 *wl)
{
memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
wl->stats.retry_count = 0;
wl->stats.excessive_retries = 0;
}
int wl12xx_debugfs_init(struct wl12xx *wl)
int wl1251_debugfs_init(struct wl1251 *wl)
{
int ret;
......@@ -479,7 +479,7 @@ int wl12xx_debugfs_init(struct wl12xx *wl)
wl->stats.fw_stats_update = jiffies;
ret = wl12xx_debugfs_add_files(wl);
ret = wl1251_debugfs_add_files(wl);
if (ret < 0)
goto err_file;
......@@ -502,9 +502,9 @@ int wl12xx_debugfs_init(struct wl12xx *wl)
return ret;
}
void wl12xx_debugfs_exit(struct wl12xx *wl)
void wl1251_debugfs_exit(struct wl1251 *wl)
{
wl12xx_debugfs_delete_files(wl);
wl1251_debugfs_delete_files(wl);
kfree(wl->stats.fw_stats);
wl->stats.fw_stats = NULL;
......
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2009 Nokia Corporation
*
......@@ -21,13 +21,13 @@
*
*/
#ifndef WL12XX_DEBUGFS_H
#define WL12XX_DEBUGFS_H
#ifndef WL1251_DEBUGFS_H
#define WL1251_DEBUGFS_H
#include "wl1251.h"
int wl12xx_debugfs_init(struct wl12xx *wl);
void wl12xx_debugfs_exit(struct wl12xx *wl);
void wl12xx_debugfs_reset(struct wl12xx *wl);
int wl1251_debugfs_init(struct wl1251 *wl);
void wl1251_debugfs_exit(struct wl1251 *wl);
void wl1251_debugfs_reset(struct wl1251 *wl);
#endif /* WL12XX_DEBUGFS_H */
#endif /* WL1251_DEBUGFS_H */
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -28,10 +28,10 @@
#include "wl1251_event.h"
#include "wl1251_ps.h"
static int wl12xx_event_scan_complete(struct wl12xx *wl,
static int wl1251_event_scan_complete(struct wl1251 *wl,
struct event_mailbox *mbox)
{
wl12xx_debug(DEBUG_EVENT, "status: 0x%x, channels: %d",
wl1251_debug(DEBUG_EVENT, "status: 0x%x, channels: %d",
mbox->scheduled_scan_status,
mbox->scheduled_scan_channels);
......@@ -45,34 +45,34 @@ static int wl12xx_event_scan_complete(struct wl12xx *wl,
return 0;
}
static void wl12xx_event_mbox_dump(struct event_mailbox *mbox)
static void wl1251_event_mbox_dump(struct event_mailbox *mbox)
{
wl12xx_debug(DEBUG_EVENT, "MBOX DUMP:");
wl12xx_debug(DEBUG_EVENT, "\tvector: 0x%x", mbox->events_vector);
wl12xx_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox->events_mask);
wl1251_debug(DEBUG_EVENT, "MBOX DUMP:");
wl1251_debug(DEBUG_EVENT, "\tvector: 0x%x", mbox->events_vector);
wl1251_debug(DEBUG_EVENT, "\tmask: 0x%x", mbox->events_mask);
}
static int wl12xx_event_process(struct wl12xx *wl, struct event_mailbox *mbox)
static int wl1251_event_process(struct wl1251 *wl, struct event_mailbox *mbox)
{
int ret;
u32 vector;
wl12xx_event_mbox_dump(mbox);
wl1251_event_mbox_dump(mbox);
vector = mbox->events_vector & ~(mbox->events_mask);
wl12xx_debug(DEBUG_EVENT, "vector: 0x%x", vector);
wl1251_debug(DEBUG_EVENT, "vector: 0x%x", vector);
if (vector & SCAN_COMPLETE_EVENT_ID) {
ret = wl12xx_event_scan_complete(wl, mbox);
ret = wl1251_event_scan_complete(wl, mbox);
if (ret < 0)
return ret;
}
if (vector & BSS_LOSE_EVENT_ID) {
wl12xx_debug(DEBUG_EVENT, "BSS_LOSE_EVENT");
wl1251_debug(DEBUG_EVENT, "BSS_LOSE_EVENT");
if (wl->psm_requested && wl->psm) {
ret = wl12xx_ps_set_mode(wl, STATION_ACTIVE_MODE);
ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE);
if (ret < 0)
return ret;
}
......@@ -81,47 +81,47 @@ static int wl12xx_event_process(struct wl12xx *wl, struct event_mailbox *mbox)
return 0;
}
int wl12xx_event_unmask(struct wl12xx *wl)
int wl1251_event_unmask(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_event_mbox_mask(wl, ~(wl->event_mask));
ret = wl1251_acx_event_mbox_mask(wl, ~(wl->event_mask));
if (ret < 0)
return ret;
return 0;
}
void wl12xx_event_mbox_config(struct wl12xx *wl)
void wl1251_event_mbox_config(struct wl1251 *wl)
{
wl->mbox_ptr[0] = wl12xx_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
wl->mbox_ptr[0] = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
wl12xx_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x",
wl1251_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x",
wl->mbox_ptr[0], wl->mbox_ptr[1]);
}
int wl12xx_event_handle(struct wl12xx *wl, u8 mbox_num)
int wl1251_event_handle(struct wl1251 *wl, u8 mbox_num)
{
struct event_mailbox mbox;
int ret;
wl12xx_debug(DEBUG_EVENT, "EVENT on mbox %d", mbox_num);
wl1251_debug(DEBUG_EVENT, "EVENT on mbox %d", mbox_num);
if (mbox_num > 1)
return -EINVAL;
/* first we read the mbox descriptor */
wl12xx_spi_mem_read(wl, wl->mbox_ptr[mbox_num], &mbox,
wl1251_spi_mem_read(wl, wl->mbox_ptr[mbox_num], &mbox,
sizeof(struct event_mailbox));
/* process the descriptor */
ret = wl12xx_event_process(wl, &mbox);
ret = wl1251_event_process(wl, &mbox);
if (ret < 0)
return ret;
/* then we let the firmware know it can go on...*/
wl12xx_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK);
wl1251_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK);
return 0;
}
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -22,8 +22,8 @@
*
*/
#ifndef __WL12XX_EVENT_H__
#define __WL12XX_EVENT_H__
#ifndef __WL1251_EVENT_H__
#define __WL1251_EVENT_H__
/*
* Mbox events
......@@ -114,8 +114,8 @@ struct event_mailbox {
u8 padding[19];
} __attribute__ ((packed));
int wl12xx_event_unmask(struct wl12xx *wl);
void wl12xx_event_mbox_config(struct wl12xx *wl);
int wl12xx_event_handle(struct wl12xx *wl, u8 mbox);
int wl1251_event_unmask(struct wl1251 *wl);
void wl1251_event_mbox_config(struct wl1251 *wl);
int wl1251_event_handle(struct wl1251 *wl, u8 mbox);
#endif
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2009 Nokia Corporation
*
......@@ -29,59 +29,59 @@
#include "wl1251_acx.h"
#include "wl1251_cmd.h"
int wl12xx_hw_init_hwenc_config(struct wl12xx *wl)
int wl1251_hw_init_hwenc_config(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_feature_cfg(wl);
ret = wl1251_acx_feature_cfg(wl);
if (ret < 0) {
wl12xx_warning("couldn't set feature config");
wl1251_warning("couldn't set feature config");
return ret;
}
ret = wl12xx_acx_default_key(wl, wl->default_key);
ret = wl1251_acx_default_key(wl, wl->default_key);
if (ret < 0) {
wl12xx_warning("couldn't set default key");
wl1251_warning("couldn't set default key");
return ret;
}
return 0;
}
int wl12xx_hw_init_templates_config(struct wl12xx *wl)
int wl1251_hw_init_templates_config(struct wl1251 *wl)
{
int ret;
u8 partial_vbm[PARTIAL_VBM_MAX];
/* send empty templates for fw memory reservation */
ret = wl12xx_cmd_template_set(wl, CMD_PROBE_REQ, NULL,
ret = wl1251_cmd_template_set(wl, CMD_PROBE_REQ, NULL,
sizeof(struct wl12xx_probe_req_template));
if (ret < 0)
return ret;
ret = wl12xx_cmd_template_set(wl, CMD_NULL_DATA, NULL,
ret = wl1251_cmd_template_set(wl, CMD_NULL_DATA, NULL,
sizeof(struct wl12xx_null_data_template));
if (ret < 0)
return ret;
ret = wl12xx_cmd_template_set(wl, CMD_PS_POLL, NULL,
ret = wl1251_cmd_template_set(wl, CMD_PS_POLL, NULL,
sizeof(struct wl12xx_ps_poll_template));
if (ret < 0)
return ret;
ret = wl12xx_cmd_template_set(wl, CMD_QOS_NULL_DATA, NULL,
ret = wl1251_cmd_template_set(wl, CMD_QOS_NULL_DATA, NULL,
sizeof
(struct wl12xx_qos_null_data_template));
if (ret < 0)
return ret;
ret = wl12xx_cmd_template_set(wl, CMD_PROBE_RESP, NULL,
ret = wl1251_cmd_template_set(wl, CMD_PROBE_RESP, NULL,
sizeof
(struct wl12xx_probe_resp_template));
if (ret < 0)
return ret;
ret = wl12xx_cmd_template_set(wl, CMD_BEACON, NULL,
ret = wl1251_cmd_template_set(wl, CMD_BEACON, NULL,
sizeof
(struct wl12xx_beacon_template));
if (ret < 0)
......@@ -89,112 +89,112 @@ int wl12xx_hw_init_templates_config(struct wl12xx *wl)
/* tim templates, first reserve space then allocate an empty one */
memset(partial_vbm, 0, PARTIAL_VBM_MAX);
ret = wl12xx_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, PARTIAL_VBM_MAX, 0);
ret = wl1251_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, PARTIAL_VBM_MAX, 0);
if (ret < 0)
return ret;
ret = wl12xx_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, 1, 0);
ret = wl1251_cmd_vbm(wl, TIM_ELE_ID, partial_vbm, 1, 0);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_rx_config(struct wl12xx *wl, u32 config, u32 filter)
int wl1251_hw_init_rx_config(struct wl1251 *wl, u32 config, u32 filter)
{
int ret;
ret = wl12xx_acx_rx_msdu_life_time(wl, RX_MSDU_LIFETIME_DEF);
ret = wl1251_acx_rx_msdu_life_time(wl, RX_MSDU_LIFETIME_DEF);
if (ret < 0)
return ret;
ret = wl12xx_acx_rx_config(wl, config, filter);
ret = wl1251_acx_rx_config(wl, config, filter);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_phy_config(struct wl12xx *wl)
int wl1251_hw_init_phy_config(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_pd_threshold(wl);
ret = wl1251_acx_pd_threshold(wl);
if (ret < 0)
return ret;
ret = wl12xx_acx_slot(wl, DEFAULT_SLOT_TIME);
ret = wl1251_acx_slot(wl, DEFAULT_SLOT_TIME);
if (ret < 0)
return ret;
ret = wl12xx_acx_group_address_tbl(wl);
ret = wl1251_acx_group_address_tbl(wl);
if (ret < 0)
return ret;
ret = wl12xx_acx_service_period_timeout(wl);
ret = wl1251_acx_service_period_timeout(wl);
if (ret < 0)
return ret;
ret = wl12xx_acx_rts_threshold(wl, RTS_THRESHOLD_DEF);
ret = wl1251_acx_rts_threshold(wl, RTS_THRESHOLD_DEF);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_beacon_filter(struct wl12xx *wl)
int wl1251_hw_init_beacon_filter(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_beacon_filter_opt(wl);
ret = wl1251_acx_beacon_filter_opt(wl);
if (ret < 0)
return ret;
ret = wl12xx_acx_beacon_filter_table(wl);
ret = wl1251_acx_beacon_filter_table(wl);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_pta(struct wl12xx *wl)
int wl1251_hw_init_pta(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_sg_enable(wl);
ret = wl1251_acx_sg_enable(wl);
if (ret < 0)
return ret;
ret = wl12xx_acx_sg_cfg(wl);
ret = wl1251_acx_sg_cfg(wl);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_energy_detection(struct wl12xx *wl)
int wl1251_hw_init_energy_detection(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_cca_threshold(wl);
ret = wl1251_acx_cca_threshold(wl);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_beacon_broadcast(struct wl12xx *wl)
int wl1251_hw_init_beacon_broadcast(struct wl1251 *wl)
{
int ret;
ret = wl12xx_acx_bcn_dtim_options(wl);
ret = wl1251_acx_bcn_dtim_options(wl);
if (ret < 0)
return ret;
return 0;
}
int wl12xx_hw_init_power_auth(struct wl12xx *wl)
int wl1251_hw_init_power_auth(struct wl1251 *wl)
{
return wl12xx_acx_sleep_auth(wl, WL12XX_PSM_CAM);
return wl1251_acx_sleep_auth(wl, WL1251_PSM_CAM);
}
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2009 Nokia Corporation
*
......@@ -21,19 +21,19 @@
*
*/
#ifndef __WL12XX_INIT_H__
#define __WL12XX_INIT_H__
#ifndef __WL1251_INIT_H__
#define __WL1251_INIT_H__
#include "wl1251.h"
int wl12xx_hw_init_hwenc_config(struct wl12xx *wl);
int wl12xx_hw_init_templates_config(struct wl12xx *wl);
int wl12xx_hw_init_rx_config(struct wl12xx *wl, u32 config, u32 filter);
int wl12xx_hw_init_phy_config(struct wl12xx *wl);
int wl12xx_hw_init_beacon_filter(struct wl12xx *wl);
int wl12xx_hw_init_pta(struct wl12xx *wl);
int wl12xx_hw_init_energy_detection(struct wl12xx *wl);
int wl12xx_hw_init_beacon_broadcast(struct wl12xx *wl);
int wl12xx_hw_init_power_auth(struct wl12xx *wl);
int wl1251_hw_init_hwenc_config(struct wl1251 *wl);
int wl1251_hw_init_templates_config(struct wl1251 *wl);
int wl1251_hw_init_rx_config(struct wl1251 *wl, u32 config, u32 filter);
int wl1251_hw_init_phy_config(struct wl1251 *wl);
int wl1251_hw_init_beacon_filter(struct wl1251 *wl);
int wl1251_hw_init_pta(struct wl1251 *wl);
int wl1251_hw_init_energy_detection(struct wl1251 *wl);
int wl1251_hw_init_beacon_broadcast(struct wl1251 *wl);
int wl1251_hw_init_power_auth(struct wl1251 *wl);
#endif
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2009 Nokia Corporation
*
......@@ -21,10 +21,10 @@
*
*/
#ifndef __WL12XX_NETLINK_H__
#define __WL12XX_NETLINK_H__
#ifndef __WL1251_NETLINK_H__
#define __WL1251_NETLINK_H__
int wl12xx_nl_register(void);
void wl12xx_nl_unregister(void);
int wl1251_nl_register(void);
void wl1251_nl_unregister(void);
#endif /* __WL12XX_NETLINK_H__ */
#endif /* __WL1251_NETLINK_H__ */
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2008 Nokia Corporation
*
......@@ -34,7 +34,7 @@
#define WL1251_POWER_ON_SLEEP 10 /* in miliseconds */
void wl1251_setup(struct wl12xx *wl);
void wl1251_setup(struct wl1251 *wl);
struct wl1251_acx_memory {
......
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (C) 2008 Nokia Corporation
*
......@@ -25,22 +25,22 @@
#include "wl1251_ps.h"
#include "wl1251_spi.h"
#define WL12XX_WAKEUP_TIMEOUT 2000
#define WL1251_WAKEUP_TIMEOUT 2000
/* Routines to toggle sleep mode while in ELP */
void wl12xx_ps_elp_sleep(struct wl12xx *wl)
void wl1251_ps_elp_sleep(struct wl1251 *wl)
{
if (wl->elp || !wl->psm)
return;
wl12xx_debug(DEBUG_PSM, "chip to elp");
wl1251_debug(DEBUG_PSM, "chip to elp");
wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
wl->elp = true;
}
int wl12xx_ps_elp_wakeup(struct wl12xx *wl)
int wl1251_ps_elp_wakeup(struct wl1251 *wl)
{
unsigned long timeout;
u32 elp_reg;
......@@ -48,13 +48,13 @@ int wl12xx_ps_elp_wakeup(struct wl12xx *wl)
if (!wl->elp)
return 0;
wl12xx_debug(DEBUG_PSM, "waking up chip from elp");
wl1251_debug(DEBUG_PSM, "waking up chip from elp");
timeout = jiffies + msecs_to_jiffies(WL12XX_WAKEUP_TIMEOUT);
timeout = jiffies + msecs_to_jiffies(WL1251_WAKEUP_TIMEOUT);
wl12xx_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);
wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);
elp_reg = wl12xx_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
elp_reg = wl1251_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
/*
* FIXME: we should wait for irq from chip but, as a temporary
......@@ -62,36 +62,36 @@ int wl12xx_ps_elp_wakeup(struct wl12xx *wl)
*/
while (!(elp_reg & ELPCTRL_WLAN_READY)) {
if (time_after(jiffies, timeout)) {
wl12xx_error("elp wakeup timeout");
wl1251_error("elp wakeup timeout");
return -ETIMEDOUT;
}
msleep(1);
elp_reg = wl12xx_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
elp_reg = wl1251_read32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR);
}
wl12xx_debug(DEBUG_PSM, "wakeup time: %u ms",
wl1251_debug(DEBUG_PSM, "wakeup time: %u ms",
jiffies_to_msecs(jiffies) -
(jiffies_to_msecs(timeout) - WL12XX_WAKEUP_TIMEOUT));
(jiffies_to_msecs(timeout) - WL1251_WAKEUP_TIMEOUT));
wl->elp = false;
return 0;
}
static int wl12xx_ps_set_elp(struct wl12xx *wl, bool enable)
static int wl1251_ps_set_elp(struct wl1251 *wl, bool enable)
{
int ret;
if (enable) {
wl12xx_debug(DEBUG_PSM, "sleep auth psm/elp");
wl1251_debug(DEBUG_PSM, "sleep auth psm/elp");
ret = wl12xx_acx_sleep_auth(wl, WL12XX_PSM_ELP);
ret = wl1251_acx_sleep_auth(wl, WL1251_PSM_ELP);
if (ret < 0)
return ret;
wl12xx_ps_elp_sleep(wl);
wl1251_ps_elp_sleep(wl);
} else {
wl12xx_debug(DEBUG_PSM, "sleep auth cam");
wl1251_debug(DEBUG_PSM, "sleep auth cam");
/*
* When the target is in ELP, we can only
......@@ -100,9 +100,9 @@ static int wl12xx_ps_set_elp(struct wl12xx *wl, bool enable)
* changing the power authorization.
*/
wl12xx_ps_elp_wakeup(wl);
wl1251_ps_elp_wakeup(wl);
ret = wl12xx_acx_sleep_auth(wl, WL12XX_PSM_CAM);
ret = wl1251_acx_sleep_auth(wl, WL1251_PSM_CAM);
if (ret < 0)
return ret;
}
......@@ -110,18 +110,18 @@ static int wl12xx_ps_set_elp(struct wl12xx *wl, bool enable)
return 0;
}
int wl12xx_ps_set_mode(struct wl12xx *wl, enum wl12xx_cmd_ps_mode mode)
int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode)
{
int ret;
switch (mode) {
case STATION_POWER_SAVE_MODE:
wl12xx_debug(DEBUG_PSM, "entering psm");
ret = wl12xx_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE);
wl1251_debug(DEBUG_PSM, "entering psm");
ret = wl1251_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE);
if (ret < 0)
return ret;
ret = wl12xx_ps_set_elp(wl, true);
ret = wl1251_ps_set_elp(wl, true);
if (ret < 0)
return ret;
......@@ -129,12 +129,12 @@ int wl12xx_ps_set_mode(struct wl12xx *wl, enum wl12xx_cmd_ps_mode mode)
break;
case STATION_ACTIVE_MODE:
default:
wl12xx_debug(DEBUG_PSM, "leaving psm");
ret = wl12xx_ps_set_elp(wl, false);
wl1251_debug(DEBUG_PSM, "leaving psm");
ret = wl1251_ps_set_elp(wl, false);
if (ret < 0)
return ret;
ret = wl12xx_cmd_ps_mode(wl, STATION_ACTIVE_MODE);
ret = wl1251_cmd_ps_mode(wl, STATION_ACTIVE_MODE);
if (ret < 0)
return ret;
......
#ifndef __WL12XX_PS_H__
#define __WL12XX_PS_H__
#ifndef __WL1251_PS_H__
#define __WL1251_PS_H__
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -28,9 +28,9 @@
#include "wl1251.h"
#include "wl1251_acx.h"
int wl12xx_ps_set_mode(struct wl12xx *wl, enum wl12xx_cmd_ps_mode mode);
void wl12xx_ps_elp_sleep(struct wl12xx *wl);
int wl12xx_ps_elp_wakeup(struct wl12xx *wl);
int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode);
void wl1251_ps_elp_sleep(struct wl1251 *wl);
int wl1251_ps_elp_wakeup(struct wl1251 *wl);
#endif /* __WL12XX_PS_H__ */
#endif /* __WL1251_PS_H__ */
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -31,8 +31,8 @@
#include "wl1251_rx.h"
#include "wl1251_acx.h"
static void wl12xx_rx_header(struct wl12xx *wl,
struct wl12xx_rx_descriptor *desc)
static void wl1251_rx_header(struct wl1251 *wl,
struct wl1251_rx_descriptor *desc)
{
u32 rx_packet_ring_addr;
......@@ -40,11 +40,11 @@ static void wl12xx_rx_header(struct wl12xx *wl,
if (wl->rx_current_buffer)
rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size;
wl12xx_spi_mem_read(wl, rx_packet_ring_addr, desc, sizeof(*desc));
wl1251_spi_mem_read(wl, rx_packet_ring_addr, desc, sizeof(*desc));
}
static void wl12xx_rx_status(struct wl12xx *wl,
struct wl12xx_rx_descriptor *desc,
static void wl1251_rx_status(struct wl1251 *wl,
struct wl1251_rx_descriptor *desc,
struct ieee80211_rx_status *status,
u8 beacon)
{
......@@ -65,14 +65,14 @@ static void wl12xx_rx_status(struct wl12xx *wl,
* this one must be atomic, while our SPI routines can sleep.
*/
if ((wl->bss_type == BSS_TYPE_IBSS) && beacon) {
ret = wl12xx_acx_tsf_info(wl, &mactime);
ret = wl1251_acx_tsf_info(wl, &mactime);
if (ret == 0)
status->mactime = mactime;
}
status->signal = desc->rssi;
status->qual = (desc->rssi - WL12XX_RX_MIN_RSSI) * 100 /
(WL12XX_RX_MAX_RSSI - WL12XX_RX_MIN_RSSI);
status->qual = (desc->rssi - WL1251_RX_MIN_RSSI) * 100 /
(WL1251_RX_MAX_RSSI - WL1251_RX_MIN_RSSI);
status->qual = min(status->qual, 100);
status->qual = max(status->qual, 0);
......@@ -103,8 +103,8 @@ static void wl12xx_rx_status(struct wl12xx *wl,
/* FIXME: set status->rate_idx */
}
static void wl12xx_rx_body(struct wl12xx *wl,
struct wl12xx_rx_descriptor *desc)
static void wl1251_rx_body(struct wl1251 *wl,
struct wl1251_rx_descriptor *desc)
{
struct sk_buff *skb;
struct ieee80211_rx_status status;
......@@ -112,12 +112,12 @@ static void wl12xx_rx_body(struct wl12xx *wl,
u16 length, *fc;
u32 curr_id, last_id_inc, rx_packet_ring_addr;
length = WL12XX_RX_ALIGN(desc->length - PLCP_HEADER_LENGTH);
length = WL1251_RX_ALIGN(desc->length - PLCP_HEADER_LENGTH);
curr_id = (desc->flags & RX_DESC_SEQNUM_MASK) >> RX_DESC_PACKETID_SHIFT;
last_id_inc = (wl->rx_last_id + 1) % (RX_MAX_PACKET_ID + 1);
if (last_id_inc != curr_id) {
wl12xx_warning("curr ID:%d, last ID inc:%d",
wl1251_warning("curr ID:%d, last ID inc:%d",
curr_id, last_id_inc);
wl->rx_last_id = curr_id;
} else {
......@@ -125,18 +125,18 @@ static void wl12xx_rx_body(struct wl12xx *wl,
}
rx_packet_ring_addr = wl->data_path->rx_packet_ring_addr +
sizeof(struct wl12xx_rx_descriptor) + 20;
sizeof(struct wl1251_rx_descriptor) + 20;
if (wl->rx_current_buffer)
rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size;
skb = dev_alloc_skb(length);
if (!skb) {
wl12xx_error("Couldn't allocate RX frame");
wl1251_error("Couldn't allocate RX frame");
return;
}
rx_buffer = skb_put(skb, length);
wl12xx_spi_mem_read(wl, rx_packet_ring_addr, rx_buffer, length);
wl1251_spi_mem_read(wl, rx_packet_ring_addr, rx_buffer, length);
/* The actual lenght doesn't include the target's alignment */
skb->len = desc->length - PLCP_HEADER_LENGTH;
......@@ -146,15 +146,15 @@ static void wl12xx_rx_body(struct wl12xx *wl,
if ((*fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BEACON)
beacon = 1;
wl12xx_rx_status(wl, desc, &status, beacon);
wl1251_rx_status(wl, desc, &status, beacon);
wl12xx_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb, skb->len,
wl1251_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb, skb->len,
beacon ? "beacon" : "");
ieee80211_rx(wl->hw, skb, &status);
}
static void wl12xx_rx_ack(struct wl12xx *wl)
static void wl1251_rx_ack(struct wl1251 *wl)
{
u32 data, addr;
......@@ -166,30 +166,30 @@ static void wl12xx_rx_ack(struct wl12xx *wl)
data = INTR_TRIG_RX_PROC0;
}
wl12xx_reg_write32(wl, addr, data);
wl1251_reg_write32(wl, addr, data);
/* Toggle buffer ring */
wl->rx_current_buffer = !wl->rx_current_buffer;
}
void wl12xx_rx(struct wl12xx *wl)
void wl1251_rx(struct wl1251 *wl)
{
struct wl12xx_rx_descriptor *rx_desc;
struct wl1251_rx_descriptor *rx_desc;
if (wl->state != WL12XX_STATE_ON)
if (wl->state != WL1251_STATE_ON)
return;
rx_desc = wl->rx_descriptor;
/* We first read the frame's header */
wl12xx_rx_header(wl, rx_desc);
wl1251_rx_header(wl, rx_desc);
/* Now we can read the body */
wl12xx_rx_body(wl, rx_desc);
wl1251_rx_body(wl, rx_desc);
/* Finally, we need to ACK the RX */
wl12xx_rx_ack(wl);
wl1251_rx_ack(wl);
return;
}
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -22,8 +22,8 @@
*
*/
#ifndef __WL12XX_RX_H__
#define __WL12XX_RX_H__
#ifndef __WL1251_RX_H__
#define __WL1251_RX_H__
#include <linux/bitops.h>
......@@ -45,12 +45,12 @@
* 4) The target prepares the next RX packet.
*/
#define WL12XX_RX_MAX_RSSI -30
#define WL12XX_RX_MIN_RSSI -95
#define WL1251_RX_MAX_RSSI -30
#define WL1251_RX_MIN_RSSI -95
#define WL12XX_RX_ALIGN_TO 4
#define WL12XX_RX_ALIGN(len) (((len) + WL12XX_RX_ALIGN_TO - 1) & \
~(WL12XX_RX_ALIGN_TO - 1))
#define WL1251_RX_ALIGN_TO 4
#define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \
~(WL1251_RX_ALIGN_TO - 1))
#define SHORT_PREAMBLE_BIT BIT(0)
#define OFDM_RATE_BIT BIT(6)
......@@ -74,7 +74,7 @@
#define RX_DESC_MIC_FAIL 0x2000
#define RX_DESC_DECRYPT_FAIL 0x4000
struct wl12xx_rx_descriptor {
struct wl1251_rx_descriptor {
u32 timestamp; /* In microseconds */
u16 length; /* Paylod length, including headers */
u16 flags;
......@@ -119,6 +119,6 @@ struct wl12xx_rx_descriptor {
u8 snr; /* in dB */
} __attribute__ ((packed));
void wl12xx_rx(struct wl12xx *wl);
void wl1251_rx(struct wl1251 *wl);
#endif
/*
* This file is part of wl12xx
* This file is part of wl1251
*
* Copyright (c) 1998-2007 Texas Instruments Incorporated
* Copyright (C) 2008 Nokia Corporation
......@@ -210,7 +210,7 @@ struct tx_result {
} __attribute__ ((packed));
void wl1251_tx_work(struct work_struct *work);
void wl1251_tx_complete(struct wl12xx *wl);
void wl1251_tx_flush(struct wl12xx *wl);
void wl1251_tx_complete(struct wl1251 *wl);
void wl1251_tx_flush(struct wl1251 *wl);
#endif
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