提交 8019aa94 编写于 作者: L Linus Torvalds

Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (79 commits)
  ata-acpi: don't call _GTF for disabled drive
  sata_mv add temporary 3 second init delay for SiliconImage PMs
  sata_mv remove redundant edma init code
  sata_mv add basic port multiplier support
  sata_mv fix SOC flags, enable NCQ on SOC
  sata_mv disable hotplug for now
  sata_mv cosmetics
  sata_mv hardreset rework
  [libata] improve Kconfig help text for new PMP, SFF options
  libata: make EH fail gracefully if no reset method is available
  libata: Be a bit more slack about early devices
  libata: cable logic
  libata: move link onlineness check out of softreset methods
  libata: kill dead code paths in reset path
  pata_scc: fix build breakage
  libata: make PMP support optional
  libata: implement PMP helpers
  libata: separate PMP support code from core code
  libata: make SFF support optional
  libata: don't use ap->ioaddr in non-SFF drivers
  ...
......@@ -28,7 +28,7 @@ config ATA_NONSTANDARD
default n
config ATA_ACPI
bool
bool "ATA ACPI Support"
depends on ACPI && PCI
select ACPI_DOCK
default y
......@@ -41,6 +41,13 @@ config ATA_ACPI
You can disable this at kernel boot time by using the
option libata.noacpi=1
config SATA_PMP
bool "SATA Port Multiplier support"
default y
help
This option adds support for SATA Port Multipliers
(the SATA version of an ethernet hub, or SAS expander).
config SATA_AHCI
tristate "AHCI SATA support"
depends on PCI
......@@ -49,6 +56,43 @@ config SATA_AHCI
If unsure, say N.
config SATA_SIL24
tristate "Silicon Image 3124/3132 SATA support"
depends on PCI
help
This option enables support for Silicon Image 3124/3132 Serial ATA.
If unsure, say N.
config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
depends on FSL_SOC
help
This option enables support for Freescale 3.0Gbps SATA controller.
It can be found on MPC837x and MPC8315.
If unsure, say N.
config ATA_SFF
bool "ATA SFF support"
default y
help
This option adds support for ATA controllers with SFF
compliant or similar programming interface.
SFF is the legacy IDE interface that has been around since
the dawn of time. Almost all PATA controllers have an
SFF interface. Many SATA controllers have an SFF interface
when configured into a legacy compatibility mode.
For users with exclusively modern controllers like AHCI,
Silicon Image 3124, or Marvell 6440, you may choose to
disable this uneeded SFF support.
If unsure, say Y.
if ATA_SFF
config SATA_SVW
tristate "ServerWorks Frodo / Apple K2 SATA support"
depends on PCI
......@@ -125,14 +169,6 @@ config SATA_SIL
If unsure, say N.
config SATA_SIL24
tristate "Silicon Image 3124/3132 SATA support"
depends on PCI
help
This option enables support for Silicon Image 3124/3132 Serial ATA.
If unsure, say N.
config SATA_SIS
tristate "SiS 964/965/966/180 SATA support"
depends on PCI
......@@ -183,15 +219,6 @@ config PATA_ACPI
firmware in the BIOS. This driver can sometimes handle
otherwise unsupported hardware.
config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
depends on FSL_SOC
help
This option enables support for Freescale 3.0Gbps SATA controller.
It can be found on MPC837x and MPC8315.
If unsure, say N.
config PATA_ALI
tristate "ALi PATA support (Experimental)"
depends on PCI && EXPERIMENTAL
......@@ -679,4 +706,5 @@ config PATA_BF54X
If unsure, say N.
endif # ATA_SFF
endif # ATA
......@@ -78,6 +78,7 @@ obj-$(CONFIG_ATA_GENERIC) += ata_generic.o
# Should be last libata driver
obj-$(CONFIG_PATA_LEGACY) += pata_legacy.o
libata-objs := libata-core.o libata-scsi.o libata-sff.o libata-eh.o \
libata-pmp.o
libata-objs := libata-core.o libata-scsi.o libata-eh.o
libata-$(CONFIG_ATA_SFF) += libata-sff.o
libata-$(CONFIG_SATA_PMP) += libata-pmp.o
libata-$(CONFIG_ATA_ACPI) += libata-acpi.o
......@@ -62,7 +62,6 @@ enum {
AHCI_MAX_PORTS = 32,
AHCI_MAX_SG = 168, /* hardware max is 64K */
AHCI_DMA_BOUNDARY = 0xffffffff,
AHCI_USE_CLUSTERING = 1,
AHCI_MAX_CMDS = 32,
AHCI_CMD_SZ = 32,
AHCI_CMD_SLOT_SZ = AHCI_MAX_CMDS * AHCI_CMD_SZ,
......@@ -198,7 +197,6 @@ enum {
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
ATA_FLAG_ACPI_SATA | ATA_FLAG_AN |
ATA_FLAG_IPM,
AHCI_LFLAG_COMMON = ATA_LFLAG_SKIP_D2H_BSY,
ICH_MAP = 0x90, /* ICH MAP register */
};
......@@ -245,19 +243,24 @@ static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
static void ahci_irq_clear(struct ata_port *ap);
static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
static int ahci_port_start(struct ata_port *ap);
static void ahci_port_stop(struct ata_port *ap);
static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
static void ahci_qc_prep(struct ata_queued_cmd *qc);
static u8 ahci_check_status(struct ata_port *ap);
static void ahci_freeze(struct ata_port *ap);
static void ahci_thaw(struct ata_port *ap);
static void ahci_pmp_attach(struct ata_port *ap);
static void ahci_pmp_detach(struct ata_port *ap);
static int ahci_softreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
static int ahci_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline);
static void ahci_postreset(struct ata_link *link, unsigned int *class);
static void ahci_error_handler(struct ata_port *ap);
static void ahci_vt8251_error_handler(struct ata_port *ap);
static void ahci_p5wdh_error_handler(struct ata_port *ap);
static void ahci_post_internal_cmd(struct ata_queued_cmd *qc);
static int ahci_port_resume(struct ata_port *ap);
static void ahci_dev_config(struct ata_device *dev);
......@@ -276,129 +279,54 @@ static struct class_device_attribute *ahci_shost_attrs[] = {
};
static struct scsi_host_template ahci_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
.ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
.change_queue_depth = ata_scsi_change_queue_depth,
ATA_NCQ_SHT(DRV_NAME),
.can_queue = AHCI_MAX_CMDS - 1,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = AHCI_MAX_SG,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = AHCI_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = AHCI_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
.slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
.shost_attrs = ahci_shost_attrs,
};
static const struct ata_port_operations ahci_ops = {
.check_status = ahci_check_status,
.check_altstatus = ahci_check_status,
.dev_select = ata_noop_dev_select,
.dev_config = ahci_dev_config,
.tf_read = ahci_tf_read,
static struct ata_port_operations ahci_ops = {
.inherits = &sata_pmp_port_ops,
.qc_defer = sata_pmp_qc_defer_cmd_switch,
.qc_prep = ahci_qc_prep,
.qc_issue = ahci_qc_issue,
.irq_clear = ahci_irq_clear,
.scr_read = ahci_scr_read,
.scr_write = ahci_scr_write,
.qc_fill_rtf = ahci_qc_fill_rtf,
.freeze = ahci_freeze,
.thaw = ahci_thaw,
.softreset = ahci_softreset,
.hardreset = ahci_hardreset,
.postreset = ahci_postreset,
.pmp_softreset = ahci_softreset,
.error_handler = ahci_error_handler,
.post_internal_cmd = ahci_post_internal_cmd,
.pmp_attach = ahci_pmp_attach,
.pmp_detach = ahci_pmp_detach,
#ifdef CONFIG_PM
.port_suspend = ahci_port_suspend,
.port_resume = ahci_port_resume,
#endif
.enable_pm = ahci_enable_alpm,
.disable_pm = ahci_disable_alpm,
.port_start = ahci_port_start,
.port_stop = ahci_port_stop,
};
static const struct ata_port_operations ahci_vt8251_ops = {
.check_status = ahci_check_status,
.check_altstatus = ahci_check_status,
.dev_select = ata_noop_dev_select,
.tf_read = ahci_tf_read,
.qc_defer = sata_pmp_qc_defer_cmd_switch,
.qc_prep = ahci_qc_prep,
.qc_issue = ahci_qc_issue,
.irq_clear = ahci_irq_clear,
.dev_config = ahci_dev_config,
.scr_read = ahci_scr_read,
.scr_write = ahci_scr_write,
.freeze = ahci_freeze,
.thaw = ahci_thaw,
.error_handler = ahci_vt8251_error_handler,
.post_internal_cmd = ahci_post_internal_cmd,
.pmp_attach = ahci_pmp_attach,
.pmp_detach = ahci_pmp_detach,
.enable_pm = ahci_enable_alpm,
.disable_pm = ahci_disable_alpm,
#ifdef CONFIG_PM
.port_suspend = ahci_port_suspend,
.port_resume = ahci_port_resume,
#endif
.port_start = ahci_port_start,
.port_stop = ahci_port_stop,
};
static const struct ata_port_operations ahci_p5wdh_ops = {
.check_status = ahci_check_status,
.check_altstatus = ahci_check_status,
.dev_select = ata_noop_dev_select,
.tf_read = ahci_tf_read,
.qc_defer = sata_pmp_qc_defer_cmd_switch,
.qc_prep = ahci_qc_prep,
.qc_issue = ahci_qc_issue,
.irq_clear = ahci_irq_clear,
.scr_read = ahci_scr_read,
.scr_write = ahci_scr_write,
.freeze = ahci_freeze,
.thaw = ahci_thaw,
.error_handler = ahci_p5wdh_error_handler,
.post_internal_cmd = ahci_post_internal_cmd,
.pmp_attach = ahci_pmp_attach,
.pmp_detach = ahci_pmp_detach,
#ifdef CONFIG_PM
.port_suspend = ahci_port_suspend,
.port_resume = ahci_port_resume,
#endif
static struct ata_port_operations ahci_vt8251_ops = {
.inherits = &ahci_ops,
.hardreset = ahci_vt8251_hardreset,
};
.port_start = ahci_port_start,
.port_stop = ahci_port_stop,
static struct ata_port_operations ahci_p5wdh_ops = {
.inherits = &ahci_ops,
.hardreset = ahci_p5wdh_hardreset,
};
#define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
......@@ -407,7 +335,6 @@ static const struct ata_port_info ahci_port_info[] = {
/* board_ahci */
{
.flags = AHCI_FLAG_COMMON,
.link_flags = AHCI_LFLAG_COMMON,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
......@@ -416,7 +343,6 @@ static const struct ata_port_info ahci_port_info[] = {
{
AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP),
.flags = AHCI_FLAG_COMMON,
.link_flags = AHCI_LFLAG_COMMON | ATA_LFLAG_HRST_TO_RESUME,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_vt8251_ops,
......@@ -425,7 +351,6 @@ static const struct ata_port_info ahci_port_info[] = {
{
AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR),
.flags = AHCI_FLAG_COMMON,
.link_flags = AHCI_LFLAG_COMMON,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
......@@ -436,7 +361,6 @@ static const struct ata_port_info ahci_port_info[] = {
AHCI_HFLAG_32BIT_ONLY |
AHCI_HFLAG_SECT255 | AHCI_HFLAG_NO_PMP),
.flags = AHCI_FLAG_COMMON,
.link_flags = AHCI_LFLAG_COMMON,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
......@@ -447,7 +371,6 @@ static const struct ata_port_info ahci_port_info[] = {
AHCI_HFLAG_MV_PATA),
.flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA,
.link_flags = AHCI_LFLAG_COMMON,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
......@@ -457,7 +380,6 @@ static const struct ata_port_info ahci_port_info[] = {
AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL |
AHCI_HFLAG_NO_PMP),
.flags = AHCI_FLAG_COMMON,
.link_flags = AHCI_LFLAG_COMMON,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_ops,
......@@ -1255,13 +1177,14 @@ static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
static int ahci_kick_engine(struct ata_port *ap, int force_restart)
{
void __iomem *port_mmio = ap->ioaddr.cmd_addr;
void __iomem *port_mmio = ahci_port_base(ap);
struct ahci_host_priv *hpriv = ap->host->private_data;
u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
u32 tmp;
int busy, rc;
/* do we need to kick the port? */
busy = ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ);
busy = status & (ATA_BUSY | ATA_DRQ);
if (!busy && !force_restart)
return 0;
......@@ -1328,10 +1251,21 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
return 0;
}
static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
int pmp, unsigned long deadline)
static int ahci_check_ready(struct ata_link *link)
{
void __iomem *port_mmio = ahci_port_base(link->ap);
u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;
if (!(status & ATA_BUSY))
return 1;
return 0;
}
static int ahci_softreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
struct ata_port *ap = link->ap;
int pmp = sata_srst_pmp(link);
const char *reason = NULL;
unsigned long now, msecs;
struct ata_taskfile tf;
......@@ -1339,12 +1273,6 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
DPRINTK("ENTER\n");
if (ata_link_offline(link)) {
DPRINTK("PHY reports no device\n");
*class = ATA_DEV_NONE;
return 0;
}
/* prepare for SRST (AHCI-1.1 10.4.1) */
rc = ahci_kick_engine(ap, 1);
if (rc && rc != -EOPNOTSUPP)
......@@ -1374,10 +1302,8 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
tf.ctl &= ~ATA_SRST;
ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
/* wait a while before checking status */
ata_wait_after_reset(ap, deadline);
rc = ata_wait_ready(ap, deadline);
/* wait for link to become ready */
rc = ata_wait_after_reset(link, deadline, ahci_check_ready);
/* link occupied, -ENODEV too is an error */
if (rc) {
reason = "device not ready";
......@@ -1393,24 +1319,15 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
return rc;
}
static int ahci_softreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
int pmp = 0;
if (link->ap->flags & ATA_FLAG_PMP)
pmp = SATA_PMP_CTRL_PORT;
return ahci_do_softreset(link, class, pmp, deadline);
}
static int ahci_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
struct ata_port *ap = link->ap;
struct ahci_port_priv *pp = ap->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
bool online;
int rc;
DPRINTK("ENTER\n");
......@@ -1422,14 +1339,13 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class,
tf.command = 0x80;
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_std_hardreset(link, class, deadline);
rc = sata_link_hardreset(link, timing, deadline, &online,
ahci_check_ready);
ahci_start_engine(ap);
if (rc == 0 && ata_link_online(link))
if (online)
*class = ahci_dev_classify(ap);
if (rc != -EAGAIN && *class == ATA_DEV_UNKNOWN)
*class = ATA_DEV_NONE;
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
return rc;
......@@ -1439,7 +1355,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
struct ata_port *ap = link->ap;
u32 serror;
bool online;
int rc;
DPRINTK("ENTER\n");
......@@ -1447,11 +1363,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
ahci_stop_engine(ap);
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
deadline);
/* vt8251 needs SError cleared for the port to operate */
ahci_scr_read(ap, SCR_ERROR, &serror);
ahci_scr_write(ap, SCR_ERROR, serror);
deadline, &online, NULL);
ahci_start_engine(ap);
......@@ -1460,7 +1372,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class,
/* vt8251 doesn't clear BSY on signature FIS reception,
* request follow-up softreset.
*/
return rc ?: -EAGAIN;
return online ? -EAGAIN : rc;
}
static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
......@@ -1470,6 +1382,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
struct ahci_port_priv *pp = ap->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
bool online;
int rc;
ahci_stop_engine(ap);
......@@ -1480,16 +1393,10 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
ata_tf_to_fis(&tf, 0, 0, d2h_fis);
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
deadline);
deadline, &online, NULL);
ahci_start_engine(ap);
if (rc || ata_link_offline(link))
return rc;
/* spec mandates ">= 2ms" before checking status */
msleep(150);
/* The pseudo configuration device on SIMG4726 attached to
* ASUS P5W-DH Deluxe doesn't send signature FIS after
* hardreset if no device is attached to the first downstream
......@@ -1503,11 +1410,13 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class,
* have to be reset again. For most cases, this should
* suffice while making probing snappish enough.
*/
rc = ata_wait_ready(ap, jiffies + 2 * HZ);
if (rc)
ahci_kick_engine(ap, 0);
return 0;
if (online) {
rc = ata_wait_after_reset(link, jiffies + 2 * HZ,
ahci_check_ready);
if (rc)
ahci_kick_engine(ap, 0);
}
return rc;
}
static void ahci_postreset(struct ata_link *link, unsigned int *class)
......@@ -1530,27 +1439,6 @@ static void ahci_postreset(struct ata_link *link, unsigned int *class)
}
}
static int ahci_pmp_softreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
return ahci_do_softreset(link, class, link->pmp, deadline);
}
static u8 ahci_check_status(struct ata_port *ap)
{
void __iomem *mmio = ap->ioaddr.cmd_addr;
return readl(mmio + PORT_TFDATA) & 0xFF;
}
static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
{
struct ahci_port_priv *pp = ap->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
ata_tf_from_fis(d2h_fis, tf);
}
static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
{
struct scatterlist *sg;
......@@ -1663,27 +1551,27 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
u32 *unk = (u32 *)(pp->rx_fis + RX_FIS_UNK);
active_ehi->err_mask |= AC_ERR_HSM;
active_ehi->action |= ATA_EH_SOFTRESET;
active_ehi->action |= ATA_EH_RESET;
ata_ehi_push_desc(active_ehi,
"unknown FIS %08x %08x %08x %08x" ,
unk[0], unk[1], unk[2], unk[3]);
}
if (ap->nr_pmp_links && (irq_stat & PORT_IRQ_BAD_PMP)) {
if (sata_pmp_attached(ap) && (irq_stat & PORT_IRQ_BAD_PMP)) {
active_ehi->err_mask |= AC_ERR_HSM;
active_ehi->action |= ATA_EH_SOFTRESET;
active_ehi->action |= ATA_EH_RESET;
ata_ehi_push_desc(active_ehi, "incorrect PMP");
}
if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) {
host_ehi->err_mask |= AC_ERR_HOST_BUS;
host_ehi->action |= ATA_EH_SOFTRESET;
host_ehi->action |= ATA_EH_RESET;
ata_ehi_push_desc(host_ehi, "host bus error");
}
if (irq_stat & PORT_IRQ_IF_ERR) {
host_ehi->err_mask |= AC_ERR_ATA_BUS;
host_ehi->action |= ATA_EH_SOFTRESET;
host_ehi->action |= ATA_EH_RESET;
ata_ehi_push_desc(host_ehi, "interface fatal error");
}
......@@ -1704,7 +1592,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
static void ahci_port_intr(struct ata_port *ap)
{
void __iomem *port_mmio = ap->ioaddr.cmd_addr;
void __iomem *port_mmio = ahci_port_base(ap);
struct ata_eh_info *ehi = &ap->link.eh_info;
struct ahci_port_priv *pp = ap->private_data;
struct ahci_host_priv *hpriv = ap->host->private_data;
......@@ -1766,21 +1654,16 @@ static void ahci_port_intr(struct ata_port *ap)
else
qc_active = readl(port_mmio + PORT_CMD_ISSUE);
rc = ata_qc_complete_multiple(ap, qc_active, NULL);
rc = ata_qc_complete_multiple(ap, qc_active);
/* while resetting, invalid completions are expected */
if (unlikely(rc < 0 && !resetting)) {
ehi->err_mask |= AC_ERR_HSM;
ehi->action |= ATA_EH_SOFTRESET;
ehi->action |= ATA_EH_RESET;
ata_port_freeze(ap);
}
}
static void ahci_irq_clear(struct ata_port *ap)
{
/* TODO */
}
static irqreturn_t ahci_interrupt(int irq, void *dev_instance)
{
struct ata_host *host = dev_instance;
......@@ -1854,6 +1737,15 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc)
return 0;
}
static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc)
{
struct ahci_port_priv *pp = qc->ap->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
ata_tf_from_fis(d2h_fis, &qc->result_tf);
return true;
}
static void ahci_freeze(struct ata_port *ap)
{
void __iomem *port_mmio = ahci_port_base(ap);
......@@ -1886,37 +1778,7 @@ static void ahci_error_handler(struct ata_port *ap)
ahci_start_engine(ap);
}
/* perform recovery */
sata_pmp_do_eh(ap, ata_std_prereset, ahci_softreset,
ahci_hardreset, ahci_postreset,
sata_pmp_std_prereset, ahci_pmp_softreset,
sata_pmp_std_hardreset, sata_pmp_std_postreset);
}
static void ahci_vt8251_error_handler(struct ata_port *ap)
{
if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
/* restart engine */
ahci_stop_engine(ap);
ahci_start_engine(ap);
}
/* perform recovery */
ata_do_eh(ap, ata_std_prereset, ahci_softreset, ahci_vt8251_hardreset,
ahci_postreset);
}
static void ahci_p5wdh_error_handler(struct ata_port *ap)
{
if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
/* restart engine */
ahci_stop_engine(ap);
ahci_start_engine(ap);
}
/* perform recovery */
ata_do_eh(ap, ata_std_prereset, ahci_softreset, ahci_p5wdh_hardreset,
ahci_postreset);
sata_pmp_error_handler(ap);
}
static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
......@@ -1961,7 +1823,7 @@ static int ahci_port_resume(struct ata_port *ap)
ahci_power_up(ap);
ahci_start_port(ap);
if (ap->nr_pmp_links)
if (sata_pmp_attached(ap))
ahci_pmp_attach(ap);
else
ahci_pmp_detach(ap);
......@@ -2324,7 +2186,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
for (i = 0; i < host->n_ports; i++) {
struct ata_port *ap = host->ports[i];
void __iomem *port_mmio = ahci_port_base(ap);
ata_port_pbar_desc(ap, AHCI_PCI_BAR, -1, "abar");
ata_port_pbar_desc(ap, AHCI_PCI_BAR,
......@@ -2333,12 +2194,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
/* set initial link pm policy */
ap->pm_policy = NOT_AVAILABLE;
/* standard SATA port setup */
if (hpriv->port_map & (1 << i))
ap->ioaddr.cmd_addr = port_mmio;
/* disabled/not-implemented port */
else
if (!(hpriv->port_map & (1 << i)))
ap->ops = &ata_dummy_port_ops;
}
......
......@@ -95,53 +95,13 @@ static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
}
static struct scsi_host_template generic_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
.ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = LIBATA_MAX_PRD,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
.slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
ATA_BMDMA_SHT(DRV_NAME),
};
static struct ata_port_operations generic_port_ops = {
.set_mode = generic_set_mode,
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = ata_bmdma_status,
.data_xfer = ata_data_xfer,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = ata_bmdma_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
.inherits = &ata_bmdma_port_ops,
.cable_detect = ata_cable_unknown,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.port_start = ata_sff_port_start,
.set_mode = generic_set_mode,
};
static int all_generic_ide; /* Set to claim all devices */
......@@ -160,7 +120,6 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
{
u16 command;
static const struct ata_port_info info = {
.sht = &generic_sht,
.flags = ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f,
.mwdma_mask = 0x07,
......@@ -191,9 +150,9 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
return -ENODEV;
if (dev->vendor == PCI_VENDOR_ID_AL)
ata_pci_clear_simplex(dev);
ata_pci_bmdma_clear_simplex(dev);
return ata_pci_init_one(dev, ppi);
return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL);
}
static struct pci_device_id ata_generic[] = {
......
......@@ -100,13 +100,11 @@ enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
ICH5_PMR = 0x90, /* port mapping register */
ICH5_PCS = 0x92, /* port control and status */
PIIX_SCC = 0x0A, /* sub-class code register */
PIIX_SIDPR_BAR = 5,
PIIX_SIDPR_LEN = 16,
PIIX_SIDPR_IDX = 0,
PIIX_SIDPR_DATA = 4,
PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */
PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */
PIIX_FLAG_SIDPR = (1 << 29), /* SATA idx/data pair regs */
......@@ -140,12 +138,11 @@ enum piix_controller_ids {
ich_pata_100, /* ICH up to UDMA 100 */
ich5_sata,
ich6_sata,
ich6_sata_ahci,
ich6m_sata_ahci,
ich8_sata_ahci,
ich6m_sata,
ich8_sata,
ich8_2port_sata,
ich8m_apple_sata_ahci, /* locks up on second port enable */
tolapai_sata_ahci,
ich8m_apple_sata, /* locks up on second port enable */
tolapai_sata,
piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */
};
......@@ -162,7 +159,7 @@ struct piix_host_priv {
static int piix_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent);
static void piix_pata_error_handler(struct ata_port *ap);
static int piix_pata_prereset(struct ata_link *link, unsigned long deadline);
static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev);
static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev);
static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev);
......@@ -170,7 +167,6 @@ static int ich_pata_cable_detect(struct ata_port *ap);
static u8 piix_vmw_bmdma_status(struct ata_port *ap);
static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val);
static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val);
static void piix_sidpr_error_handler(struct ata_port *ap);
#ifdef CONFIG_PM
static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
static int piix_pci_device_resume(struct pci_dev *pdev);
......@@ -236,25 +232,27 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* 82801FB/FW (ICH6/ICH6W) */
{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 82801FR/FRW (ICH6R/ICH6RW) */
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented) */
{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
* Attach iff the controller is in IDE mode. */
{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
/* 82801GB/GR/GH (ICH7, identical to ICH6) */
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
/* Enterprise Southbridge 2 (631xESB/632xESB) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* SATA Controller 1 IDE (ICH8) */
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller 2 IDE (ICH8) */
{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* Mobile SATA Controller IDE (ICH8M) */
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* Mobile SATA Controller IDE (ICH8M), Apple */
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci },
{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH9) */
{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH9) */
......@@ -264,15 +262,15 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* SATA Controller IDE (ICH9M) */
{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH9M) */
{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (Tolapai) */
{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata_ahci },
{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
/* SATA Controller IDE (ICH10) */
{ 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
......@@ -291,170 +289,37 @@ static struct pci_driver piix_pci_driver = {
};
static struct scsi_host_template piix_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
.ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = LIBATA_MAX_PRD,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
.dma_boundary = ATA_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
.slave_destroy = ata_scsi_slave_destroy,
.bios_param = ata_std_bios_param,
ATA_BMDMA_SHT(DRV_NAME),
};
static const struct ata_port_operations piix_pata_ops = {
static struct ata_port_operations piix_pata_ops = {
.inherits = &ata_bmdma_port_ops,
.cable_detect = ata_cable_40wire,
.set_piomode = piix_set_piomode,
.set_dmamode = piix_set_dmamode,
.mode_filter = ata_pci_default_filter,
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.data_xfer = ata_data_xfer,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = piix_pata_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
.cable_detect = ata_cable_40wire,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.prereset = piix_pata_prereset,
};
.port_start = ata_port_start,
static struct ata_port_operations piix_vmw_ops = {
.inherits = &piix_pata_ops,
.bmdma_status = piix_vmw_bmdma_status,
};
static const struct ata_port_operations ich_pata_ops = {
.set_piomode = piix_set_piomode,
.set_dmamode = ich_set_dmamode,
.mode_filter = ata_pci_default_filter,
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.data_xfer = ata_data_xfer,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = piix_pata_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
static struct ata_port_operations ich_pata_ops = {
.inherits = &piix_pata_ops,
.cable_detect = ich_pata_cable_detect,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.port_start = ata_port_start,
.set_dmamode = ich_set_dmamode,
};
static const struct ata_port_operations piix_sata_ops = {
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.data_xfer = ata_data_xfer,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = ata_bmdma_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.port_start = ata_port_start,
static struct ata_port_operations piix_sata_ops = {
.inherits = &ata_bmdma_port_ops,
};
static const struct ata_port_operations piix_vmw_ops = {
.set_piomode = piix_set_piomode,
.set_dmamode = piix_set_dmamode,
.mode_filter = ata_pci_default_filter,
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = piix_vmw_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.data_xfer = ata_data_xfer,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = piix_pata_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
.cable_detect = ata_cable_40wire,
.irq_handler = ata_interrupt,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.port_start = ata_port_start,
};
static const struct ata_port_operations piix_sidpr_sata_ops = {
.tf_load = ata_tf_load,
.tf_read = ata_tf_read,
.check_status = ata_check_status,
.exec_command = ata_exec_command,
.dev_select = ata_std_dev_select,
.bmdma_setup = ata_bmdma_setup,
.bmdma_start = ata_bmdma_start,
.bmdma_stop = ata_bmdma_stop,
.bmdma_status = ata_bmdma_status,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
.data_xfer = ata_data_xfer,
static struct ata_port_operations piix_sidpr_sata_ops = {
.inherits = &piix_sata_ops,
.hardreset = sata_std_hardreset,
.scr_read = piix_sidpr_scr_read,
.scr_write = piix_sidpr_scr_write,
.freeze = ata_bmdma_freeze,
.thaw = ata_bmdma_thaw,
.error_handler = piix_sidpr_error_handler,
.post_internal_cmd = ata_bmdma_post_internal_cmd,
.irq_clear = ata_bmdma_irq_clear,
.irq_on = ata_irq_on,
.port_start = ata_port_start,
};
static const struct piix_map_db ich5_map_db = {
......@@ -553,12 +418,11 @@ static const struct piix_map_db tolapai_map_db = {
static const struct piix_map_db *piix_map_db_table[] = {
[ich5_sata] = &ich5_map_db,
[ich6_sata] = &ich6_map_db,
[ich6_sata_ahci] = &ich6_map_db,
[ich6m_sata_ahci] = &ich6m_map_db,
[ich8_sata_ahci] = &ich8_map_db,
[ich6m_sata] = &ich6m_map_db,
[ich8_sata] = &ich8_map_db,
[ich8_2port_sata] = &ich8_2port_map_db,
[ich8m_apple_sata_ahci] = &ich8m_apple_map_db,
[tolapai_sata_ahci] = &tolapai_map_db,
[ich8m_apple_sata] = &ich8m_apple_map_db,
[tolapai_sata] = &tolapai_map_db,
};
static struct ata_port_info piix_port_info[] = {
......@@ -624,28 +488,18 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},
[ich6_sata_ahci] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
[ich6m_sata_ahci] =
[ich6m_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
.flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
[ich8_sata_ahci] =
[ich8_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
PIIX_FLAG_SIDPR,
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
......@@ -654,27 +508,25 @@ static struct ata_port_info piix_port_info[] = {
[ich8_2port_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
PIIX_FLAG_SIDPR,
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
[tolapai_sata_ahci] =
[tolapai_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
.flags = PIIX_SATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
.port_ops = &piix_sata_ops,
},
[ich8m_apple_sata_ahci] =
[ich8m_apple_sata] =
{
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
PIIX_FLAG_SIDPR,
.flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = ATA_UDMA6,
......@@ -683,7 +535,6 @@ static struct ata_port_info piix_port_info[] = {
[piix_pata_vmw] =
{
.sht = &piix_sht,
.flags = PIIX_PATA_FLAGS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
......@@ -776,13 +627,7 @@ static int piix_pata_prereset(struct ata_link *link, unsigned long deadline)
if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no]))
return -ENOENT;
return ata_std_prereset(link, deadline);
}
static void piix_pata_error_handler(struct ata_port *ap)
{
ata_bmdma_drive_eh(ap, piix_pata_prereset, ata_std_softreset, NULL,
ata_std_postreset);
return ata_sff_prereset(link, deadline);
}
/**
......@@ -1168,35 +1013,6 @@ static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val)
return 0;
}
static int piix_sidpr_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
int rc;
/* do hardreset */
rc = sata_link_hardreset(link, timing, deadline);
if (rc) {
ata_link_printk(link, KERN_ERR,
"COMRESET failed (errno=%d)\n", rc);
return rc;
}
/* TODO: phy layer with polling, timeouts, etc. */
if (ata_link_offline(link)) {
*class = ATA_DEV_NONE;
return 0;
}
return -EAGAIN;
}
static void piix_sidpr_error_handler(struct ata_port *ap)
{
ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset,
piix_sidpr_hardreset, ata_std_postreset);
}
#ifdef CONFIG_PM
static int piix_broken_suspend(void)
{
......@@ -1633,6 +1449,16 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
if (rc)
return rc;
/* ICH6R may be driven by either ata_piix or ahci driver
* regardless of BIOS configuration. Make sure AHCI mode is
* off.
*/
if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {
int rc = piix_disable_ahci(pdev);
if (rc)
return rc;
}
/* SATA map init can change port_info, do it before prepping host */
hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
if (!hpriv)
......@@ -1642,22 +1468,12 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
hpriv->map = piix_init_sata_map(pdev, port_info,
piix_map_db_table[ent->driver_data]);
rc = ata_pci_prepare_sff_host(pdev, ppi, &host);
rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
if (rc)
return rc;
host->private_data = hpriv;
/* initialize controller */
if (port_flags & PIIX_FLAG_AHCI) {
u8 tmp;
pci_read_config_byte(pdev, PIIX_SCC, &tmp);
if (tmp == PIIX_AHCI_DEVICE) {
rc = piix_disable_ahci(pdev);
if (rc)
return rc;
}
}
if (port_flags & ATA_FLAG_SATA) {
piix_init_pcs(host, piix_map_db_table[ent->driver_data]);
piix_init_sidpr(host);
......@@ -1686,7 +1502,7 @@ static int __devinit piix_init_one(struct pci_dev *pdev,
}
pci_set_master(pdev);
return ata_pci_activate_sff_host(host, ata_interrupt, &piix_sht);
return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht);
}
static int __init piix_init(void)
......
......@@ -77,7 +77,7 @@ void ata_acpi_associate_sata_port(struct ata_port *ap)
{
WARN_ON(!(ap->flags & ATA_FLAG_ACPI_SATA));
if (!ap->nr_pmp_links) {
if (!sata_pmp_attached(ap)) {
acpi_integer adr = SATA_ADR(ap->port_no, NO_PORT_MULT);
ap->link.device->acpi_handle =
......@@ -839,7 +839,8 @@ void ata_acpi_on_resume(struct ata_port *ap)
*/
ata_link_for_each_dev(dev, &ap->link) {
ata_acpi_clear_gtf(dev);
if (ata_dev_get_GTF(dev, NULL) >= 0)
if (ata_dev_enabled(dev) &&
ata_dev_get_GTF(dev, NULL) >= 0)
dev->flags |= ATA_DFLAG_ACPI_PENDING;
}
} else {
......@@ -849,7 +850,8 @@ void ata_acpi_on_resume(struct ata_port *ap)
*/
ata_link_for_each_dev(dev, &ap->link) {
ata_acpi_clear_gtf(dev);
dev->flags |= ATA_DFLAG_ACPI_PENDING;
if (ata_dev_enabled(dev))
dev->flags |= ATA_DFLAG_ACPI_PENDING;
}
}
}
......
此差异已折叠。
......@@ -873,9 +873,9 @@ int sata_async_notification(struct ata_port *ap)
if (rc == 0)
sata_scr_write(&ap->link, SCR_NOTIFICATION, sntf);
if (!ap->nr_pmp_links || rc) {
if (!sata_pmp_attached(ap) || rc) {
/* PMP is not attached or SNTF is not available */
if (!ap->nr_pmp_links) {
if (!sata_pmp_attached(ap)) {
/* PMP is not attached. Check whether ATAPI
* AN is configured. If so, notify media
* change.
......@@ -1079,19 +1079,6 @@ void ata_eh_about_to_do(struct ata_link *link, struct ata_device *dev,
spin_lock_irqsave(ap->lock, flags);
/* Reset is represented by combination of actions and EHI
* flags. Suck in all related bits before clearing eh_info to
* avoid losing requested action.
*/
if (action & ATA_EH_RESET_MASK) {
ehc->i.action |= ehi->action & ATA_EH_RESET_MASK;
ehc->i.flags |= ehi->flags & ATA_EHI_RESET_MODIFIER_MASK;
/* make sure all reset actions are cleared & clear EHI flags */
action |= ATA_EH_RESET_MASK;
ehi->flags &= ~ATA_EHI_RESET_MODIFIER_MASK;
}
ata_eh_clear_action(link, dev, ehi, action);
if (!(ehc->i.flags & ATA_EHI_QUIET))
......@@ -1117,12 +1104,6 @@ void ata_eh_done(struct ata_link *link, struct ata_device *dev,
{
struct ata_eh_context *ehc = &link->eh_context;
/* if reset is complete, clear all reset actions & reset modifier */
if (action & ATA_EH_RESET_MASK) {
action |= ATA_EH_RESET_MASK;
ehc->i.flags &= ~ATA_EHI_RESET_MODIFIER_MASK;
}
ata_eh_clear_action(link, dev, &ehc->i, action);
}
......@@ -1329,20 +1310,20 @@ static void ata_eh_analyze_serror(struct ata_link *link)
if (serror & SERR_PERSISTENT) {
err_mask |= AC_ERR_ATA_BUS;
action |= ATA_EH_HARDRESET;
action |= ATA_EH_RESET;
}
if (serror &
(SERR_DATA_RECOVERED | SERR_COMM_RECOVERED | SERR_DATA)) {
err_mask |= AC_ERR_ATA_BUS;
action |= ATA_EH_SOFTRESET;
action |= ATA_EH_RESET;
}
if (serror & SERR_PROTOCOL) {
err_mask |= AC_ERR_HSM;
action |= ATA_EH_SOFTRESET;
action |= ATA_EH_RESET;
}
if (serror & SERR_INTERNAL) {
err_mask |= AC_ERR_SYSTEM;
action |= ATA_EH_HARDRESET;
action |= ATA_EH_RESET;
}
/* Determine whether a hotplug event has occurred. Both
......@@ -1448,7 +1429,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
if ((stat & (ATA_BUSY | ATA_DRQ | ATA_DRDY)) != ATA_DRDY) {
qc->err_mask |= AC_ERR_HSM;
return ATA_EH_SOFTRESET;
return ATA_EH_RESET;
}
if (stat & (ATA_ERR | ATA_DF))
......@@ -1484,7 +1465,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
}
if (qc->err_mask & (AC_ERR_HSM | AC_ERR_TIMEOUT | AC_ERR_ATA_BUS))
action |= ATA_EH_SOFTRESET;
action |= ATA_EH_RESET;
return action;
}
......@@ -1685,7 +1666,7 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev,
if (verdict & ATA_EH_SPDN_SPEED_DOWN) {
/* speed down SATA link speed if possible */
if (sata_down_spd_limit(link) == 0) {
action |= ATA_EH_HARDRESET;
action |= ATA_EH_RESET;
goto done;
}
......@@ -1705,7 +1686,7 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev,
dev->spdn_cnt++;
if (ata_down_xfermask_limit(dev, sel) == 0) {
action |= ATA_EH_SOFTRESET;
action |= ATA_EH_RESET;
goto done;
}
}
......@@ -1719,7 +1700,7 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev,
(dev->xfer_shift != ATA_SHIFT_PIO)) {
if (ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO) == 0) {
dev->spdn_cnt = 0;
action |= ATA_EH_SOFTRESET;
action |= ATA_EH_RESET;
goto done;
}
}
......@@ -1764,9 +1745,9 @@ static void ata_eh_link_autopsy(struct ata_link *link)
ehc->i.serror |= serror;
ata_eh_analyze_serror(link);
} else if (rc != -EOPNOTSUPP) {
/* SError read failed, force hardreset and probing */
ata_ehi_schedule_probe(&ehc->i);
ehc->i.action |= ATA_EH_HARDRESET;
/* SError read failed, force reset and probing */
ehc->i.probe_mask |= ATA_ALL_DEVICES;
ehc->i.action |= ATA_EH_RESET;
ehc->i.err_mask |= AC_ERR_OTHER;
}
......@@ -1804,6 +1785,11 @@ static void ata_eh_link_autopsy(struct ata_link *link)
if (qc->flags & ATA_QCFLAG_SENSE_VALID)
qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER);
/* determine whether the command is worth retrying */
if (!(qc->err_mask & AC_ERR_INVALID) &&
((qc->flags & ATA_QCFLAG_IO) || qc->err_mask != AC_ERR_DEV))
qc->flags |= ATA_QCFLAG_RETRY;
/* accumulate error info */
ehc->i.dev = qc->dev;
all_err_mask |= qc->err_mask;
......@@ -1814,7 +1800,7 @@ static void ata_eh_link_autopsy(struct ata_link *link)
/* enforce default EH actions */
if (ap->pflags & ATA_PFLAG_FROZEN ||
all_err_mask & (AC_ERR_HSM | AC_ERR_TIMEOUT))
ehc->i.action |= ATA_EH_SOFTRESET;
ehc->i.action |= ATA_EH_RESET;
else if (((eflags & ATA_EFLAG_IS_IO) && all_err_mask) ||
(!(eflags & ATA_EFLAG_IS_IO) && (all_err_mask & ~AC_ERR_DEV)))
ehc->i.action |= ATA_EH_REVALIDATE;
......@@ -1867,7 +1853,7 @@ void ata_eh_autopsy(struct ata_port *ap)
/* Autopsy of fanout ports can affect host link autopsy.
* Perform host link autopsy last.
*/
if (ap->nr_pmp_links)
if (sata_pmp_attached(ap))
ata_eh_link_autopsy(&ap->link);
}
......@@ -2066,41 +2052,29 @@ static int ata_do_reset(struct ata_link *link, ata_reset_fn_t reset,
classes[dev->devno] = ATA_DEV_UNKNOWN;
rc = reset(link, classes, deadline);
if (rc)
return rc;
/* If any class isn't ATA_DEV_UNKNOWN, consider classification
* is complete and convert all ATA_DEV_UNKNOWN to
* ATA_DEV_NONE.
*/
/* convert all ATA_DEV_UNKNOWN to ATA_DEV_NONE */
ata_link_for_each_dev(dev, link)
if (classes[dev->devno] != ATA_DEV_UNKNOWN)
break;
if (dev) {
ata_link_for_each_dev(dev, link) {
if (classes[dev->devno] == ATA_DEV_UNKNOWN)
classes[dev->devno] = ATA_DEV_NONE;
}
}
if (classes[dev->devno] == ATA_DEV_UNKNOWN)
classes[dev->devno] = ATA_DEV_NONE;
return 0;
return rc;
}
static int ata_eh_followup_srst_needed(struct ata_link *link,
int rc, int classify,
const unsigned int *classes)
{
if (link->flags & ATA_LFLAG_NO_SRST)
if ((link->flags & ATA_LFLAG_NO_SRST) || ata_link_offline(link))
return 0;
if (rc == -EAGAIN)
return 1;
if (rc == -EAGAIN) {
if (classify)
return 1;
rc = 0;
}
if (rc != 0)
return 0;
if ((link->ap->flags & ATA_FLAG_PMP) && ata_is_host_link(link))
return 1;
if (classify && !(link->flags & ATA_LFLAG_ASSUME_CLASS) &&
classes[0] == ATA_DEV_UNKNOWN)
if (sata_pmp_supported(link->ap) && ata_is_host_link(link))
return 1;
return 0;
}
......@@ -2118,7 +2092,6 @@ int ata_eh_reset(struct ata_link *link, int classify,
int try = 0;
struct ata_device *dev;
unsigned long deadline, now;
unsigned int tmp_action;
ata_reset_fn_t reset;
unsigned long flags;
u32 sstatus;
......@@ -2129,7 +2102,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
ap->pflags |= ATA_PFLAG_RESETTING;
spin_unlock_irqrestore(ap->lock, flags);
ata_eh_about_to_do(link, NULL, ehc->i.action & ATA_EH_RESET_MASK);
ata_eh_about_to_do(link, NULL, ATA_EH_RESET);
ata_link_for_each_dev(dev, link) {
/* If we issue an SRST then an ATA drive (not ATAPI)
......@@ -2159,17 +2132,20 @@ int ata_eh_reset(struct ata_link *link, int classify,
goto done;
}
/* Determine which reset to use and record in ehc->i.action.
* prereset() may examine and modify it.
*/
if (softreset && (!hardreset || (!(lflags & ATA_LFLAG_NO_SRST) &&
!sata_set_spd_needed(link) &&
!(ehc->i.action & ATA_EH_HARDRESET))))
tmp_action = ATA_EH_SOFTRESET;
else
tmp_action = ATA_EH_HARDRESET;
ehc->i.action = (ehc->i.action & ~ATA_EH_RESET_MASK) | tmp_action;
/* prefer hardreset */
ehc->i.action &= ~ATA_EH_RESET;
if (hardreset) {
reset = hardreset;
ehc->i.action = ATA_EH_HARDRESET;
} else if (softreset) {
reset = softreset;
ehc->i.action = ATA_EH_SOFTRESET;
} else {
ata_link_printk(link, KERN_ERR, "BUG: no reset method, "
"please report to linux-ide@vger.kernel.org\n");
dump_stack();
return -EINVAL;
}
if (prereset) {
rc = prereset(link, jiffies + ATA_EH_PRERESET_TIMEOUT);
......@@ -2177,7 +2153,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
if (rc == -ENOENT) {
ata_link_printk(link, KERN_DEBUG,
"port disabled. ignoring.\n");
ehc->i.action &= ~ATA_EH_RESET_MASK;
ehc->i.action &= ~ATA_EH_RESET;
ata_link_for_each_dev(dev, link)
classes[dev->devno] = ATA_DEV_NONE;
......@@ -2190,12 +2166,8 @@ int ata_eh_reset(struct ata_link *link, int classify,
}
}
/* prereset() might have modified ehc->i.action */
if (ehc->i.action & ATA_EH_HARDRESET)
reset = hardreset;
else if (ehc->i.action & ATA_EH_SOFTRESET)
reset = softreset;
else {
/* prereset() might have cleared ATA_EH_RESET */
if (!(ehc->i.action & ATA_EH_RESET)) {
/* prereset told us not to reset, bang classes and return */
ata_link_for_each_dev(dev, link)
classes[dev->devno] = ATA_DEV_NONE;
......@@ -2203,14 +2175,6 @@ int ata_eh_reset(struct ata_link *link, int classify,
goto out;
}
/* did prereset() screw up? if so, fix up to avoid oopsing */
if (!reset) {
if (softreset)
reset = softreset;
else
reset = hardreset;
}
retry:
deadline = jiffies + ata_eh_reset_timeouts[try++];
......@@ -2240,7 +2204,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
goto fail;
}
ata_eh_about_to_do(link, NULL, ATA_EH_RESET_MASK);
ata_eh_about_to_do(link, NULL, ATA_EH_RESET);
rc = ata_do_reset(link, reset, classes, deadline);
}
......@@ -2248,21 +2212,6 @@ int ata_eh_reset(struct ata_link *link, int classify,
if (rc && rc != -EAGAIN)
goto fail;
/* was classification successful? */
if (classify && classes[0] == ATA_DEV_UNKNOWN &&
!(lflags & ATA_LFLAG_ASSUME_CLASS)) {
if (try < max_tries) {
ata_link_printk(link, KERN_WARNING,
"classification failed\n");
rc = -EINVAL;
goto fail;
}
ata_link_printk(link, KERN_WARNING,
"classfication failed, assuming ATA\n");
lflags |= ATA_LFLAG_ASSUME_ATA;
}
done:
ata_link_for_each_dev(dev, link) {
/* After the reset, the device state is PIO 0 and the
......@@ -2290,7 +2239,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
postreset(link, classes);
/* reset successful, schedule revalidation */
ata_eh_done(link, NULL, ehc->i.action & ATA_EH_RESET_MASK);
ata_eh_done(link, NULL, ATA_EH_RESET);
ehc->i.action |= ATA_EH_REVALIDATE;
rc = 0;
......@@ -2305,6 +2254,11 @@ int ata_eh_reset(struct ata_link *link, int classify,
return rc;
fail:
/* if SCR isn't accessible on a fan-out port, PMP needs to be reset */
if (!ata_is_host_link(link) &&
sata_scr_read(link, SCR_STATUS, &sstatus))
rc = -ERESTART;
if (rc == -ERESTART || try >= max_tries)
goto out;
......@@ -2515,6 +2469,7 @@ static int ata_link_nr_vacant(struct ata_link *link)
static int ata_eh_skip_recovery(struct ata_link *link)
{
struct ata_port *ap = link->ap;
struct ata_eh_context *ehc = &link->eh_context;
struct ata_device *dev;
......@@ -2522,9 +2477,13 @@ static int ata_eh_skip_recovery(struct ata_link *link)
if (link->flags & ATA_LFLAG_DISABLED)
return 1;
/* thaw frozen port, resume link and recover failed devices */
if ((link->ap->pflags & ATA_PFLAG_FROZEN) ||
(ehc->i.flags & ATA_EHI_RESUME_LINK) || ata_link_nr_enabled(link))
/* thaw frozen port and recover failed devices */
if ((ap->pflags & ATA_PFLAG_FROZEN) || ata_link_nr_enabled(link))
return 0;
/* reset at least once if reset is requested */
if ((ehc->i.action & ATA_EH_RESET) &&
!(ehc->i.flags & ATA_EHI_DID_RESET))
return 0;
/* skip if class codes for all vacant slots are ATA_DEV_NONE */
......@@ -2548,7 +2507,7 @@ static int ata_eh_schedule_probe(struct ata_device *dev)
ata_eh_detach_dev(dev);
ata_dev_init(dev);
ehc->did_probe_mask |= (1 << dev->devno);
ehc->i.action |= ATA_EH_SOFTRESET;
ehc->i.action |= ATA_EH_RESET;
ehc->saved_xfer_mode[dev->devno] = 0;
ehc->saved_ncq_enabled &= ~(1 << dev->devno);
......@@ -2592,12 +2551,7 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err)
return 1;
} else {
/* soft didn't work? be haaaaard */
if (ehc->i.flags & ATA_EHI_DID_RESET)
ehc->i.action |= ATA_EH_HARDRESET;
else
ehc->i.action |= ATA_EH_SOFTRESET;
ehc->i.action |= ATA_EH_RESET;
return 0;
}
}
......@@ -2690,7 +2644,7 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
ehc->i.action = 0;
/* do we need to reset? */
if (ehc->i.action & ATA_EH_RESET_MASK)
if (ehc->i.action & ATA_EH_RESET)
reset = 1;
ata_link_for_each_dev(dev, link)
......@@ -2702,13 +2656,13 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
/* if PMP is attached, this function only deals with
* downstream links, port should stay thawed.
*/
if (!ap->nr_pmp_links)
if (!sata_pmp_attached(ap))
ata_eh_freeze_port(ap);
ata_port_for_each_link(link, ap) {
struct ata_eh_context *ehc = &link->eh_context;
if (!(ehc->i.action & ATA_EH_RESET_MASK))
if (!(ehc->i.action & ATA_EH_RESET))
continue;
rc = ata_eh_reset(link, ata_link_nr_vacant(link),
......@@ -2721,7 +2675,7 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
}
}
if (!ap->nr_pmp_links)
if (!sata_pmp_attached(ap))
ata_eh_thaw_port(ap);
}
......@@ -2765,7 +2719,7 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset,
/* PMP reset requires working host port.
* Can't retry if it's frozen.
*/
if (ap->nr_pmp_links)
if (sata_pmp_attached(ap))
goto out;
break;
}
......@@ -2817,18 +2771,11 @@ void ata_eh_finish(struct ata_port *ap)
/* FIXME: Once EH migration is complete,
* generate sense data in this function,
* considering both err_mask and tf.
*
* There's no point in retrying invalid
* (detected by libata) and non-IO device
* errors (rejected by device). Finish them
* immediately.
*/
if ((qc->err_mask & AC_ERR_INVALID) ||
(!(qc->flags & ATA_QCFLAG_IO) &&
qc->err_mask == AC_ERR_DEV))
ata_eh_qc_complete(qc);
else
if (qc->flags & ATA_QCFLAG_RETRY)
ata_eh_qc_retry(qc);
else
ata_eh_qc_complete(qc);
} else {
if (qc->flags & ATA_QCFLAG_SENSE_VALID) {
ata_eh_qc_complete(qc);
......@@ -2848,6 +2795,7 @@ void ata_eh_finish(struct ata_port *ap)
/**
* ata_do_eh - do standard error handling
* @ap: host port to handle error for
*
* @prereset: prereset method (can be NULL)
* @softreset: softreset method (can be NULL)
* @hardreset: hardreset method (can be NULL)
......@@ -2878,6 +2826,27 @@ void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset,
ata_eh_finish(ap);
}
/**
* ata_std_error_handler - standard error handler
* @ap: host port to handle error for
*
* Standard error handler
*
* LOCKING:
* Kernel thread context (may sleep).
*/
void ata_std_error_handler(struct ata_port *ap)
{
struct ata_port_operations *ops = ap->ops;
ata_reset_fn_t hardreset = ops->hardreset;
/* ignore built-in hardreset if SCR access is not available */
if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
hardreset = NULL;
ata_do_eh(ap, ops->prereset, ops->softreset, hardreset, ops->postreset);
}
#ifdef CONFIG_PM
/**
* ata_eh_handle_port_suspend - perform port suspend operation
......
......@@ -11,6 +11,14 @@
#include <linux/libata.h>
#include "libata.h"
const struct ata_port_operations sata_pmp_port_ops = {
.inherits = &sata_port_ops,
.pmp_prereset = ata_std_prereset,
.pmp_hardreset = sata_std_hardreset,
.pmp_postreset = ata_std_postreset,
.error_handler = sata_pmp_error_handler,
};
/**
* sata_pmp_read - read PMP register
* @link: link to read PMP register for
......@@ -175,140 +183,6 @@ int sata_pmp_scr_write(struct ata_link *link, int reg, u32 val)
return 0;
}
/**
* sata_pmp_std_prereset - prepare PMP link for reset
* @link: link to be reset
* @deadline: deadline jiffies for the operation
*
* @link is about to be reset. Initialize it.
*
* LOCKING:
* Kernel thread context (may sleep)
*
* RETURNS:
* 0 on success, -errno otherwise.
*/
int sata_pmp_std_prereset(struct ata_link *link, unsigned long deadline)
{
struct ata_eh_context *ehc = &link->eh_context;
const unsigned long *timing = sata_ehc_deb_timing(ehc);
int rc;
/* force HRST? */
if (link->flags & ATA_LFLAG_NO_SRST)
ehc->i.action |= ATA_EH_HARDRESET;
/* handle link resume */
if ((ehc->i.flags & ATA_EHI_RESUME_LINK) &&
(link->flags & ATA_LFLAG_HRST_TO_RESUME))
ehc->i.action |= ATA_EH_HARDRESET;
/* if we're about to do hardreset, nothing more to do */
if (ehc->i.action & ATA_EH_HARDRESET)
return 0;
/* resume link */
rc = sata_link_resume(link, timing, deadline);
if (rc) {
/* phy resume failed */
ata_link_printk(link, KERN_WARNING, "failed to resume link "
"for reset (errno=%d)\n", rc);
return rc;
}
/* clear SError bits including .X which blocks the port when set */
rc = sata_scr_write(link, SCR_ERROR, 0xffffffff);
if (rc) {
ata_link_printk(link, KERN_ERR,
"failed to clear SError (errno=%d)\n", rc);
return rc;
}
return 0;
}
/**
* sata_pmp_std_hardreset - standard hardreset method for PMP link
* @link: link to be reset
* @class: resulting class of attached device
* @deadline: deadline jiffies for the operation
*
* Hardreset PMP port @link. Note that this function doesn't
* wait for BSY clearance. There simply isn't a generic way to
* wait the event. Instead, this function return -EAGAIN thus
* telling libata-EH to followup with softreset.
*
* LOCKING:
* Kernel thread context (may sleep)
*
* RETURNS:
* 0 on success, -errno otherwise.
*/
int sata_pmp_std_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline)
{
const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
u32 tmp;
int rc;
DPRINTK("ENTER\n");
/* do hardreset */
rc = sata_link_hardreset(link, timing, deadline);
if (rc) {
ata_link_printk(link, KERN_ERR,
"COMRESET failed (errno=%d)\n", rc);
goto out;
}
/* clear SError bits including .X which blocks the port when set */
rc = sata_scr_write(link, SCR_ERROR, 0xffffffff);
if (rc) {
ata_link_printk(link, KERN_ERR, "failed to clear SError "
"during hardreset (errno=%d)\n", rc);
goto out;
}
/* if device is present, follow up with srst to wait for !BSY */
if (ata_link_online(link))
rc = -EAGAIN;
out:
/* if SCR isn't accessible, we need to reset the PMP */
if (rc && rc != -EAGAIN && sata_scr_read(link, SCR_STATUS, &tmp))
rc = -ERESTART;
DPRINTK("EXIT, rc=%d\n", rc);
return rc;
}
/**
* ata_std_postreset - standard postreset method for PMP link
* @link: the target ata_link
* @classes: classes of attached devices
*
* This function is invoked after a successful reset. Note that
* the device might have been reset more than once using
* different reset methods before postreset is invoked.
*
* LOCKING:
* Kernel thread context (may sleep)
*/
void sata_pmp_std_postreset(struct ata_link *link, unsigned int *class)
{
u32 serror;
DPRINTK("ENTER\n");
/* clear SError */
if (sata_scr_read(link, SCR_ERROR, &serror) == 0)
sata_scr_write(link, SCR_ERROR, serror);
/* print link status */
sata_print_link_status(link);
DPRINTK("EXIT\n");
}
/**
* sata_pmp_read_gscr - read GSCR block of SATA PMP
* @dev: PMP device
......@@ -444,9 +318,8 @@ static int sata_pmp_init_links(struct ata_port *ap, int nr_ports)
struct ata_eh_context *ehc = &link->eh_context;
link->flags = 0;
ehc->i.probe_mask |= 1;
ehc->i.action |= ATA_EH_SOFTRESET;
ehc->i.flags |= ATA_EHI_RESUME_LINK;
ehc->i.probe_mask |= ATA_ALL_DEVICES;
ehc->i.action |= ATA_EH_RESET;
}
return 0;
......@@ -462,9 +335,6 @@ static void sata_pmp_quirks(struct ata_port *ap)
if (vendor == 0x1095 && devid == 0x3726) {
/* sil3726 quirks */
ata_port_for_each_link(link, ap) {
/* SError.N need a kick in the ass to get working */
link->flags |= ATA_LFLAG_HRST_TO_RESUME;
/* class code report is unreliable */
if (link->pmp < 5)
link->flags |= ATA_LFLAG_ASSUME_ATA;
......@@ -477,9 +347,6 @@ static void sata_pmp_quirks(struct ata_port *ap)
} else if (vendor == 0x1095 && devid == 0x4723) {
/* sil4723 quirks */
ata_port_for_each_link(link, ap) {
/* SError.N need a kick in the ass to get working */
link->flags |= ATA_LFLAG_HRST_TO_RESUME;
/* class code report is unreliable */
if (link->pmp < 2)
link->flags |= ATA_LFLAG_ASSUME_ATA;
......@@ -492,9 +359,6 @@ static void sata_pmp_quirks(struct ata_port *ap)
} else if (vendor == 0x1095 && devid == 0x4726) {
/* sil4726 quirks */
ata_port_for_each_link(link, ap) {
/* SError.N need a kick in the ass to get working */
link->flags |= ATA_LFLAG_HRST_TO_RESUME;
/* Class code report is unreliable and SRST
* times out under certain configurations.
* Config device can be at port 0 or 5 and
......@@ -522,13 +386,6 @@ static void sata_pmp_quirks(struct ata_port *ap)
* otherwise. Don't try hard to recover it.
*/
ap->pmp_link[ap->nr_pmp_links - 1].flags |= ATA_LFLAG_NO_RETRY;
} else if (vendor == 0x11ab && devid == 0x4140) {
/* Marvell 88SM4140 quirks. Fan-out ports require PHY
* reset to work; other than that, it behaves very
* nicely.
*/
ata_port_for_each_link(link, ap)
link->flags |= ATA_LFLAG_HRST_TO_RESUME;
}
}
......@@ -554,7 +411,7 @@ int sata_pmp_attach(struct ata_device *dev)
int rc;
/* is it hanging off the right place? */
if (!(ap->flags & ATA_FLAG_PMP)) {
if (!sata_pmp_supported(ap)) {
ata_dev_printk(dev, KERN_ERR,
"host does not support Port Multiplier\n");
return -EINVAL;
......@@ -840,13 +697,12 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
retry:
ehc->classes[0] = ATA_DEV_UNKNOWN;
if (ehc->i.action & ATA_EH_RESET_MASK) {
if (ehc->i.action & ATA_EH_RESET) {
struct ata_link *tlink;
ata_eh_freeze_port(ap);
/* reset */
ehc->i.action = ATA_EH_HARDRESET;
rc = ata_eh_reset(link, 0, prereset, softreset, hardreset,
postreset);
if (rc) {
......@@ -858,8 +714,12 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
ata_eh_thaw_port(ap);
/* PMP is reset, SErrors cannot be trusted, scan all */
ata_port_for_each_link(tlink, ap)
ata_ehi_schedule_probe(&tlink->eh_context.i);
ata_port_for_each_link(tlink, ap) {
struct ata_eh_context *ehc = &tlink->eh_context;
ehc->i.probe_mask |= ATA_ALL_DEVICES;
ehc->i.action |= ATA_EH_RESET;
}
}
/* If revalidation is requested, revalidate and reconfigure;
......@@ -874,7 +734,7 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
tries--;
if (rc == -ENODEV) {
ehc->i.probe_mask |= 1;
ehc->i.probe_mask |= ATA_ALL_DEVICES;
detach = 1;
/* give it just two more chances */
tries = min(tries, 2);
......@@ -890,11 +750,11 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap,
reval_failed = 1;
ata_dev_printk(dev, KERN_WARNING,
"retrying hardreset%s\n",
"retrying reset%s\n",
sleep ? " in 5 secs" : "");
if (sleep)
ssleep(5);
ehc->i.action |= ATA_EH_HARDRESET;
ehc->i.action |= ATA_EH_RESET;
goto retry;
} else {
ata_dev_printk(dev, KERN_ERR, "failed to recover PMP "
......@@ -938,10 +798,8 @@ static int sata_pmp_eh_handle_disabled_links(struct ata_port *ap)
/* Some PMPs require hardreset sequence to get
* SError.N working.
*/
if ((link->flags & ATA_LFLAG_HRST_TO_RESUME) &&
(link->eh_context.i.flags & ATA_EHI_RESUME_LINK))
sata_link_hardreset(link, sata_deb_timing_normal,
jiffies + ATA_TMOUT_INTERNAL_QUICK);
sata_link_hardreset(link, sata_deb_timing_normal,
jiffies + ATA_TMOUT_INTERNAL_QUICK, NULL, NULL);
/* unconditionally clear SError.N */
rc = sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
......@@ -987,14 +845,6 @@ static int sata_pmp_handle_link_fail(struct ata_link *link, int *link_tries)
/**
* sata_pmp_eh_recover - recover PMP-enabled port
* @ap: ATA port to recover
* @prereset: prereset method (can be NULL)
* @softreset: softreset method
* @hardreset: hardreset method
* @postreset: postreset method (can be NULL)
* @pmp_prereset: PMP prereset method (can be NULL)
* @pmp_softreset: PMP softreset method (can be NULL)
* @pmp_hardreset: PMP hardreset method (can be NULL)
* @pmp_postreset: PMP postreset method (can be NULL)
*
* Drive EH recovery operation for PMP enabled port @ap. This
* function recovers host and PMP ports with proper retrials and
......@@ -1007,12 +857,9 @@ static int sata_pmp_handle_link_fail(struct ata_link *link, int *link_tries)
* RETURNS:
* 0 on success, -errno on failure.
*/
static int sata_pmp_eh_recover(struct ata_port *ap,
ata_prereset_fn_t prereset, ata_reset_fn_t softreset,
ata_reset_fn_t hardreset, ata_postreset_fn_t postreset,
ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset,
ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset)
static int sata_pmp_eh_recover(struct ata_port *ap)
{
struct ata_port_operations *ops = ap->ops;
int pmp_tries, link_tries[SATA_PMP_MAX_PORTS];
struct ata_link *pmp_link = &ap->link;
struct ata_device *pmp_dev = pmp_link->device;
......@@ -1029,9 +876,9 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
retry:
/* PMP attached? */
if (!ap->nr_pmp_links) {
rc = ata_eh_recover(ap, prereset, softreset, hardreset,
postreset, NULL);
if (!sata_pmp_attached(ap)) {
rc = ata_eh_recover(ap, ops->prereset, ops->softreset,
ops->hardreset, ops->postreset, NULL);
if (rc) {
ata_link_for_each_dev(dev, &ap->link)
ata_dev_disable(dev);
......@@ -1049,8 +896,8 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
}
/* recover pmp */
rc = sata_pmp_eh_recover_pmp(ap, prereset, softreset, hardreset,
postreset);
rc = sata_pmp_eh_recover_pmp(ap, ops->prereset, ops->softreset,
ops->hardreset, ops->postreset);
if (rc)
goto pmp_fail;
......@@ -1060,8 +907,8 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
goto pmp_fail;
/* recover links */
rc = ata_eh_recover(ap, pmp_prereset, pmp_softreset, pmp_hardreset,
pmp_postreset, &link);
rc = ata_eh_recover(ap, ops->pmp_prereset, ops->pmp_softreset,
ops->pmp_hardreset, ops->pmp_postreset, &link);
if (rc)
goto link_fail;
......@@ -1124,7 +971,7 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
link_fail:
if (sata_pmp_handle_link_fail(link, link_tries)) {
pmp_ehc->i.action |= ATA_EH_HARDRESET;
pmp_ehc->i.action |= ATA_EH_RESET;
goto retry;
}
......@@ -1136,13 +983,13 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
if (ap->pflags & ATA_PFLAG_UNLOADING)
return rc;
if (!ap->nr_pmp_links)
if (!sata_pmp_attached(ap))
goto retry;
if (--pmp_tries) {
ata_port_printk(ap, KERN_WARNING,
"failed to recover PMP, retrying in 5 secs\n");
pmp_ehc->i.action |= ATA_EH_HARDRESET;
pmp_ehc->i.action |= ATA_EH_RESET;
ssleep(5);
goto retry;
}
......@@ -1157,16 +1004,8 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
}
/**
* sata_pmp_do_eh - do standard error handling for PMP-enabled host
* sata_pmp_error_handler - do standard error handling for PMP-enabled host
* @ap: host port to handle error for
* @prereset: prereset method (can be NULL)
* @softreset: softreset method
* @hardreset: hardreset method
* @postreset: postreset method (can be NULL)
* @pmp_prereset: PMP prereset method (can be NULL)
* @pmp_softreset: PMP softreset method (can be NULL)
* @pmp_hardreset: PMP hardreset method (can be NULL)
* @pmp_postreset: PMP postreset method (can be NULL)
*
* Perform standard error handling sequence for PMP-enabled host
* @ap.
......@@ -1174,16 +1013,14 @@ static int sata_pmp_eh_recover(struct ata_port *ap,
* LOCKING:
* Kernel thread context (may sleep).
*/
void sata_pmp_do_eh(struct ata_port *ap,
ata_prereset_fn_t prereset, ata_reset_fn_t softreset,
ata_reset_fn_t hardreset, ata_postreset_fn_t postreset,
ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset,
ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset)
void sata_pmp_error_handler(struct ata_port *ap)
{
ata_eh_autopsy(ap);
ata_eh_report(ap);
sata_pmp_eh_recover(ap, prereset, softreset, hardreset, postreset,
pmp_prereset, pmp_softreset, pmp_hardreset,
pmp_postreset);
sata_pmp_eh_recover(ap);
ata_eh_finish(ap);
}
EXPORT_SYMBOL_GPL(sata_pmp_port_ops);
EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch);
EXPORT_SYMBOL_GPL(sata_pmp_error_handler);
......@@ -2393,7 +2393,9 @@ static void atapi_request_sense(struct ata_queued_cmd *qc)
/* FIXME: is this needed? */
memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
ap->ops->tf_read(ap, &qc->tf);
#ifdef CONFIG_ATA_SFF
ap->ops->sff_tf_read(ap, &qc->tf);
#endif
/* fill these in, for the case where they are -not- overwritten */
cmd->sense_buffer[0] = 0x70;
......@@ -2615,7 +2617,7 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
static struct ata_device *ata_find_dev(struct ata_port *ap, int devno)
{
if (ap->nr_pmp_links == 0) {
if (!sata_pmp_attached(ap)) {
if (likely(devno < ata_link_max_devices(&ap->link)))
return &ap->link.device[devno];
} else {
......@@ -2632,7 +2634,7 @@ static struct ata_device *__ata_scsi_find_dev(struct ata_port *ap,
int devno;
/* skip commands not addressed to targets we simulate */
if (ap->nr_pmp_links == 0) {
if (!sata_pmp_attached(ap)) {
if (unlikely(scsidev->channel || scsidev->lun))
return NULL;
devno = scsidev->id;
......@@ -3490,7 +3492,7 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel,
if (lun != SCAN_WILD_CARD && lun)
return -EINVAL;
if (ap->nr_pmp_links == 0) {
if (!sata_pmp_attached(ap)) {
if (channel != SCAN_WILD_CARD && channel)
return -EINVAL;
devno = id;
......@@ -3507,8 +3509,8 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel,
ata_port_for_each_link(link, ap) {
struct ata_eh_info *ehi = &link->eh_info;
ehi->probe_mask |= (1 << ata_link_max_devices(link)) - 1;
ehi->action |= ATA_EH_SOFTRESET;
ehi->probe_mask |= ATA_ALL_DEVICES;
ehi->action |= ATA_EH_RESET;
}
} else {
struct ata_device *dev = ata_find_dev(ap, devno);
......@@ -3516,8 +3518,7 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel,
if (dev) {
struct ata_eh_info *ehi = &dev->link->eh_info;
ehi->probe_mask |= 1 << dev->devno;
ehi->action |= ATA_EH_SOFTRESET;
ehi->flags |= ATA_EHI_RESUME_LINK;
ehi->action |= ATA_EH_RESET;
} else
rc = -EINVAL;
}
......
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