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提交 8010dc30 编写于 作者: D David S. Miller
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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6

上级 5d242f1c 2a07954b
展开全部 隐藏空白更改
内联 并排
Showing with 8007 addition and 4142 deletion
drivers/net/wireless/Kconfig
浏览文件 @ 8010dc30
......@@ -228,6 +228,14 @@ config PCMCIA_ATMEL
Enable support for PCMCIA cards containing the
Atmel at76c502 and at76c504 chips.
config AT76C50X_USB
tristate "Atmel at76c503/at76c505/at76c505a USB cards"
depends on MAC80211 && WLAN_80211 && USB
select FW_LOADER
---help---
Enable support for USB Wireless devices using Atmel at76c503,
at76c505 or at76c505a chips.
config AIRO_CS
tristate "Cisco/Aironet 34X/35X/4500/4800 PCMCIA cards"
depends on PCMCIA && (BROKEN || !M32R) && WLAN_80211
......
drivers/net/wireless/Makefile
浏览文件 @ 8010dc30
......@@ -24,6 +24,8 @@ obj-$(CONFIG_ATMEL) += atmel.o
obj-$(CONFIG_PCI_ATMEL) += atmel_pci.o
obj-$(CONFIG_PCMCIA_ATMEL) += atmel_cs.o
obj-$(CONFIG_AT76C50X_USB) += at76c50x-usb.o
obj-$(CONFIG_PRISM54) += prism54/
obj-$(CONFIG_HOSTAP) += hostap/
......
drivers/net/wireless/airo.c
浏览文件 @ 8010dc30
......@@ -4727,7 +4727,7 @@ static int proc_stats_rid_open( struct inode *inode,
StatsRid stats;
int i, j;
__le32 *vals = stats.vals;
int len = le16_to_cpu(stats.len);
int len;
if ((file->private_data = kzalloc(sizeof(struct proc_data ), GFP_KERNEL)) == NULL)
return -ENOMEM;
......@@ -4738,6 +4738,7 @@ static int proc_stats_rid_open( struct inode *inode,
}
readStatsRid(apriv, &stats, rid, 1);
len = le16_to_cpu(stats.len);
j = 0;
for(i=0; statsLabels[i]!=(char *)-1 && i*4<len; i++) {
......
drivers/net/wireless/at76c50x-usb.c 0 → 100644
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/at76c50x-usb.h 0 → 100644
浏览文件 @ 8010dc30
/*
* Copyright (c) 2002,2003 Oliver Kurth
* (c) 2003,2004 Joerg Albert <joerg.albert@gmx.de>
* (c) 2007 Guido Guenther <agx@sigxcpu.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This driver was based on information from the Sourceforge driver
* released and maintained by Atmel:
*
* http://sourceforge.net/projects/atmelwlandriver/
*
* Although the code was completely re-written,
* it would have been impossible without Atmel's decision to
* release an Open Source driver (unfortunately the firmware was
* kept binary only). Thanks for that decision to Atmel!
*/
#ifndef _AT76_USB_H
#define _AT76_USB_H
/* Board types */
enum board_type {
BOARD_503_ISL3861 = 1,
BOARD_503_ISL3863 = 2,
BOARD_503 = 3,
BOARD_503_ACC = 4,
BOARD_505 = 5,
BOARD_505_2958 = 6,
BOARD_505A = 7,
BOARD_505AMX = 8
};
#define CMD_STATUS_IDLE 0x00
#define CMD_STATUS_COMPLETE 0x01
#define CMD_STATUS_UNKNOWN 0x02
#define CMD_STATUS_INVALID_PARAMETER 0x03
#define CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
#define CMD_STATUS_TIME_OUT 0x07
#define CMD_STATUS_IN_PROGRESS 0x08
#define CMD_STATUS_HOST_FAILURE 0xff
#define CMD_STATUS_SCAN_FAILED 0xf0
/* answers to get op mode */
#define OPMODE_NONE 0x00
#define OPMODE_NORMAL_NIC_WITH_FLASH 0x01
#define OPMODE_HW_CONFIG_MODE 0x02
#define OPMODE_DFU_MODE_WITH_FLASH 0x03
#define OPMODE_NORMAL_NIC_WITHOUT_FLASH 0x04
#define CMD_SET_MIB 0x01
#define CMD_GET_MIB 0x02
#define CMD_SCAN 0x03
#define CMD_JOIN 0x04
#define CMD_START_IBSS 0x05
#define CMD_RADIO_ON 0x06
#define CMD_RADIO_OFF 0x07
#define CMD_STARTUP 0x0B
#define MIB_LOCAL 0x01
#define MIB_MAC_ADDR 0x02
#define MIB_MAC 0x03
#define MIB_MAC_MGMT 0x05
#define MIB_MAC_WEP 0x06
#define MIB_PHY 0x07
#define MIB_FW_VERSION 0x08
#define MIB_MDOMAIN 0x09
#define ADHOC_MODE 1
#define INFRASTRUCTURE_MODE 2
/* values for struct mib_local, field preamble_type */
#define PREAMBLE_TYPE_LONG 0
#define PREAMBLE_TYPE_SHORT 1
#define PREAMBLE_TYPE_AUTO 2
/* values for tx_rate */
#define TX_RATE_1MBIT 0
#define TX_RATE_2MBIT 1
#define TX_RATE_5_5MBIT 2
#define TX_RATE_11MBIT 3
#define TX_RATE_AUTO 4
/* power management modes */
#define AT76_PM_OFF 1
#define AT76_PM_ON 2
#define AT76_PM_SMART 3
struct hwcfg_r505 {
u8 cr39_values[14];
u8 reserved1[14];
u8 bb_cr[14];
u8 pidvid[4];
u8 mac_addr[ETH_ALEN];
u8 regulatory_domain;
u8 reserved2[14];
u8 cr15_values[14];
u8 reserved3[3];
} __attribute__((packed));
struct hwcfg_rfmd {
u8 cr20_values[14];
u8 cr21_values[14];
u8 bb_cr[14];
u8 pidvid[4];
u8 mac_addr[ETH_ALEN];
u8 regulatory_domain;
u8 low_power_values[14];
u8 normal_power_values[14];
u8 reserved1[3];
} __attribute__((packed));
struct hwcfg_intersil {
u8 mac_addr[ETH_ALEN];
u8 cr31_values[14];
u8 cr58_values[14];
u8 pidvid[4];
u8 regulatory_domain;
u8 reserved[1];
} __attribute__((packed));
union at76_hwcfg {
struct hwcfg_intersil i;
struct hwcfg_rfmd r3;
struct hwcfg_r505 r5;
};
#define WEP_SMALL_KEY_LEN (40 / 8)
#define WEP_LARGE_KEY_LEN (104 / 8)
#define WEP_KEYS (4)
struct at76_card_config {
u8 exclude_unencrypted;
u8 promiscuous_mode;
u8 short_retry_limit;
u8 encryption_type;
__le16 rts_threshold;
__le16 fragmentation_threshold; /* 256..2346 */
u8 basic_rate_set[4];
u8 auto_rate_fallback; /* 0,1 */
u8 channel;
u8 privacy_invoked;
u8 wep_default_key_id; /* 0..3 */
u8 current_ssid[32];
u8 wep_default_key_value[4][WEP_LARGE_KEY_LEN];
u8 ssid_len;
u8 short_preamble;
__le16 beacon_period;
} __attribute__((packed));
struct at76_command {
u8 cmd;
u8 reserved;
__le16 size;
u8 data[0];
} __attribute__((packed));
/* Length of Atmel-specific Rx header before 802.11 frame */
#define AT76_RX_HDRLEN offsetof(struct at76_rx_buffer, packet)
struct at76_rx_buffer {
__le16 wlength;
u8 rx_rate;
u8 newbss;
u8 fragmentation;
u8 rssi;
u8 link_quality;
u8 noise_level;
__le32 rx_time;
u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
} __attribute__((packed));
/* Length of Atmel-specific Tx header before 802.11 frame */
#define AT76_TX_HDRLEN offsetof(struct at76_tx_buffer, packet)
struct at76_tx_buffer {
__le16 wlength;
u8 tx_rate;
u8 padding;
u8 reserved[4];
u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
} __attribute__((packed));
/* defines for scan_type below */
#define SCAN_TYPE_ACTIVE 0
#define SCAN_TYPE_PASSIVE 1
struct at76_req_scan {
u8 bssid[ETH_ALEN];
u8 essid[32];
u8 scan_type;
u8 channel;
__le16 probe_delay;
__le16 min_channel_time;
__le16 max_channel_time;
u8 essid_size;
u8 international_scan;
} __attribute__((packed));
struct at76_req_ibss {
u8 bssid[ETH_ALEN];
u8 essid[32];
u8 bss_type;
u8 channel;
u8 essid_size;
u8 reserved[3];
} __attribute__((packed));
struct at76_req_join {
u8 bssid[ETH_ALEN];
u8 essid[32];
u8 bss_type;
u8 channel;
__le16 timeout;
u8 essid_size;
u8 reserved;
} __attribute__((packed));
struct set_mib_buffer {
u8 type;
u8 size;
u8 index;
u8 reserved;
union {
u8 byte;
__le16 word;
u8 addr[ETH_ALEN];
} data;
} __attribute__((packed));
struct mib_local {
u16 reserved0;
u8 beacon_enable;
u8 txautorate_fallback;
u8 reserved1;
u8 ssid_size;
u8 promiscuous_mode;
u16 reserved2;
u8 preamble_type;
u16 reserved3;
} __attribute__((packed));
struct mib_mac_addr {
u8 mac_addr[ETH_ALEN];
u8 res[2]; /* ??? */
u8 group_addr[4][ETH_ALEN];
u8 group_addr_status[4];
} __attribute__((packed));
struct mib_mac {
__le32 max_tx_msdu_lifetime;
__le32 max_rx_lifetime;
__le16 frag_threshold;
__le16 rts_threshold;
__le16 cwmin;
__le16 cwmax;
u8 short_retry_time;
u8 long_retry_time;
u8 scan_type; /* active or passive */
u8 scan_channel;
__le16 probe_delay; /* delay before ProbeReq in active scan, RO */
__le16 min_channel_time;
__le16 max_channel_time;
__le16 listen_interval;
u8 desired_ssid[32];
u8 desired_bssid[ETH_ALEN];
u8 desired_bsstype; /* ad-hoc or infrastructure */
u8 reserved2;
} __attribute__((packed));
struct mib_mac_mgmt {
__le16 beacon_period;
__le16 CFP_max_duration;
__le16 medium_occupancy_limit;
__le16 station_id; /* assoc id */
__le16 ATIM_window;
u8 CFP_mode;
u8 privacy_option_implemented;
u8 DTIM_period;
u8 CFP_period;
u8 current_bssid[ETH_ALEN];
u8 current_essid[32];
u8 current_bss_type;
u8 power_mgmt_mode;
/* rfmd and 505 */
u8 ibss_change;
u8 res;
u8 multi_domain_capability_implemented;
u8 multi_domain_capability_enabled;
u8 country_string[3];
u8 reserved[3];
} __attribute__((packed));
struct mib_mac_wep {
u8 privacy_invoked; /* 0 disable encr., 1 enable encr */
u8 wep_default_key_id;
u8 wep_key_mapping_len;
u8 exclude_unencrypted;
__le32 wep_icv_error_count;
__le32 wep_excluded_count;
u8 wep_default_keyvalue[WEP_KEYS][WEP_LARGE_KEY_LEN];
u8 encryption_level; /* 1 for 40bit, 2 for 104bit encryption */
} __attribute__((packed));
struct mib_phy {
__le32 ed_threshold;
__le16 slot_time;
__le16 sifs_time;
__le16 preamble_length;
__le16 plcp_header_length;
__le16 mpdu_max_length;
__le16 cca_mode_supported;
u8 operation_rate_set[4];
u8 channel_id;
u8 current_cca_mode;
u8 phy_type;
u8 current_reg_domain;
} __attribute__((packed));
struct mib_fw_version {
u8 major;
u8 minor;
u8 patch;
u8 build;
} __attribute__((packed));
struct mib_mdomain {
u8 tx_powerlevel[14];
u8 channel_list[14]; /* 0 for invalid channels */
} __attribute__((packed));
struct at76_fw_header {
__le32 crc; /* CRC32 of the whole image */
__le32 board_type; /* firmware compatibility code */
u8 build; /* firmware build number */
u8 patch; /* firmware patch level */
u8 minor; /* firmware minor version */
u8 major; /* firmware major version */
__le32 str_offset; /* offset of the copyright string */
__le32 int_fw_offset; /* internal firmware image offset */
__le32 int_fw_len; /* internal firmware image length */
__le32 ext_fw_offset; /* external firmware image offset */
__le32 ext_fw_len; /* external firmware image length */
} __attribute__((packed));
/* a description of a regulatory domain and the allowed channels */
struct reg_domain {
u16 code;
char const *name;
u32 channel_map; /* if bit N is set, channel (N+1) is allowed */
};
/* Data for one loaded firmware file */
struct fwentry {
const char *const fwname;
const struct firmware *fw;
int extfw_size;
int intfw_size;
/* pointer to loaded firmware, no need to free */
u8 *extfw; /* external firmware, extfw_size bytes long */
u8 *intfw; /* internal firmware, intfw_size bytes long */
enum board_type board_type; /* board type */
struct mib_fw_version fw_version;
int loaded; /* Loaded and parsed successfully */
};
struct at76_priv {
struct usb_device *udev; /* USB device pointer */
struct sk_buff *rx_skb; /* skbuff for receiving data */
struct sk_buff *tx_skb; /* skbuff for transmitting data */
void *bulk_out_buffer; /* buffer for sending data */
struct urb *tx_urb; /* URB for sending data */
struct urb *rx_urb; /* URB for receiving data */
unsigned int tx_pipe; /* bulk out pipe */
unsigned int rx_pipe; /* bulk in pipe */
struct mutex mtx; /* locks this structure */
/* work queues */
struct work_struct work_set_promisc;
struct work_struct work_submit_rx;
struct delayed_work dwork_hw_scan;
struct tasklet_struct rx_tasklet;
/* the WEP stuff */
int wep_enabled; /* 1 if WEP is enabled */
int wep_key_id; /* key id to be used */
u8 wep_keys[WEP_KEYS][WEP_LARGE_KEY_LEN]; /* WEP keys */
u8 wep_keys_len[WEP_KEYS]; /* length of WEP keys */
int channel;
int iw_mode;
u8 bssid[ETH_ALEN];
u8 essid[IW_ESSID_MAX_SIZE];
int essid_size;
int radio_on;
int promisc;
int preamble_type; /* 0 - long, 1 - short, 2 - auto */
int auth_mode; /* authentication type: 0 open, 1 shared key */
int txrate; /* 0,1,2,3 = 1,2,5.5,11 Mbps, 4 is auto */
int frag_threshold; /* threshold for fragmentation of tx packets */
int rts_threshold; /* threshold for RTS mechanism */
int short_retry_limit;
int scan_min_time; /* scan min channel time */
int scan_max_time; /* scan max channel time */
int scan_mode; /* SCAN_TYPE_ACTIVE, SCAN_TYPE_PASSIVE */
int scan_need_any; /* if set, need to scan for any ESSID */
u16 assoc_id; /* current association ID, if associated */
u8 pm_mode; /* power management mode */
u32 pm_period; /* power management period in microseconds */
struct reg_domain const *domain; /* reg domain description */
/* These fields contain HW config provided by the device (not all of
* these fields are used by all board types) */
u8 mac_addr[ETH_ALEN];
u8 regulatory_domain;
struct at76_card_config card_config;
enum board_type board_type;
struct mib_fw_version fw_version;
unsigned int device_unplugged:1;
unsigned int netdev_registered:1;
struct set_mib_buffer mib_buf; /* global buffer for set_mib calls */
int beacon_period; /* period of mgmt beacons, Kus */
struct ieee80211_hw *hw;
int mac80211_registered;
};
#define AT76_SUPPORTED_FILTERS FIF_PROMISC_IN_BSS
#define SCAN_POLL_INTERVAL (HZ / 4)
#define CMD_COMPLETION_TIMEOUT (5 * HZ)
#define DEF_RTS_THRESHOLD 1536
#define DEF_FRAG_THRESHOLD 1536
#define DEF_SHORT_RETRY_LIMIT 8
#define DEF_CHANNEL 10
#define DEF_SCAN_MIN_TIME 10
#define DEF_SCAN_MAX_TIME 120
/* the max padding size for tx in bytes (see calc_padding) */
#define MAX_PADDING_SIZE 53
#endif /* _AT76_USB_H */
drivers/net/wireless/ath5k/base.c
浏览文件 @ 8010dc30
......@@ -350,6 +350,7 @@ static int ath5k_beacon_setup(struct ath5k_softc *sc,
static void ath5k_beacon_send(struct ath5k_softc *sc);
static void ath5k_beacon_config(struct ath5k_softc *sc);
static void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf);
static void ath5k_tasklet_beacon(unsigned long data);
static inline u64 ath5k_extend_tsf(struct ath5k_hw *ah, u32 rstamp)
{
......@@ -789,6 +790,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc);
tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc);
tasklet_init(&sc->restq, ath5k_tasklet_reset, (unsigned long)sc);
tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc);
setup_timer(&sc->calib_tim, ath5k_calibrate, (unsigned long)sc);
ret = ath5k_eeprom_read_mac(ah, mac);
......@@ -1218,6 +1220,10 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
pktlen = skb->len;
if (info->control.hw_key) {
keyidx = info->control.hw_key->hw_key_idx;
pktlen += info->control.hw_key->icv_len;
}
if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
flags |= AR5K_TXDESC_RTSENA;
cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value;
......@@ -1230,11 +1236,6 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
duration = le16_to_cpu(ieee80211_ctstoself_duration(sc->hw,
sc->vif, pktlen, info));
}
if (info->control.hw_key) {
keyidx = info->control.hw_key->hw_key_idx;
pktlen += info->control.hw_key->icv_len;
}
ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL,
(sc->power_level * 2),
......@@ -1700,6 +1701,34 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
}
}
static void ath5k_tasklet_beacon(unsigned long data)
{
struct ath5k_softc *sc = (struct ath5k_softc *) data;
/*
* Software beacon alert--time to send a beacon.
*
* In IBSS mode we use this interrupt just to
* keep track of the next TBTT (target beacon
* transmission time) in order to detect wether
* automatic TSF updates happened.
*/
if (sc->opmode == NL80211_IFTYPE_ADHOC) {
/* XXX: only if VEOL suppported */
u64 tsf = ath5k_hw_get_tsf64(sc->ah);
sc->nexttbtt += sc->bintval;
ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
"SWBA nexttbtt: %x hw_tu: %x "
"TSF: %llx\n",
sc->nexttbtt,
TSF_TO_TU(tsf),
(unsigned long long) tsf);
} else {
spin_lock(&sc->block);
ath5k_beacon_send(sc);
spin_unlock(&sc->block);
}
}
static void
ath5k_tasklet_rx(unsigned long data)
......@@ -2040,9 +2069,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
* frame contents are done as needed and the slot time is
* also adjusted based on current state.
*
* this is usually called from interrupt context (ath5k_intr())
* but also from ath5k_beacon_config() in IBSS mode which in turn
* can be called from a tasklet and user context
* This is called from software irq context (beacontq or restq
* tasklets) or user context from ath5k_beacon_config.
*/
static void
ath5k_beacon_send(struct ath5k_softc *sc)
......@@ -2216,6 +2244,7 @@ static void
ath5k_beacon_config(struct ath5k_softc *sc)
{
struct ath5k_hw *ah = sc->ah;
unsigned long flags;
ath5k_hw_set_imr(ah, 0);
sc->bmisscount = 0;
......@@ -2237,9 +2266,9 @@ ath5k_beacon_config(struct ath5k_softc *sc)
if (sc->opmode == NL80211_IFTYPE_ADHOC) {
if (ath5k_hw_hasveol(ah)) {
spin_lock(&sc->block);
spin_lock_irqsave(&sc->block, flags);
ath5k_beacon_send(sc);
spin_unlock(&sc->block);
spin_unlock_irqrestore(&sc->block, flags);
}
} else
ath5k_beacon_update_timers(sc, -1);
......@@ -2391,6 +2420,7 @@ ath5k_stop_hw(struct ath5k_softc *sc)
tasklet_kill(&sc->rxtq);
tasklet_kill(&sc->txtq);
tasklet_kill(&sc->restq);
tasklet_kill(&sc->beacontq);
return ret;
}
......@@ -2408,16 +2438,9 @@ ath5k_intr(int irq, void *dev_id)
return IRQ_NONE;
do {
/*
* Figure out the reason(s) for the interrupt. Note
* that get_isr returns a pseudo-ISR that may include
* bits we haven't explicitly enabled so we mask the
* value to insure we only process bits we requested.
*/
ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
status, sc->imask);
status &= sc->imask; /* discard unasked for bits */
if (unlikely(status & AR5K_INT_FATAL)) {
/*
* Fatal errors are unrecoverable.
......@@ -2428,32 +2451,7 @@ ath5k_intr(int irq, void *dev_id)
tasklet_schedule(&sc->restq);
} else {
if (status & AR5K_INT_SWBA) {
/*
* Software beacon alert--time to send a beacon.
* Handle beacon transmission directly; deferring
* this is too slow to meet timing constraints
* under load.
*
* In IBSS mode we use this interrupt just to
* keep track of the next TBTT (target beacon
* transmission time) in order to detect wether
* automatic TSF updates happened.
*/
if (sc->opmode == NL80211_IFTYPE_ADHOC) {
/* XXX: only if VEOL suppported */
u64 tsf = ath5k_hw_get_tsf64(ah);
sc->nexttbtt += sc->bintval;
ATH5K_DBG(sc, ATH5K_DEBUG_BEACON,
"SWBA nexttbtt: %x hw_tu: %x "
"TSF: %llx\n",
sc->nexttbtt,
TSF_TO_TU(tsf),
(unsigned long long) tsf);
} else {
spin_lock(&sc->block);
ath5k_beacon_send(sc);
spin_unlock(&sc->block);
}
tasklet_schedule(&sc->beacontq);
}
if (status & AR5K_INT_RXEOL) {
/*
......
drivers/net/wireless/ath5k/base.h
浏览文件 @ 8010dc30
......@@ -169,6 +169,7 @@ struct ath5k_softc {
struct ath5k_led tx_led; /* tx led */
spinlock_t block; /* protects beacon */
struct tasklet_struct beacontq; /* beacon intr tasklet */
struct ath5k_buf *bbuf; /* beacon buffer */
unsigned int bhalq, /* SW q for outgoing beacons */
bmisscount, /* missed beacon transmits */
......
drivers/net/wireless/ath9k/ani.c
浏览文件 @ 8010dc30
......@@ -642,14 +642,13 @@ void ath9k_enable_mib_counters(struct ath_hw *ah)
REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);
}
/* Freeze the MIB counters, get the stats and then clear them */
void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
{
DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disable MIB counters\n");
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC | AR_MIBC_CMC);
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC);
REG_WRITE(ah, AR_FILT_OFDM, 0);
REG_WRITE(ah, AR_FILT_CCK, 0);
}
......
drivers/net/wireless/ath9k/ath9k.h
浏览文件 @ 8010dc30
......@@ -464,13 +464,11 @@ void ath_beacon_sync(struct ath_softc *sc, int if_id);
/* ANI */
/*******/
/* ANI values for STA only.
FIXME: Add appropriate values for AP later */
#define ATH_ANI_POLLINTERVAL 100 /* 100 milliseconds between ANI poll */
#define ATH_SHORT_CALINTERVAL 1000 /* 1 second between calibrations */
#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds between calibrations */
#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes between calibrations */
#define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
#define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
#define ATH_ANI_POLLINTERVAL 100 /* 100 ms */
#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
struct ath_ani {
bool caldone;
......
drivers/net/wireless/ath9k/beacon.c
浏览文件 @ 8010dc30
......@@ -753,6 +753,9 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
if (bs.bs_sleepduration > bs.bs_dtimperiod)
bs.bs_sleepduration = bs.bs_dtimperiod;
/* TSF out of range threshold fixed at 1 second */
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
DPRINTF(sc, ATH_DBG_BEACON,
"tsf %llu "
"tsf:tu %u "
......@@ -787,8 +790,6 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
u64 tsf;
u32 tsftu;
ath9k_hw_set_interrupts(ah, 0);
if (nexttbtt == intval)
intval |= ATH9K_BEACON_RESET_TSF;
if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) {
/*
* Pull nexttbtt forward to reflect the current
......@@ -822,6 +823,9 @@ void ath_beacon_config(struct ath_softc *sc, int if_id)
sc->imask |= ATH9K_INT_SWBA;
ath_beaconq_config(sc);
} else if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
if (nexttbtt == intval)
intval |= ATH9K_BEACON_RESET_TSF;
/*
* In AP mode we enable the beacon timers and
* SWBA interrupts to prepare beacon frames.
......
drivers/net/wireless/ath9k/calib.c
浏览文件 @ 8010dc30
......@@ -718,6 +718,33 @@ s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
return nf;
}
static void ath9k_olc_temp_compensation(struct ath_hw *ah)
{
u32 rddata, i;
int delta, currPDADC, regval;
rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4);
currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
if (ah->eep_ops->get_eeprom(ah, EEP_DAC_HPWR_5G))
delta = (currPDADC - ah->initPDADC + 4) / 8;
else
delta = (currPDADC - ah->initPDADC + 5) / 10;
if (delta != ah->PDADCdelta) {
ah->PDADCdelta = delta;
for (i = 1; i < AR9280_TX_GAIN_TABLE_SIZE; i++) {
regval = ah->originalGain[i] - delta;
if (regval < 0)
regval = 0;
REG_RMW_FIELD(ah, AR_PHY_TX_GAIN_TBL1 + i * 4,
AR_PHY_TX_GAIN, regval);
}
}
}
bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
u8 rxchainmask, bool longcal,
bool *isCalDone)
......@@ -742,6 +769,8 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
}
if (longcal) {
if (OLC_FOR_AR9280_20_LATER)
ath9k_olc_temp_compensation(ah);
ath9k_hw_getnf(ah, chan);
ath9k_hw_loadnf(ah, ah->curchan);
ath9k_hw_start_nfcal(ah);
......@@ -851,20 +880,53 @@ static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah)
bool ath9k_hw_init_cal(struct ath_hw *ah,
struct ath9k_channel *chan)
{
if (AR_SREV_9280_10_OR_LATER(ah)) {
REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
/* Kick off the cal */
REG_WRITE(ah, AR_PHY_AGC_CONTROL,
REG_READ(ah, AR_PHY_AGC_CONTROL) |
AR_PHY_AGC_CONTROL_CAL);
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
AR_PHY_AGC_CONTROL_CAL, 0,
AH_WAIT_TIMEOUT)) {
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"offset calibration failed to complete in 1ms; "
"noisy environment?\n");
return false;
}
REG_CLR_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
}
/* Calibrate the AGC */
REG_WRITE(ah, AR_PHY_AGC_CONTROL,
REG_READ(ah, AR_PHY_AGC_CONTROL) |
AR_PHY_AGC_CONTROL_CAL);
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
0, AH_WAIT_TIMEOUT)) {
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"offset calibration failed to complete in 1ms; "
"noisy environment?\n");
return false;
}
if (AR_SREV_9280_10_OR_LATER(ah)) {
REG_SET_BIT(ah, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
}
/* Do PA Calibration */
if (AR_SREV_9285(ah) && AR_SREV_9285_11_OR_LATER(ah))
ath9k_hw_9285_pa_cal(ah);
/* Do NF Calibration */
REG_WRITE(ah, AR_PHY_AGC_CONTROL,
REG_READ(ah, AR_PHY_AGC_CONTROL) |
AR_PHY_AGC_CONTROL_NF);
......
drivers/net/wireless/ath9k/calib.h
浏览文件 @ 8010dc30
......@@ -27,7 +27,7 @@ extern const struct hal_percal_data adc_init_dc_cal;
#define AR_PHY_CCA_MAX_GOOD_VALUE -85
#define AR_PHY_CCA_MAX_HIGH_VALUE -62
#define AR_PHY_CCA_MIN_BAD_VALUE -121
#define AR_PHY_CCA_MIN_BAD_VALUE -140
#define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT 3
#define AR_PHY_CCA_FILTERWINDOW_LENGTH 5
......
drivers/net/wireless/ath9k/debug.c
浏览文件 @ 8010dc30
......@@ -258,13 +258,14 @@ void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb)
/* FIXME: legacy rates, later on .. */
void ath_debug_stat_retries(struct ath_softc *sc, int rix,
int xretries, int retries)
int xretries, int retries, u8 per)
{
if (conf_is_ht(&sc->hw->conf)) {
int idx = sc->cur_rate_table->info[rix].dot11rate;
sc->debug.stats.n_rcstats[idx].xretries += xretries;
sc->debug.stats.n_rcstats[idx].retries += retries;
sc->debug.stats.n_rcstats[idx].per = per;
}
}
......@@ -277,15 +278,16 @@ static ssize_t ath_read_file_stat_11n_rc(struct file *file,
unsigned int len = 0;
int i = 0;
len += sprintf(buf, "%7s %13s %8s %8s\n\n", "Rate", "Success",
"Retries", "XRetries");
len += sprintf(buf, "%7s %13s %8s %8s %6s\n\n", "Rate", "Success",
"Retries", "XRetries", "PER");
for (i = 0; i <= 15; i++) {
len += snprintf(buf + len, sizeof(buf) - len,
"%5s%3d: %8u %8u %8u\n", "MCS", i,
"%5s%3d: %8u %8u %8u %8u\n", "MCS", i,
sc->debug.stats.n_rcstats[i].success,
sc->debug.stats.n_rcstats[i].retries,
sc->debug.stats.n_rcstats[i].xretries);
sc->debug.stats.n_rcstats[i].xretries,
sc->debug.stats.n_rcstats[i].per);
}
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
......
drivers/net/wireless/ath9k/debug.h
浏览文件 @ 8010dc30
......@@ -91,12 +91,13 @@ struct ath_11n_rc_stats {
u32 success;
u32 retries;
u32 xretries;
u8 per;
};
struct ath_stats {
struct ath_interrupt_stats istats;
struct ath_legacy_rc_stats legacy_rcstats[12]; /* max(11a,11b,11g) */
struct ath_11n_rc_stats n_rcstats[16]; /* 0..15 MCS rates */
struct ath_legacy_rc_stats legacy_rcstats[12]; /* max(11a,11b,11g) */
struct ath_11n_rc_stats n_rcstats[16]; /* 0..15 MCS rates */
};
struct ath9k_debug {
......@@ -115,7 +116,7 @@ void ath9k_exit_debug(struct ath_softc *sc);
void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb);
void ath_debug_stat_retries(struct ath_softc *sc, int rix,
int xretries, int retries);
int xretries, int retries, u8 per);
#else
......@@ -144,7 +145,7 @@ static inline void ath_debug_stat_rc(struct ath_softc *sc,
}
static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix,
int xretries, int retries)
int xretries, int retries, u8 per)
{
}
......
drivers/net/wireless/ath9k/eeprom.c
浏览文件 @ 8010dc30
......@@ -179,6 +179,69 @@ static void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah,
}
}
static void ath9k_get_txgain_index(struct ath_hw *ah,
struct ath9k_channel *chan,
struct calDataPerFreqOpLoop *rawDatasetOpLoop,
u8 *calChans, u16 availPiers, u8 *pwr, u8 *pcdacIdx)
{
u8 pcdac, i = 0;
u16 idxL = 0, idxR = 0, numPiers;
bool match;
struct chan_centers centers;
ath9k_hw_get_channel_centers(ah, chan, &centers);
for (numPiers = 0; numPiers < availPiers; numPiers++)
if (calChans[numPiers] == AR5416_BCHAN_UNUSED)
break;
match = ath9k_hw_get_lower_upper_index(
(u8)FREQ2FBIN(centers.synth_center, IS_CHAN_2GHZ(chan)),
calChans, numPiers, &idxL, &idxR);
if (match) {
pcdac = rawDatasetOpLoop[idxL].pcdac[0][0];
*pwr = rawDatasetOpLoop[idxL].pwrPdg[0][0];
} else {
pcdac = rawDatasetOpLoop[idxR].pcdac[0][0];
*pwr = (rawDatasetOpLoop[idxL].pwrPdg[0][0] +
rawDatasetOpLoop[idxR].pwrPdg[0][0])/2;
}
while (pcdac > ah->originalGain[i] &&
i < (AR9280_TX_GAIN_TABLE_SIZE - 1))
i++;
*pcdacIdx = i;
return;
}
static void ath9k_olc_get_pdadcs(struct ath_hw *ah,
u32 initTxGain,
int txPower,
u8 *pPDADCValues)
{
u32 i;
u32 offset;
REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0,
AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1,
AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3);
REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7,
AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, initTxGain);
offset = txPower;
for (i = 0; i < AR5416_NUM_PDADC_VALUES; i++)
if (i < offset)
pPDADCValues[i] = 0x0;
else
pPDADCValues[i] = 0xFF;
}
static void ath9k_hw_get_target_powers(struct ath_hw *ah,
struct ath9k_channel *chan,
struct cal_target_power_ht *powInfo,
......@@ -439,7 +502,7 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
switch (param) {
case EEP_NFTHRESH_2:
return pModal[1].noiseFloorThreshCh[0];
return pModal->noiseFloorThreshCh[0];
case AR_EEPROM_MAC(0):
return pBase->macAddr[0] << 8 | pBase->macAddr[1];
case AR_EEPROM_MAC(1):
......@@ -466,6 +529,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
return pBase->txMask;
case EEP_RX_MASK:
return pBase->rxMask;
case EEP_FRAC_N_5G:
return 0;
default:
return 0;
}
......@@ -1594,11 +1659,26 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
return pBase->rxGainType;
case EEP_TXGAIN_TYPE:
return pBase->txGainType;
case EEP_OL_PWRCTRL:
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
return pBase->openLoopPwrCntl ? true : false;
else
return false;
case EEP_RC_CHAIN_MASK:
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
return pBase->rcChainMask;
else
return 0;
case EEP_DAC_HPWR_5G:
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20)
return pBase->dacHiPwrMode_5G;
else
return 0;
case EEP_FRAC_N_5G:
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_22)
return pBase->frac_n_5g;
else
return 0;
default:
return 0;
}
......@@ -1832,8 +1912,15 @@ static bool ath9k_hw_def_set_board_values(struct ath_hw *ah,
pModal->swSettleHt40);
}
if (AR_SREV_9280_20_OR_LATER(ah) &&
AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_19)
REG_RMW_FIELD(ah, AR_PHY_CCK_TX_CTRL,
AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK,
pModal->miscBits);
if (AR_SREV_9280_20(ah) && AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_20) {
if (IS_CHAN_HT20(chan))
if (IS_CHAN_2GHZ(chan))
REG_RMW_FIELD(ah, AR_AN_TOP1, AR_AN_TOP1_DACIPMODE,
eep->baseEepHeader.dacLpMode);
else if (eep->baseEepHeader.dacHiPwrMode_5G)
......@@ -1844,6 +1931,10 @@ static bool ath9k_hw_def_set_board_values(struct ath_hw *ah,
REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, AR_PHY_FRAME_CTL_TX_CLIP,
pModal->miscBits >> 2);
REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL9,
AR_PHY_TX_DESIRED_SCALE_CCK,
eep->baseEepHeader.desiredScaleCCK);
}
return true;
......@@ -2073,6 +2164,10 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
struct ath9k_channel *chan,
int16_t *pTxPowerIndexOffset)
{
#define SM_PD_GAIN(x) SM(0x38, AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##x)
#define SM_PDGAIN_B(x, y) \
SM((gainBoundaries[x]), AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##y)
struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
struct cal_data_per_freq *pRawDataset;
u8 *pCalBChans = NULL;
......@@ -2106,6 +2201,12 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
numPiers = AR5416_NUM_5G_CAL_PIERS;
}
if (OLC_FOR_AR9280_20_LATER && IS_CHAN_2GHZ(chan)) {
pRawDataset = pEepData->calPierData2G[0];
ah->initPDADC = ((struct calDataPerFreqOpLoop *)
pRawDataset)->vpdPdg[0][0];
}
numXpdGain = 0;
for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) {
......@@ -2141,25 +2242,45 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
else
pRawDataset = pEepData->calPierData5G[i];
ath9k_hw_get_def_gain_boundaries_pdadcs(ah, chan,
pRawDataset, pCalBChans,
numPiers, pdGainOverlap_t2,
&tMinCalPower, gainBoundaries,
pdadcValues, numXpdGain);
if (OLC_FOR_AR9280_20_LATER) {
u8 pcdacIdx;
u8 txPower;
ath9k_get_txgain_index(ah, chan,
(struct calDataPerFreqOpLoop *)pRawDataset,
pCalBChans, numPiers, &txPower, &pcdacIdx);
ath9k_olc_get_pdadcs(ah, pcdacIdx,
txPower/2, pdadcValues);
} else {
ath9k_hw_get_def_gain_boundaries_pdadcs(ah,
chan, pRawDataset,
pCalBChans, numPiers,
pdGainOverlap_t2,
&tMinCalPower,
gainBoundaries,
pdadcValues,
numXpdGain);
}
if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
REG_WRITE(ah,
AR_PHY_TPCRG5 + regChainOffset,
SM(pdGainOverlap_t2,
AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
| SM(gainBoundaries[0],
AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
| SM(gainBoundaries[1],
AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
| SM(gainBoundaries[2],
AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
| SM(gainBoundaries[3],
AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
if (OLC_FOR_AR9280_20_LATER) {
REG_WRITE(ah,
AR_PHY_TPCRG5 + regChainOffset,
SM(0x6,
AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
SM_PD_GAIN(1) | SM_PD_GAIN(2) |
SM_PD_GAIN(3) | SM_PD_GAIN(4));
} else {
REG_WRITE(ah,
AR_PHY_TPCRG5 + regChainOffset,
SM(pdGainOverlap_t2,
AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
SM_PDGAIN_B(0, 1) |
SM_PDGAIN_B(1, 2) |
SM_PDGAIN_B(2, 3) |
SM_PDGAIN_B(3, 4));
}
}
regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
......@@ -2193,6 +2314,8 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
*pTxPowerIndexOffset = 0;
return true;
#undef SM_PD_GAIN
#undef SM_PDGAIN_B
}
static bool ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
......@@ -2493,13 +2616,14 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
u8 twiceMaxRegulatoryPower,
u8 powerLimit)
{
#define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta)
struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
struct modal_eep_header *pModal =
&(pEepData->modalHeader[IS_CHAN_2GHZ(chan)]);
int16_t ratesArray[Ar5416RateSize];
int16_t txPowerIndexOffset = 0;
u8 ht40PowerIncForPdadc = 2;
int i;
int i, cck_ofdm_delta = 0;
memset(ratesArray, 0, sizeof(ratesArray));
......@@ -2548,16 +2672,30 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
| ATH9K_POW_SM(ratesArray[rate24mb], 0));
if (IS_CHAN_2GHZ(chan)) {
REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,
ATH9K_POW_SM(ratesArray[rate2s], 24)
| ATH9K_POW_SM(ratesArray[rate2l], 16)
| ATH9K_POW_SM(ratesArray[rateXr], 8)
| ATH9K_POW_SM(ratesArray[rate1l], 0));
REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,
ATH9K_POW_SM(ratesArray[rate11s], 24)
| ATH9K_POW_SM(ratesArray[rate11l], 16)
| ATH9K_POW_SM(ratesArray[rate5_5s], 8)
| ATH9K_POW_SM(ratesArray[rate5_5l], 0));
if (OLC_FOR_AR9280_20_LATER) {
cck_ofdm_delta = 2;
REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,
ATH9K_POW_SM(RT_AR_DELTA(rate2s), 24)
| ATH9K_POW_SM(RT_AR_DELTA(rate2l), 16)
| ATH9K_POW_SM(ratesArray[rateXr], 8)
| ATH9K_POW_SM(RT_AR_DELTA(rate1l), 0));
REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,
ATH9K_POW_SM(RT_AR_DELTA(rate11s), 24)
| ATH9K_POW_SM(RT_AR_DELTA(rate11l), 16)
| ATH9K_POW_SM(RT_AR_DELTA(rate5_5s), 8)
| ATH9K_POW_SM(RT_AR_DELTA(rate5_5l), 0));
} else {
REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,
ATH9K_POW_SM(ratesArray[rate2s], 24)
| ATH9K_POW_SM(ratesArray[rate2l], 16)
| ATH9K_POW_SM(ratesArray[rateXr], 8)
| ATH9K_POW_SM(ratesArray[rate1l], 0));
REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,
ATH9K_POW_SM(ratesArray[rate11s], 24)
| ATH9K_POW_SM(ratesArray[rate11l], 16)
| ATH9K_POW_SM(ratesArray[rate5_5s], 8)
| ATH9K_POW_SM(ratesArray[rate5_5l], 0));
}
}
REG_WRITE(ah, AR_PHY_POWER_TX_RATE5,
......@@ -2590,12 +2728,19 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
ht40PowerIncForPdadc, 8)
| ATH9K_POW_SM(ratesArray[rateHt40_4] +
ht40PowerIncForPdadc, 0));
REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,
ATH9K_POW_SM(ratesArray[rateExtOfdm], 24)
| ATH9K_POW_SM(ratesArray[rateExtCck], 16)
| ATH9K_POW_SM(ratesArray[rateDupOfdm], 8)
| ATH9K_POW_SM(ratesArray[rateDupCck], 0));
if (OLC_FOR_AR9280_20_LATER) {
REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,
ATH9K_POW_SM(ratesArray[rateExtOfdm], 24)
| ATH9K_POW_SM(RT_AR_DELTA(rateExtCck), 16)
| ATH9K_POW_SM(ratesArray[rateDupOfdm], 8)
| ATH9K_POW_SM(RT_AR_DELTA(rateDupCck), 0));
} else {
REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,
ATH9K_POW_SM(ratesArray[rateExtOfdm], 24)
| ATH9K_POW_SM(ratesArray[rateExtCck], 16)
| ATH9K_POW_SM(ratesArray[rateDupOfdm], 8)
| ATH9K_POW_SM(ratesArray[rateDupCck], 0));
}
}
REG_WRITE(ah, AR_PHY_POWER_TX_SUB,
......@@ -2615,6 +2760,21 @@ static int ath9k_hw_def_set_txpower(struct ath_hw *ah,
else
ah->regulatory.max_power_level = ratesArray[i];
switch(ar5416_get_ntxchains(ah->txchainmask)) {
case 1:
break;
case 2:
ah->regulatory.max_power_level += INCREASE_MAXPOW_BY_TWO_CHAIN;
break;
case 3:
ah->regulatory.max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
break;
default:
DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
"Invalid chainmask configuration\n");
break;
}
return 0;
}
......
drivers/net/wireless/ath9k/eeprom.h
浏览文件 @ 8010dc30
......@@ -75,11 +75,29 @@
#define SUB_NUM_CTL_MODES_AT_5G_40 2
#define SUB_NUM_CTL_MODES_AT_2G_40 3
#define INCREASE_MAXPOW_BY_TWO_CHAIN 6 /* 10*log10(2)*2 */
#define INCREASE_MAXPOW_BY_THREE_CHAIN 10 /* 10*log10(3)*2 */
/*
* For AR9285 and later chipsets, the following bits are not being programmed
* in EEPROM and so need to be enabled always.
*
* Bit 0: en_fcc_mid
* Bit 1: en_jap_mid
* Bit 2: en_fcc_dfs_ht40
* Bit 3: en_jap_ht40
* Bit 4: en_jap_dfs_ht40
*/
#define AR9285_RDEXT_DEFAULT 0x1F
#define AR_EEPROM_MAC(i) (0x1d+(i))
#define ATH9K_POW_SM(_r, _s) (((_r) & 0x3f) << (_s))
#define FREQ2FBIN(x, y) ((y) ? ((x) - 2300) : (((x) - 4800) / 5))
#define ath9k_hw_use_flash(_ah) (!(_ah->ah_flags & AH_USE_EEPROM))
#define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
#define AR_EEPROM_RFSILENT_GPIO_SEL 0x001c
#define AR_EEPROM_RFSILENT_GPIO_SEL_S 2
#define AR_EEPROM_RFSILENT_POLARITY 0x0002
......@@ -110,6 +128,7 @@
#define AR5416_EEP_MINOR_VER_17 0x11
#define AR5416_EEP_MINOR_VER_19 0x13
#define AR5416_EEP_MINOR_VER_20 0x14
#define AR5416_EEP_MINOR_VER_22 0x16
#define AR5416_NUM_5G_CAL_PIERS 8
#define AR5416_NUM_2G_CAL_PIERS 4
......@@ -152,6 +171,8 @@
#define AR5416_EEP4K_PD_GAIN_ICEPTS 5
#define AR5416_EEP4K_MAX_CHAINS 1
#define AR9280_TX_GAIN_TABLE_SIZE 22
enum eeprom_param {
EEP_NFTHRESH_5,
EEP_NFTHRESH_2,
......@@ -172,7 +193,10 @@ enum eeprom_param {
EEP_RX_MASK,
EEP_RXGAIN_TYPE,
EEP_TXGAIN_TYPE,
EEP_OL_PWRCTRL,
EEP_RC_CHAIN_MASK,
EEP_DAC_HPWR_5G,
EEP_FRAC_N_5G
};
enum ar5416_rates {
......@@ -212,12 +236,14 @@ struct base_eep_header {
u8 futureBase_1[2];
u8 rxGainType;
u8 dacHiPwrMode_5G;
u8 futureBase_2;
u8 openLoopPwrCntl;
u8 dacLpMode;
u8 txGainType;
u8 rcChainMask;
u8 desiredScaleCCK;
u8 futureBase_3[23];
u8 power_table_offset;
u8 frac_n_5g;
u8 futureBase_3[21];
} __packed;
struct base_eep_header_4k {
......@@ -291,6 +317,13 @@ struct modal_eep_header {
struct spur_chan spurChans[AR5416_EEPROM_MODAL_SPURS];
} __packed;
struct calDataPerFreqOpLoop {
u8 pwrPdg[2][5];
u8 vpdPdg[2][5];
u8 pcdac[2][5];
u8 empty[2][5];
} __packed;
struct modal_eep_4k_header {
u32 antCtrlChain[AR5416_EEP4K_MAX_CHAINS];
u32 antCtrlCommon;
......
drivers/net/wireless/ath9k/hw.c
浏览文件 @ 8010dc30
......@@ -84,11 +84,13 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
return ath9k_hw_mac_clks(ah, usecs);
}
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val)
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
{
int i;
for (i = 0; i < (AH_TIMEOUT / AH_TIME_QUANTUM); i++) {
BUG_ON(timeout < AH_TIME_QUANTUM);
for (i = 0; i < (timeout / AH_TIME_QUANTUM); i++) {
if ((REG_READ(ah, reg) & mask) == val)
return true;
......@@ -96,8 +98,8 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val)
}
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
"timeout on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
reg, REG_READ(ah, reg), mask, val);
"timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
timeout, reg, REG_READ(ah, reg), mask, val);
return false;
}
......@@ -823,7 +825,16 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
if (AR_SREV_9280_20(ah))
ath9k_hw_init_txgain_ini(ah);
if (ah->hw_version.devid == AR9280_DEVID_PCI) {
if (!ath9k_hw_fill_cap_info(ah)) {
DPRINTF(sc, ATH_DBG_RESET, "failed ath9k_hw_fill_cap_info\n");
ecode = -EINVAL;
goto bad;
}
if ((ah->hw_version.devid == AR9280_DEVID_PCI) &&
test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) {
/* EEPROM Fixup */
for (i = 0; i < ah->iniModes.ia_rows; i++) {
u32 reg = INI_RA(&ah->iniModes, i, 0);
......@@ -838,13 +849,6 @@ static struct ath_hw *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
}
}
if (!ath9k_hw_fill_cap_info(ah)) {
DPRINTF(sc, ATH_DBG_RESET,
"failed ath9k_hw_fill_cap_info\n");
ecode = -EINVAL;
goto bad;
}
ecode = ath9k_hw_init_macaddr(ah);
if (ecode != 0) {
DPRINTF(sc, ATH_DBG_RESET,
......@@ -1200,6 +1204,17 @@ static u32 ath9k_hw_ini_fixup(struct ath_hw *ah,
return ath9k_hw_def_ini_fixup(ah, pEepData, reg, value);
}
static void ath9k_olc_init(struct ath_hw *ah)
{
u32 i;
for (i = 0; i < AR9280_TX_GAIN_TABLE_SIZE; i++)
ah->originalGain[i] =
MS(REG_READ(ah, AR_PHY_TX_GAIN_TBL1 + i * 4),
AR_PHY_TX_GAIN);
ah->PDADCdelta = 0;
}
static int ath9k_hw_process_ini(struct ath_hw *ah,
struct ath9k_channel *chan,
enum ath9k_ht_macmode macmode)
......@@ -1306,6 +1321,9 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
ath9k_hw_set_regs(ah, chan, macmode);
ath9k_hw_init_chain_masks(ah);
if (OLC_FOR_AR9280_20_LATER)
ath9k_olc_init(ah);
status = ah->eep_ops->set_txpower(ah, chan,
ath9k_regd_get_ctl(ah, chan),
channel->max_antenna_gain * 2,
......@@ -1464,6 +1482,14 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
u32 rst_flags;
u32 tmpReg;
if (AR_SREV_9100(ah)) {
u32 val = REG_READ(ah, AR_RTC_DERIVED_CLK);
val &= ~AR_RTC_DERIVED_CLK_PERIOD;
val |= SM(1, AR_RTC_DERIVED_CLK_PERIOD);
REG_WRITE(ah, AR_RTC_DERIVED_CLK, val);
(void)REG_READ(ah, AR_RTC_DERIVED_CLK);
}
REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
AR_RTC_FORCE_WAKE_ON_INT);
......@@ -1490,7 +1516,7 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
udelay(50);
REG_WRITE(ah, AR_RTC_RC, 0);
if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0)) {
if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
DPRINTF(ah->ah_sc, ATH_DBG_RESET,
"RTC stuck in MAC reset\n");
return false;
......@@ -1513,12 +1539,14 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
AR_RTC_FORCE_WAKE_ON_INT);
REG_WRITE(ah, AR_RTC_RESET, 0);
udelay(2);
REG_WRITE(ah, AR_RTC_RESET, 1);
if (!ath9k_hw_wait(ah,
AR_RTC_STATUS,
AR_RTC_STATUS_M,
AR_RTC_STATUS_ON)) {
AR_RTC_STATUS_ON,
AH_WAIT_TIMEOUT)) {
DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n");
return false;
}
......@@ -1580,7 +1608,10 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan,
static bool ath9k_hw_chip_reset(struct ath_hw *ah,
struct ath9k_channel *chan)
{
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))
if (OLC_FOR_AR9280_20_LATER) {
if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON))
return false;
} else if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))
return false;
if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
......@@ -1610,7 +1641,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
AR_PHY_RFBUS_GRANT_EN)) {
AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) {
DPRINTF(ah->ah_sc, ATH_DBG_REG_IO,
"Could not kill baseband RX\n");
return false;
......@@ -2801,6 +2832,8 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
mask2 |= ATH9K_INT_GTT;
if (isr2 & AR_ISR_S2_CST)
mask2 |= ATH9K_INT_CST;
if (isr2 & AR_ISR_S2_TSFOOR)
mask2 |= ATH9K_INT_TSFOOR;
}
isr = REG_READ(ah, AR_ISR_RAC);
......@@ -2946,7 +2979,9 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
if (ints & ATH9K_INT_DTIMSYNC)
mask2 |= AR_IMR_S2_DTIMSYNC;
if (ints & ATH9K_INT_CABEND)
mask2 |= (AR_IMR_S2_CABEND);
mask2 |= AR_IMR_S2_CABEND;
if (ints & ATH9K_INT_TSFOOR)
mask2 |= AR_IMR_S2_TSFOOR;
}
if (ints & (ATH9K_INT_GTT | ATH9K_INT_CST)) {
......@@ -3116,6 +3151,8 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN |
AR_DTIM_TIMER_EN);
/* TSF Out of Range Threshold */
REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
}
/*******************/
......@@ -3128,10 +3165,11 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
u16 capField = 0, eeval;
eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
ah->regulatory.current_rd = eeval;
eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1);
if (AR_SREV_9285_10_OR_LATER(ah))
eeval |= AR9285_RDEXT_DEFAULT;
ah->regulatory.current_rd_ext = eeval;
capField = ah->eep_ops->get_eeprom(ah, EEP_OP_CAP);
......@@ -3182,14 +3220,11 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
}
pCap->tx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_TX_MASK);
if ((ah->is_pciexpress)
|| (eeval & AR5416_OPFLAGS_11A)) {
pCap->rx_chainmask =
ah->eep_ops->get_eeprom(ah, EEP_RX_MASK);
} else {
pCap->rx_chainmask =
(ath9k_hw_gpio_get(ah, 0)) ? 0x5 : 0x7;
}
if ((ah->hw_version.devid == AR5416_DEVID_PCI) &&
!(eeval & AR5416_OPFLAGS_11A))
pCap->rx_chainmask = ath9k_hw_gpio_get(ah, 0) ? 0x5 : 0x7;
else
pCap->rx_chainmask = ah->eep_ops->get_eeprom(ah, EEP_RX_MASK);
if (!(AR_SREV_9280(ah) && (ah->hw_version.macRev == 0)))
ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA;
......@@ -3317,8 +3352,6 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah)
bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
u32 capability, u32 *result)
{
const struct ath9k_hw_capabilities *pCap = &ah->caps;
switch (type) {
case ATH9K_CAP_CIPHER:
switch (capability) {
......@@ -3344,16 +3377,10 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
case ATH9K_CAP_TKIP_SPLIT:
return (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA) ?
false : true;
case ATH9K_CAP_WME_TKIPMIC:
return 0;
case ATH9K_CAP_PHYCOUNTERS:
return ah->has_hw_phycounters ? 0 : -ENXIO;
case ATH9K_CAP_DIVERSITY:
return (REG_READ(ah, AR_PHY_CCK_DETECT) &
AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV) ?
true : false;
case ATH9K_CAP_PHYDIAG:
return true;
case ATH9K_CAP_MCAST_KEYSRCH:
switch (capability) {
case 0:
......@@ -3368,18 +3395,6 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
}
}
return false;
case ATH9K_CAP_TSF_ADJUST:
return (ah->misc_mode & AR_PCU_TX_ADD_TSF) ?
true : false;
case ATH9K_CAP_RFSILENT:
if (capability == 3)
return false;
case ATH9K_CAP_ANT_CFG_2GHZ:
*result = pCap->num_antcfg_2ghz;
return true;
case ATH9K_CAP_ANT_CFG_5GHZ:
*result = pCap->num_antcfg_5ghz;
return true;
case ATH9K_CAP_TXPOW:
switch (capability) {
case 0:
......@@ -3395,6 +3410,10 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
return 0;
}
return false;
case ATH9K_CAP_DS:
return (AR_SREV_9280_20_OR_LATER(ah) &&
(ah->eep_ops->get_eeprom(ah, EEP_RC_CHAIN_MASK) == 1))
? false : true;
default:
return false;
}
......@@ -3428,12 +3447,6 @@ bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
else
ah->sta_id1_defaults &= ~AR_STA_ID1_MCAST_KSRCH;
return true;
case ATH9K_CAP_TSF_ADJUST:
if (setting)
ah->misc_mode |= AR_PCU_TX_ADD_TSF;
else
ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
return true;
default:
return false;
}
......
drivers/net/wireless/ath9k/hw.h
浏览文件 @ 8010dc30
......@@ -93,7 +93,7 @@
#define ATH9K_NUM_QUEUES 10
#define MAX_RATE_POWER 63
#define AH_TIMEOUT 100000
#define AH_WAIT_TIMEOUT 100000 /* (us) */
#define AH_TIME_QUANTUM 10
#define AR_KEYTABLE_SIZE 128
#define POWER_UP_TIME 200000
......@@ -153,16 +153,10 @@ enum ath9k_capability_type {
ATH9K_CAP_CIPHER = 0,
ATH9K_CAP_TKIP_MIC,
ATH9K_CAP_TKIP_SPLIT,
ATH9K_CAP_PHYCOUNTERS,
ATH9K_CAP_DIVERSITY,
ATH9K_CAP_TXPOW,
ATH9K_CAP_PHYDIAG,
ATH9K_CAP_MCAST_KEYSRCH,
ATH9K_CAP_TSF_ADJUST,
ATH9K_CAP_WME_TKIPMIC,
ATH9K_CAP_RFSILENT,
ATH9K_CAP_ANT_CFG_2GHZ,
ATH9K_CAP_ANT_CFG_5GHZ
ATH9K_CAP_DS
};
struct ath9k_hw_capabilities {
......@@ -249,6 +243,7 @@ enum ath9k_int {
ATH9K_INT_DTIMSYNC = 0x00800000,
ATH9K_INT_GPIO = 0x01000000,
ATH9K_INT_CABEND = 0x02000000,
ATH9K_INT_TSFOOR = 0x04000000,
ATH9K_INT_CST = 0x10000000,
ATH9K_INT_GTT = 0x20000000,
ATH9K_INT_FATAL = 0x40000000,
......@@ -256,6 +251,7 @@ enum ath9k_int {
ATH9K_INT_BMISC = ATH9K_INT_TIM |
ATH9K_INT_DTIM |
ATH9K_INT_DTIMSYNC |
ATH9K_INT_TSFOOR |
ATH9K_INT_CABEND,
ATH9K_INT_COMMON = ATH9K_INT_RXNOFRM |
ATH9K_INT_RXDESC |
......@@ -385,6 +381,7 @@ struct ath9k_beacon_state {
#define ATH9K_BEACON_PERIOD 0x0000ffff
#define ATH9K_BEACON_ENA 0x00800000
#define ATH9K_BEACON_RESET_TSF 0x01000000
#define ATH9K_TSFOOR_THRESHOLD 0x00004240 /* 16k us */
u32 bs_dtimperiod;
u16 bs_cfpperiod;
u16 bs_cfpmaxduration;
......@@ -392,6 +389,7 @@ struct ath9k_beacon_state {
u16 bs_timoffset;
u16 bs_bmissthreshold;
u32 bs_sleepduration;
u32 bs_tsfoor_threshold;
};
struct chan_centers {
......@@ -547,6 +545,10 @@ struct ath_hw {
u8 txchainmask;
u8 rxchainmask;
u32 originalGain[22];
int initPDADC;
int PDADCdelta;
struct ar5416IniArray iniModes;
struct ar5416IniArray iniCommon;
struct ar5416IniArray iniBank0;
......@@ -603,7 +605,7 @@ bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
u8 *antenna_cfgd);
/* General Operation */
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val);
bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
u32 ath9k_hw_reverse_bits(u32 val, u32 n);
bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high);
u16 ath9k_hw_computetxtime(struct ath_hw *ah, struct ath_rate_table *rates,
......
drivers/net/wireless/ath9k/mac.c
浏览文件 @ 8010dc30
......@@ -285,7 +285,7 @@ int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds)
ds->ds_txstat.ts_shortretry = MS(ads->ds_txstatus1, AR_RTSFailCnt);
ds->ds_txstat.ts_longretry = MS(ads->ds_txstatus1, AR_DataFailCnt);
ds->ds_txstat.ts_virtcol = MS(ads->ds_txstatus1, AR_VirtRetryCnt);
ds->ds_txstat.ts_antenna = 1;
ds->ds_txstat.ts_antenna = 0;
return 0;
}
......@@ -886,7 +886,8 @@ bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
REG_SET_BIT(ah, AR_DIAG_SW,
(AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
if (!ath9k_hw_wait(ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE, 0)) {
if (!ath9k_hw_wait(ah, AR_OBS_BUS_1, AR_OBS_BUS_1_RX_STATE,
0, AH_WAIT_TIMEOUT)) {
REG_CLR_BIT(ah, AR_DIAG_SW,
(AR_DIAG_RX_DIS |
AR_DIAG_RX_ABORT));
......@@ -933,15 +934,32 @@ void ath9k_hw_stoppcurecv(struct ath_hw *ah)
bool ath9k_hw_stopdmarecv(struct ath_hw *ah)
{
#define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */
#define AH_RX_TIME_QUANTUM 100 /* usec */
int i;
REG_WRITE(ah, AR_CR, AR_CR_RXD);
if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0)) {
/* Wait for rx enable bit to go low */
for (i = AH_RX_STOP_DMA_TIMEOUT / AH_TIME_QUANTUM; i != 0; i--) {
if ((REG_READ(ah, AR_CR) & AR_CR_RXE) == 0)
break;
udelay(AH_TIME_QUANTUM);
}
if (i == 0) {
DPRINTF(ah->ah_sc, ATH_DBG_QUEUE,
"dma failed to stop in 10ms\n"
"AR_CR=0x%08x\nAR_DIAG_SW=0x%08x\n",
REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
"dma failed to stop in %d ms "
"AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
AH_RX_STOP_DMA_TIMEOUT / 1000,
REG_READ(ah, AR_CR),
REG_READ(ah, AR_DIAG_SW));
return false;
} else {
return true;
}
#undef AH_RX_TIME_QUANTUM
#undef AH_RX_STOP_DMA_TIMEOUT
}
drivers/net/wireless/ath9k/mac.h
浏览文件 @ 8010dc30
......@@ -566,8 +566,9 @@ enum ath9k_rx_filter {
ATH9K_RX_FILTER_BEACON = 0x00000010,
ATH9K_RX_FILTER_PROM = 0x00000020,
ATH9K_RX_FILTER_PROBEREQ = 0x00000080,
ATH9K_RX_FILTER_PSPOLL = 0x00004000,
ATH9K_RX_FILTER_PHYERR = 0x00000100,
ATH9K_RX_FILTER_MYBEACON = 0x00000200,
ATH9K_RX_FILTER_PSPOLL = 0x00004000,
ATH9K_RX_FILTER_PHYRADAR = 0x00002000,
};
......
drivers/net/wireless/ath9k/main.c
浏览文件 @ 8010dc30
......@@ -308,23 +308,23 @@ static int ath_set_channel(struct ath_softc *sc, struct ath9k_channel *hchan)
*/
static void ath_ani_calibrate(unsigned long data)
{
struct ath_softc *sc;
struct ath_hw *ah;
struct ath_softc *sc = (struct ath_softc *)data;
struct ath_hw *ah = sc->sc_ah;
bool longcal = false;
bool shortcal = false;
bool aniflag = false;
unsigned int timestamp = jiffies_to_msecs(jiffies);
u32 cal_interval;
u32 cal_interval, short_cal_interval;
sc = (struct ath_softc *)data;
ah = sc->sc_ah;
short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
/*
* don't calibrate when we're scanning.
* we are most likely not on our home channel.
*/
if (sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC)
return;
goto set_timer;
/* Long calibration runs independently of short calibration. */
if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
......@@ -335,8 +335,7 @@ static void ath_ani_calibrate(unsigned long data)
/* Short calibration applies only while caldone is false */
if (!sc->ani.caldone) {
if ((timestamp - sc->ani.shortcal_timer) >=
ATH_SHORT_CALINTERVAL) {
if ((timestamp - sc->ani.shortcal_timer) >= short_cal_interval) {
shortcal = true;
DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies);
sc->ani.shortcal_timer = timestamp;
......@@ -352,8 +351,7 @@ static void ath_ani_calibrate(unsigned long data)
}
/* Verify whether we must check ANI */
if ((timestamp - sc->ani.checkani_timer) >=
ATH_ANI_POLLINTERVAL) {
if ((timestamp - sc->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
aniflag = true;
sc->ani.checkani_timer = timestamp;
}
......@@ -362,8 +360,7 @@ static void ath_ani_calibrate(unsigned long data)
if (longcal || shortcal || aniflag) {
/* Call ANI routine if necessary */
if (aniflag)
ath9k_hw_ani_monitor(ah, &sc->nodestats,
ah->curchan);
ath9k_hw_ani_monitor(ah, &sc->nodestats, ah->curchan);
/* Perform calibration if necessary */
if (longcal || shortcal) {
......@@ -392,6 +389,7 @@ static void ath_ani_calibrate(unsigned long data)
}
}
set_timer:
/*
* Set timer interval based on previous results.
* The interval must be the shortest necessary to satisfy ANI,
......@@ -401,7 +399,7 @@ static void ath_ani_calibrate(unsigned long data)
if (sc->sc_ah->config.enable_ani)
cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
if (!sc->ani.caldone)
cal_interval = min(cal_interval, (u32)ATH_SHORT_CALINTERVAL);
cal_interval = min(cal_interval, (u32)short_cal_interval);
mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
}
......@@ -574,6 +572,10 @@ irqreturn_t ath_isr(int irq, void *dev)
sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
}
}
if (status & ATH9K_INT_TSFOOR) {
/* FIXME: Handle this interrupt for power save */
sched = true;
}
}
} while (0);
......@@ -920,8 +922,7 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
/* Start ANI */
mod_timer(&sc->ani.timer,
jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
} else {
DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISSOC\n");
sc->curaid = 0;
......@@ -1566,6 +1567,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
int ath_attach(u16 devid, struct ath_softc *sc)
{
struct ieee80211_hw *hw = sc->hw;
const struct ieee80211_regdomain *regd;
int error = 0, i;
DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
......@@ -1598,6 +1600,7 @@ int ath_attach(u16 devid, struct ath_softc *sc)
hw->queues = 4;
hw->max_rates = 4;
hw->channel_change_time = 5000;
hw->max_rate_tries = ATH_11N_TXMAXTRY;
hw->sta_data_size = sizeof(struct ath_node);
hw->vif_data_size = sizeof(struct ath_vif);
......@@ -1636,30 +1639,29 @@ int ath_attach(u16 devid, struct ath_softc *sc)
#endif
if (ath9k_is_world_regd(sc->sc_ah)) {
/* Anything applied here (prior to wiphy registratoin) gets
/* Anything applied here (prior to wiphy registration) gets
* saved on the wiphy orig_* parameters */
const struct ieee80211_regdomain *regd =
ath9k_world_regdomain(sc->sc_ah);
regd = ath9k_world_regdomain(sc->sc_ah);
hw->wiphy->custom_regulatory = true;
hw->wiphy->strict_regulatory = false;
wiphy_apply_custom_regulatory(sc->hw->wiphy, regd);
ath9k_reg_apply_radar_flags(hw->wiphy);
ath9k_reg_apply_world_flags(hw->wiphy, REGDOM_SET_BY_INIT);
} else {
/* This gets applied in the case of the absense of CRDA,
* its our own custom world regulatory domain, similar to
* it's our own custom world regulatory domain, similar to
* cfg80211's but we enable passive scanning */
const struct ieee80211_regdomain *regd =
ath9k_default_world_regdomain();
wiphy_apply_custom_regulatory(sc->hw->wiphy, regd);
ath9k_reg_apply_radar_flags(hw->wiphy);
ath9k_reg_apply_world_flags(hw->wiphy, REGDOM_SET_BY_INIT);
regd = ath9k_default_world_regdomain();
}
wiphy_apply_custom_regulatory(hw->wiphy, regd);
ath9k_reg_apply_radar_flags(hw->wiphy);
ath9k_reg_apply_world_flags(hw->wiphy, REGDOM_SET_BY_INIT);
error = ieee80211_register_hw(hw);
if (!ath9k_is_world_regd(sc->sc_ah))
regulatory_hint(hw->wiphy, sc->sc_ah->regulatory.alpha2);
if (!ath9k_is_world_regd(sc->sc_ah)) {
error = regulatory_hint(hw->wiphy,
sc->sc_ah->regulatory.alpha2);
if (error)
goto error_attach;
}
/* Initialize LED control */
ath_init_leds(sc);
......@@ -2143,6 +2145,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
default:
DPRINTF(sc, ATH_DBG_FATAL,
"Interface type %d not yet supported\n", conf->type);
mutex_unlock(&sc->mutex);
return -EOPNOTSUPP;
}
......@@ -2165,10 +2168,13 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
* Enable MIB interrupts when there are hardware phy counters.
* Note we only do this (at the moment) for station mode.
*/
if (ath9k_hw_phycounters(sc->sc_ah) &&
((conf->type == NL80211_IFTYPE_STATION) ||
(conf->type == NL80211_IFTYPE_ADHOC)))
sc->imask |= ATH9K_INT_MIB;
if ((conf->type == NL80211_IFTYPE_STATION) ||
(conf->type == NL80211_IFTYPE_ADHOC)) {
if (ath9k_hw_phycounters(sc->sc_ah))
sc->imask |= ATH9K_INT_MIB;
sc->imask |= ATH9K_INT_TSFOOR;
}
/*
* Some hardware processes the TIM IE and fires an
* interrupt when the TIM bit is set. For hardware
......
drivers/net/wireless/ath9k/pci.c
浏览文件 @ 8010dc30
......@@ -52,8 +52,8 @@ static void ath_pci_cleanup(struct ath_softc *sc)
struct pci_dev *pdev = to_pci_dev(sc->dev);
pci_iounmap(pdev, sc->mem);
pci_release_region(pdev, 0);
pci_disable_device(pdev);
pci_release_region(pdev, 0);
}
static bool ath_pci_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)
......@@ -63,7 +63,8 @@ static bool ath_pci_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)
if (!ath9k_hw_wait(ah,
AR_EEPROM_STATUS_DATA,
AR_EEPROM_STATUS_DATA_BUSY |
AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0)) {
AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
AH_WAIT_TIMEOUT)) {
return false;
}
......@@ -292,7 +293,7 @@ static struct pci_driver ath_pci_driver = {
#endif /* CONFIG_PM */
};
int __init ath_pci_init(void)
int ath_pci_init(void)
{
return pci_register_driver(&ath_pci_driver);
}
......
drivers/net/wireless/ath9k/phy.c
浏览文件 @ 8010dc30
......@@ -132,20 +132,27 @@ ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
bMode = 0;
fracMode = 0;
if ((freq % 20) == 0) {
aModeRefSel = 3;
} else if ((freq % 10) == 0) {
aModeRefSel = 2;
} else {
switch(ah->eep_ops->get_eeprom(ah, EEP_FRAC_N_5G)) {
case 0:
if ((freq % 20) == 0) {
aModeRefSel = 3;
} else if ((freq % 10) == 0) {
aModeRefSel = 2;
}
if (aModeRefSel)
break;
case 1:
default:
aModeRefSel = 0;
fracMode = 1;
refDivA = 1;
channelSel = (freq * 0x8000) / 15;
REG_RMW_FIELD(ah, AR_AN_SYNTH9,
AR_AN_SYNTH9_REFDIVA, refDivA);
}
if (!fracMode) {
ndiv = (freq * (refDivA >> aModeRefSel)) / 60;
channelSel = ndiv & 0x1ff;
......
drivers/net/wireless/ath9k/phy.h
浏览文件 @ 8010dc30
......@@ -387,6 +387,8 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_CCK_TX_CTRL 0xA204
#define AR_PHY_CCK_TX_CTRL_JAPAN 0x00000010
#define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK 0x0000000C
#define AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK_S 2
#define AR_PHY_CCK_DETECT 0xA208
#define AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK 0x0000003F
......@@ -444,6 +446,29 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_TPCRG1_PD_GAIN_3 0x00300000
#define AR_PHY_TPCRG1_PD_GAIN_3_S 20
#define AR_PHY_TX_PWRCTRL4 0xa264
#define AR_PHY_TX_PWRCTRL_PD_AVG_VALID 0x00000001
#define AR_PHY_TX_PWRCTRL_PD_AVG_VALID_S 0
#define AR_PHY_TX_PWRCTRL_PD_AVG_OUT 0x000001FE
#define AR_PHY_TX_PWRCTRL_PD_AVG_OUT_S 1
#define AR_PHY_TX_PWRCTRL6_0 0xa270
#define AR_PHY_TX_PWRCTRL6_1 0xb270
#define AR_PHY_TX_PWRCTRL_ERR_EST_MODE 0x03000000
#define AR_PHY_TX_PWRCTRL_ERR_EST_MODE_S 24
#define AR_PHY_TX_PWRCTRL7 0xa274
#define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN 0x01F80000
#define AR_PHY_TX_PWRCTRL_INIT_TX_GAIN_S 19
#define AR_PHY_TX_PWRCTRL9 0xa27C
#define AR_PHY_TX_DESIRED_SCALE_CCK 0x00007C00
#define AR_PHY_TX_DESIRED_SCALE_CCK_S 10
#define AR_PHY_TX_GAIN_TBL1 0xa300
#define AR_PHY_TX_GAIN 0x0007F000
#define AR_PHY_TX_GAIN_S 12
#define AR_PHY_VIT_MASK2_M_46_61 0xa3a0
#define AR_PHY_MASK2_M_31_45 0xa3a4
#define AR_PHY_MASK2_M_16_30 0xa3a8
......@@ -485,6 +510,10 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4 0x0FC00000
#define AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4_S 22
/* Carrier leak calibration control, do it after AGC calibration */
#define AR_PHY_CL_CAL_CTL 0xA358
#define AR_PHY_CL_CAL_ENABLE 0x00000002
#define AR_PHY_POWER_TX_RATE5 0xA38C
#define AR_PHY_POWER_TX_RATE6 0xA390
......
drivers/net/wireless/ath9k/rc.c
浏览文件 @ 8010dc30
......@@ -1267,7 +1267,8 @@ static void ath_rc_update_ht(struct ath_softc *sc,
ath_rc_priv->per_down_time = now_msec;
}
ath_debug_stat_retries(sc, tx_rate, xretries, retries);
ath_debug_stat_retries(sc, tx_rate, xretries, retries,
ath_rc_priv->state[tx_rate].per);
#undef CHK_RSSI
}
......@@ -1392,6 +1393,7 @@ static void ath_rc_init(struct ath_softc *sc,
struct ath_rateset *rateset = &ath_rc_priv->neg_rates;
u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates;
u8 i, j, k, hi = 0, hthi = 0;
struct ath_hw *ah = sc->sc_ah;
/* FIXME: Adhoc */
if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) ||
......@@ -1412,7 +1414,8 @@ static void ath_rc_init(struct ath_softc *sc,
if (sta->ht_cap.ht_supported) {
ath_rc_priv->ht_cap = WLAN_RC_HT_FLAG;
if (sc->sc_ah->caps.tx_chainmask != 1)
if (sc->sc_ah->caps.tx_chainmask != 1 &&
ath9k_hw_getcapability(ah, ATH9K_CAP_DS, 0, NULL))
ath_rc_priv->ht_cap |= WLAN_RC_DS_FLAG;
if (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
ath_rc_priv->ht_cap |= WLAN_RC_40_FLAG;
......@@ -1533,7 +1536,8 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
tx_info_priv->tx.ts_longretry);
/* Check if aggregation has to be enabled for this tid */
if (conf_is_ht(&sc->hw->conf)) {
if (conf_is_ht(&sc->hw->conf) &&
!(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
if (ieee80211_is_data_qos(fc)) {
u8 *qc, tid;
struct ath_node *an;
......
drivers/net/wireless/ath9k/recv.c
浏览文件 @ 8010dc30
......@@ -375,14 +375,15 @@ u32 ath_calcrxfilter(struct ath_softc *sc)
if (sc->rx.rxfilter & FIF_CONTROL)
rfilt |= ATH9K_RX_FILTER_CONTROL;
if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION ||
sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
!(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
rfilt |= ATH9K_RX_FILTER_MYBEACON;
else
rfilt |= ATH9K_RX_FILTER_BEACON;
/* If in HOSTAP mode, want to enable reception of PSPOLL frames
& beacon frames */
/* If in HOSTAP mode, want to enable reception of PSPOLL frames */
if (sc->sc_ah->opmode == NL80211_IFTYPE_AP)
rfilt |= (ATH9K_RX_FILTER_BEACON | ATH9K_RX_FILTER_PSPOLL);
rfilt |= ATH9K_RX_FILTER_PSPOLL;
return rfilt;
......@@ -427,7 +428,6 @@ bool ath_stoprecv(struct ath_softc *sc)
ath9k_hw_stoppcurecv(ah);
ath9k_hw_setrxfilter(ah, 0);
stopped = ath9k_hw_stopdmarecv(ah);
mdelay(3); /* 3ms is long enough for 1 frame */
sc->rx.rxlink = NULL;
return stopped;
......
drivers/net/wireless/ath9k/reg.h
浏览文件 @ 8010dc30
......@@ -977,8 +977,6 @@ enum {
#define AR_RTC_PLL_CLKSEL 0x00000300
#define AR_RTC_PLL_CLKSEL_S 8
#define AR_RTC_RESET \
((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)
#define AR_RTC_RESET_EN (0x00000001)
......@@ -1015,6 +1013,12 @@ enum {
#define AR_RTC_INTR_MASK \
((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0058) : 0x7058)
/* RTC_DERIVED_* - only for AR9100 */
#define AR_RTC_DERIVED_CLK (AR_RTC_BASE + 0x0038)
#define AR_RTC_DERIVED_CLK_PERIOD 0x0000fffe
#define AR_RTC_DERIVED_CLK_PERIOD_S 1
#define AR_SEQ_MASK 0x8060
#define AR_AN_RF2G1_CH0 0x7810
......@@ -1385,8 +1389,8 @@ enum {
#define AR_PHY_COUNTMAX (3 << 22)
#define AR_MIBCNT_INTRMASK (3 << 22)
#define AR_TSF_THRESHOLD 0x813c
#define AR_TSF_THRESHOLD_VAL 0x0000FFFF
#define AR_TSFOOR_THRESHOLD 0x813c
#define AR_TSFOOR_THRESHOLD_VAL 0x0000FFFF
#define AR_PHY_ERR_EIFS_MASK 8144
......
drivers/net/wireless/ath9k/regd.c
浏览文件 @ 8010dc30
......@@ -106,19 +106,20 @@ static const struct ieee80211_regdomain ath9k_world_regdom_67_68_6A = {
}
};
static u16 ath9k_regd_get_eepromRD(struct ath_hw *ah)
static inline bool is_wwr_sku(u16 regd)
{
return ah->regulatory.current_rd & ~WORLDWIDE_ROAMING_FLAG;
return ((regd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX) ||
(regd == WORLD);
}
u16 ath9k_regd_get_rd(struct ath_hw *ah)
static u16 ath9k_regd_get_eepromRD(struct ath_hw *ah)
{
return ath9k_regd_get_eepromRD(ah);
return ah->regulatory.current_rd & ~WORLDWIDE_ROAMING_FLAG;
}
bool ath9k_is_world_regd(struct ath_hw *ah)
{
return isWwrSKU(ah);
return is_wwr_sku(ath9k_regd_get_eepromRD(ah));
}
const struct ieee80211_regdomain *ath9k_default_world_regdomain(void)
......@@ -159,13 +160,18 @@ static bool ath9k_is_radar_freq(u16 center_freq)
}
/*
* Enable adhoc on 5 GHz if allowed by 11d.
* Remove passive scan if channel is allowed by 11d,
* except when on radar frequencies.
* N.B: These exception rules do not apply radar freqs.
*
* - We enable adhoc (or beaconing) if allowed by 11d
* - We enable active scan if the channel is allowed by 11d
* - If no country IE has been processed and a we determine we have
* received a beacon on a channel we can enable active scan and
* adhoc (or beaconing).
*/
static void ath9k_reg_apply_5ghz_beaconing_flags(struct wiphy *wiphy,
static void ath9k_reg_apply_beaconing_flags(struct wiphy *wiphy,
enum reg_set_by setby)
{
enum ieee80211_band band;
struct ieee80211_supported_band *sband;
const struct ieee80211_reg_rule *reg_rule;
struct ieee80211_channel *ch;
......@@ -173,29 +179,50 @@ static void ath9k_reg_apply_5ghz_beaconing_flags(struct wiphy *wiphy,
u32 bandwidth = 0;
int r;
if (setby != REGDOM_SET_BY_COUNTRY_IE)
return;
if (!wiphy->bands[IEEE80211_BAND_5GHZ])
return;
for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
sband = wiphy->bands[IEEE80211_BAND_5GHZ];
for (i = 0; i < sband->n_channels; i++) {
ch = &sband->channels[i];
r = freq_reg_info(wiphy, ch->center_freq,
&bandwidth, &reg_rule);
if (r)
if (!wiphy->bands[band])
continue;
/* If 11d had a rule for this channel ensure we enable adhoc
* if it allows us to use it. Note that we would have disabled
* it by applying our static world regdomain by default during
* probe */
if (!(reg_rule->flags & NL80211_RRF_NO_IBSS))
ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
if (!ath9k_is_radar_freq(ch->center_freq))
continue;
if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
sband = wiphy->bands[band];
for (i = 0; i < sband->n_channels; i++) {
ch = &sband->channels[i];
if (ath9k_is_radar_freq(ch->center_freq) ||
(ch->flags & IEEE80211_CHAN_RADAR))
continue;
if (setby == REGDOM_SET_BY_COUNTRY_IE) {
r = freq_reg_info(wiphy, ch->center_freq,
&bandwidth, &reg_rule);
if (r)
continue;
/*
* If 11d had a rule for this channel ensure
* we enable adhoc/beaconing if it allows us to
* use it. Note that we would have disabled it
* by applying our static world regdomain by
* default during init, prior to calling our
* regulatory_hint().
*/
if (!(reg_rule->flags &
NL80211_RRF_NO_IBSS))
ch->flags &=
~IEEE80211_CHAN_NO_IBSS;
if (!(reg_rule->flags &
NL80211_RRF_PASSIVE_SCAN))
ch->flags &=
~IEEE80211_CHAN_PASSIVE_SCAN;
} else {
if (ch->beacon_found)
ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
IEEE80211_CHAN_PASSIVE_SCAN);
}
}
}
}
/* Allows active scan scan on Ch 12 and 13 */
......@@ -208,11 +235,12 @@ static void ath9k_reg_apply_active_scan_flags(struct wiphy *wiphy,
u32 bandwidth = 0;
int r;
/* Force passive scan on Channels 12-13 */
sband = wiphy->bands[IEEE80211_BAND_2GHZ];
/* If no country IE has been received always enable active scan
* on these channels */
/*
* If no country IE has been received always enable active scan
* on these channels. This is only done for specific regulatory SKUs
*/
if (setby != REGDOM_SET_BY_COUNTRY_IE) {
ch = &sband->channels[11]; /* CH 12 */
if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
......@@ -223,10 +251,12 @@ static void ath9k_reg_apply_active_scan_flags(struct wiphy *wiphy,
return;
}
/* If a country IE has been recieved check its rule for this
/*
* If a country IE has been recieved check its rule for this
* channel first before enabling active scan. The passive scan
* would have been enforced by the initial probe processing on
* our custom regulatory domain. */
* would have been enforced by the initial processing of our
* custom regulatory domain.
*/
ch = &sband->channels[11]; /* CH 12 */
r = freq_reg_info(wiphy, ch->center_freq, &bandwidth, &reg_rule);
......@@ -289,10 +319,10 @@ void ath9k_reg_apply_world_flags(struct wiphy *wiphy, enum reg_set_by setby)
case 0x63:
case 0x66:
case 0x67:
ath9k_reg_apply_5ghz_beaconing_flags(wiphy, setby);
ath9k_reg_apply_beaconing_flags(wiphy, setby);
break;
case 0x68:
ath9k_reg_apply_5ghz_beaconing_flags(wiphy, setby);
ath9k_reg_apply_beaconing_flags(wiphy, setby);
ath9k_reg_apply_active_scan_flags(wiphy, setby);
break;
}
......@@ -371,11 +401,8 @@ ath9k_regd_find_country_by_rd(int regdmn)
}
/* Returns the map of the EEPROM set RD to a country code */
static u16 ath9k_regd_get_default_country(struct ath_hw *ah)
static u16 ath9k_regd_get_default_country(u16 rd)
{
u16 rd;
rd = ath9k_regd_get_eepromRD(ah);
if (rd & COUNTRY_ERD_FLAG) {
struct country_code_to_enum_rd *country = NULL;
u16 cc = rd & ~COUNTRY_ERD_FLAG;
......@@ -405,7 +432,7 @@ ath9k_get_regpair(int regdmn)
int ath9k_regd_init(struct ath_hw *ah)
{
struct country_code_to_enum_rd *country = NULL;
int regdmn;
u16 regdmn;
if (!ath9k_regd_is_eeprom_valid(ah)) {
DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY,
......@@ -413,14 +440,14 @@ int ath9k_regd_init(struct ath_hw *ah)
return -EINVAL;
}
ah->regulatory.country_code = ath9k_regd_get_default_country(ah);
regdmn = ath9k_regd_get_eepromRD(ah);
ah->regulatory.country_code = ath9k_regd_get_default_country(regdmn);
if (ah->regulatory.country_code == CTRY_DEFAULT &&
ath9k_regd_get_eepromRD(ah) == CTRY_DEFAULT)
regdmn == CTRY_DEFAULT)
ah->regulatory.country_code = CTRY_UNITED_STATES;
if (ah->regulatory.country_code == CTRY_DEFAULT) {
regdmn = ath9k_regd_get_eepromRD(ah);
country = NULL;
} else {
country = ath9k_regd_find_country(ah->regulatory.country_code);
......@@ -433,7 +460,6 @@ int ath9k_regd_init(struct ath_hw *ah)
regdmn = country->regDmnEnum;
}
ah->regulatory.current_rd_inuse = regdmn;
ah->regulatory.regpair = ath9k_get_regpair(regdmn);
if (!ah->regulatory.regpair) {
......@@ -467,7 +493,8 @@ u32 ath9k_regd_get_ctl(struct ath_hw *ah, struct ath9k_channel *chan)
u32 ctl = NO_CTL;
if (!ah->regulatory.regpair ||
(ah->regulatory.country_code == CTRY_DEFAULT && isWwrSKU(ah))) {
(ah->regulatory.country_code == CTRY_DEFAULT &&
is_wwr_sku(ath9k_regd_get_eepromRD(ah)))) {
if (IS_CHAN_B(chan))
ctl = SD_NO_CTL | CTL_11B;
else if (IS_CHAN_G(chan))
......@@ -480,7 +507,7 @@ u32 ath9k_regd_get_ctl(struct ath_hw *ah, struct ath9k_channel *chan)
if (IS_CHAN_B(chan))
ctl = ah->regulatory.regpair->reg_2ghz_ctl | CTL_11B;
else if (IS_CHAN_G(chan))
ctl = ah->regulatory.regpair->reg_5ghz_ctl | CTL_11G;
ctl = ah->regulatory.regpair->reg_2ghz_ctl | CTL_11G;
else
ctl = ah->regulatory.regpair->reg_5ghz_ctl | CTL_11A;
......
drivers/net/wireless/ath9k/regd.h
浏览文件 @ 8010dc30
......@@ -20,11 +20,6 @@
#define COUNTRY_ERD_FLAG 0x8000
#define WORLDWIDE_ROAMING_FLAG 0x4000
#define isWwrSKU(_ah) \
(((ath9k_regd_get_eepromRD((_ah)) & WORLD_SKU_MASK) == \
WORLD_SKU_PREFIX) || \
(ath9k_regd_get_eepromRD(_ah) == WORLD))
#define MULTI_DOMAIN_MASK 0xFF00
#define WORLD_SKU_MASK 0x00F0
......@@ -52,7 +47,6 @@ struct ath9k_regulatory {
u32 tp_scale;
u16 current_rd;
u16 current_rd_ext;
u16 current_rd_inuse;
int16_t power_limit;
struct reg_dmn_pair_mapping *regpair;
};
......@@ -239,7 +233,6 @@ enum CountryCode {
CTRY_BELGIUM2 = 5002
};
u16 ath9k_regd_get_rd(struct ath_hw *ah);
bool ath9k_is_world_regd(struct ath_hw *ah);
const struct ieee80211_regdomain *ath9k_world_regdomain(struct ath_hw *ah);
const struct ieee80211_regdomain *ath9k_default_world_regdomain(void);
......@@ -249,7 +242,5 @@ int ath9k_regd_init(struct ath_hw *ah);
bool ath9k_regd_is_eeprom_valid(struct ath_hw *ah);
u32 ath9k_regd_get_ctl(struct ath_hw *ah, struct ath9k_channel *chan);
int ath9k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request);
void ath9k_regd_get_current_country(struct ath_hw *ah,
struct ath9k_country_entry *ctry);
#endif
drivers/net/wireless/ath9k/xmit.c
浏览文件 @ 8010dc30
......@@ -772,24 +772,6 @@ bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno)
/* Queue Management */
/********************/
static u32 ath_txq_depth(struct ath_softc *sc, int qnum)
{
return sc->tx.txq[qnum].axq_depth;
}
static void ath_get_beaconconfig(struct ath_softc *sc, int if_id,
struct ath_beacon_config *conf)
{
struct ieee80211_hw *hw = sc->hw;
/* fill in beacon config data */
conf->beacon_interval = hw->conf.beacon_int;
conf->listen_interval = 100;
conf->dtim_count = 1;
conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
}
static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
struct ath_txq *txq)
{
......@@ -964,7 +946,6 @@ int ath_cabq_update(struct ath_softc *sc)
{
struct ath9k_tx_queue_info qi;
int qnum = sc->beacon.cabq->axq_qnum;
struct ath_beacon_config conf;
ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi);
/*
......@@ -975,9 +956,8 @@ int ath_cabq_update(struct ath_softc *sc)
else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND)
sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND;
ath_get_beaconconfig(sc, ATH_IF_ID_ANY, &conf);
qi.tqi_readyTime =
(conf.beacon_interval * sc->config.cabqReadytime) / 100;
qi.tqi_readyTime = (sc->hw->conf.beacon_int *
sc->config.cabqReadytime) / 100;
ath_txq_update(sc, qnum, &qi);
return 0;
......@@ -1657,7 +1637,7 @@ int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb,
* we will at least have to run TX completionon one buffer
* on the queue */
spin_lock_bh(&txq->axq_lock);
if (ath_txq_depth(sc, txq->axq_qnum) > 1) {
if (sc->tx.txq[txq->axq_qnum].axq_depth > 1) {
ieee80211_stop_queue(sc->hw,
skb_get_queue_mapping(skb));
txq->stopped = 1;
......@@ -1867,7 +1847,7 @@ static void ath_wake_mac80211_queue(struct ath_softc *sc, struct ath_txq *txq)
spin_lock_bh(&txq->axq_lock);
if (txq->stopped &&
ath_txq_depth(sc, txq->axq_qnum) <= (ATH_TXBUF - 20)) {
sc->tx.txq[txq->axq_qnum].axq_depth <= (ATH_TXBUF - 20)) {
qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc);
if (qnum != -1) {
ieee80211_wake_queue(sc->hw, qnum);
......
drivers/net/wireless/b43/debugfs.c
浏览文件 @ 8010dc30
......@@ -51,8 +51,8 @@ struct b43_debugfs_fops {
};
static inline
struct b43_dfs_file * fops_to_dfs_file(struct b43_wldev *dev,
const struct b43_debugfs_fops *dfops)
struct b43_dfs_file *fops_to_dfs_file(struct b43_wldev *dev,
const struct b43_debugfs_fops *dfops)
{
void *p;
......
drivers/net/wireless/b43/dma.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/b43/dma.h
浏览文件 @ 8010dc30
#ifndef B43_DMA_H_
#define B43_DMA_H_
#include <linux/list.h>
#include <linux/ieee80211.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/linkage.h>
#include <asm/atomic.h>
#include "b43.h"
/* DMA-Interrupt reasons. */
#define B43_DMAIRQ_FATALMASK ((1 << 10) | (1 << 11) | (1 << 12) \
| (1 << 14) | (1 << 15))
......@@ -161,14 +159,13 @@ struct b43_dmadesc_generic {
/* Misc DMA constants */
#define B43_DMA_RINGMEMSIZE PAGE_SIZE
#define B43_DMA0_RX_FRAMEOFFSET 30
#define B43_DMA3_RX_FRAMEOFFSET 0
#define B43_DMA0_RX_FRAMEOFFSET 30
/* DMA engine tuning knobs */
#define B43_TXRING_SLOTS 128
#define B43_TXRING_SLOTS 256
#define B43_RXRING_SLOTS 64
#define B43_DMA0_RX_BUFFERSIZE (2304 + 100)
#define B43_DMA3_RX_BUFFERSIZE 16
#define B43_DMA0_RX_BUFFERSIZE IEEE80211_MAX_FRAME_LEN
struct sk_buff;
struct b43_private;
......@@ -215,7 +212,7 @@ struct b43_dmaring {
void *descbase;
/* Meta data about all descriptors. */
struct b43_dmadesc_meta *meta;
/* Cache of TX headers for each slot.
/* Cache of TX headers for each TX frame.
* This is to avoid an allocation on each TX.
* This is NULL for an RX ring.
*/
......
drivers/net/wireless/b43/lo.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/b43/main.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/b43/phy_a.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/b43/phy_g.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/b43/pio.c
浏览文件 @ 8010dc30
......@@ -55,8 +55,8 @@ static u16 generate_cookie(struct b43_pio_txqueue *q,
}
static
struct b43_pio_txqueue * parse_cookie(struct b43_wldev *dev,
u16 cookie,
struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
u16 cookie,
struct b43_pio_txpacket **pack)
{
struct b43_pio *pio = &dev->pio;
......@@ -134,8 +134,8 @@ static u16 pio_rxqueue_offset(struct b43_wldev *dev)
return 8;
}
static struct b43_pio_txqueue * b43_setup_pioqueue_tx(struct b43_wldev *dev,
unsigned int index)
static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
unsigned int index)
{
struct b43_pio_txqueue *q;
struct b43_pio_txpacket *p;
......@@ -171,8 +171,8 @@ static struct b43_pio_txqueue * b43_setup_pioqueue_tx(struct b43_wldev *dev,
return q;
}
static struct b43_pio_rxqueue * b43_setup_pioqueue_rx(struct b43_wldev *dev,
unsigned int index)
static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
unsigned int index)
{
struct b43_pio_rxqueue *q;
......@@ -308,8 +308,8 @@ int b43_pio_init(struct b43_wldev *dev)
}
/* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
static struct b43_pio_txqueue * select_queue_by_priority(struct b43_wldev *dev,
u8 queue_prio)
static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
u8 queue_prio)
{
struct b43_pio_txqueue *q;
......
drivers/net/wireless/b43/rfkill.c
浏览文件 @ 8010dc30
......@@ -113,7 +113,7 @@ static int b43_rfkill_soft_toggle(void *data, enum rfkill_state state)
return err;
}
char * b43_rfkill_led_name(struct b43_wldev *dev)
char *b43_rfkill_led_name(struct b43_wldev *dev)
{
struct b43_rfkill *rfk = &(dev->wl->rfkill);
......
drivers/net/wireless/b43/wa.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/hostap/hostap.h
浏览文件 @ 8010dc30
......@@ -31,7 +31,7 @@ void hostap_dump_rx_header(const char *name,
void hostap_dump_tx_header(const char *name,
const struct hfa384x_tx_frame *tx);
extern const struct header_ops hostap_80211_ops;
int hostap_80211_get_hdrlen(u16 fc);
int hostap_80211_get_hdrlen(__le16 fc);
struct net_device_stats *hostap_get_stats(struct net_device *dev);
void hostap_setup_dev(struct net_device *dev, local_info_t *local,
int type);
......
drivers/net/wireless/hostap/hostap_80211.h
浏览文件 @ 8010dc30
......@@ -2,7 +2,7 @@
#define HOSTAP_80211_H
#include <linux/types.h>
#include <net/ieee80211.h>
#include <linux/skbuff.h>
struct hostap_ieee80211_mgmt {
__le16 frame_control;
......
drivers/net/wireless/hostap/hostap_info.c
浏览文件 @ 8010dc30
/* Host AP driver Info Frame processing (part of hostap.o module) */
#include <linux/if_arp.h>
#include "hostap_wlan.h"
#include "hostap.h"
#include "hostap_ap.h"
......
drivers/net/wireless/orinoco/fw.c
浏览文件 @ 8010dc30
此差异已折叠。
drivers/net/wireless/wavelan.c
浏览文件 @ 8010dc30
此差异已折叠。
include/linux/nl80211.h
浏览文件 @ 8010dc30
此差异已折叠。
include/net/cfg80211.h
浏览文件 @ 8010dc30
此差异已折叠。
include/net/mac80211.h
浏览文件 @ 8010dc30
此差异已折叠。
include/net/wireless.h
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/Makefile
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/agg-rx.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/agg-tx.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/cfg.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/debugfs_netdev.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/ht.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/ibss.c 0 → 100644
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/ieee80211_i.h
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/iface.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/key.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/main.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/mlme.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/rate.h
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/rx.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/scan.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/spectmgmt.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/sta_info.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/sta_info.h
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/tx.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/util.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/wext.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/wme.c
浏览文件 @ 8010dc30
此差异已折叠。
net/mac80211/wme.h
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/core.c
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/core.h
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/nl80211.c
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/nl80211.h
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/reg.c
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/reg.h
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/scan.c
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/sysfs.c
浏览文件 @ 8010dc30
此差异已折叠。
net/wireless/wext-compat.c
浏览文件 @ 8010dc30
此差异已折叠。
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