提交 7dd19e75 编写于 作者: C Catalin Marinas 提交者: Russell King

[ARM] 4818/1: RealView: Add core-tile detection

This patch adds the core-tile detection and only enables devices if the
corresponding tile is present. It currently detects the ARM11MPCore via
the core_tile_eb11mp() macro.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 0fc2a161
......@@ -18,6 +18,7 @@
#include <asm/hardware/arm_scu.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/mach-types.h>
extern void realview_secondary_startup(void);
......@@ -31,9 +32,13 @@ static unsigned int __init get_core_count(void)
{
unsigned int ncores;
ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
if (machine_is_realview_eb() && core_tile_eb11mp()) {
ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);
ncores = (ncores & 0x03) + 1;
} else
ncores = 1;
return (ncores & 0x03) + 1;
return ncores;
}
static DEFINE_SPINLOCK(boot_lock);
......@@ -193,7 +198,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
* realview_timer_init
*/
local_timer_setup(cpu);
if (machine_is_realview_eb() && core_tile_eb11mp())
local_timer_setup(cpu);
#endif
/*
......
......@@ -59,26 +59,7 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
.pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
},
#ifdef CONFIG_REALVIEW_MPCORE
{
.virtual = IO_ADDRESS(REALVIEW_GIC1_CPU_BASE),
.pfn = __phys_to_pfn(REALVIEW_GIC1_CPU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_GIC1_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_GIC1_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_MPCORE_L220_BASE),
.pfn = __phys_to_pfn(REALVIEW_MPCORE_L220_BASE),
.length = SZ_8K,
.type = MT_DEVICE,
},
#endif
{
.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
.length = SZ_4K,
......@@ -104,9 +85,30 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
#endif
};
static struct map_desc realview_eb11mp_io_desc[] __initdata = {
{
.virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
.pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
.length = SZ_8K,
.type = MT_DEVICE,
}
};
static void __init realview_eb_map_io(void)
{
iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
if (core_tile_eb11mp())
iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
}
/*
......@@ -243,24 +245,33 @@ static struct platform_device realview_eb_smc91x_device = {
static void __init gic_init_irq(void)
{
#ifdef CONFIG_REALVIEW_MPCORE
unsigned int pldctrl;
writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
pldctrl |= 0x00800000; /* New irq mode */
writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_MPCORE_SYS_PLD_CTRL1);
writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
#endif
gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
#if defined(CONFIG_REALVIEW_MPCORE) && !defined(CONFIG_REALVIEW_MPCORE_REVB)
gic_dist_init(1, __io_address(REALVIEW_GIC1_DIST_BASE), 64);
gic_cpu_init(1, __io_address(REALVIEW_GIC1_CPU_BASE));
gic_cascade_irq(1, IRQ_EB_IRQ1);
if (core_tile_eb11mp()) {
unsigned int pldctrl;
/* new irq mode */
writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
pldctrl |= 0x00800000;
writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
/* core tile GIC, primary */
gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
#ifndef CONFIG_REALVIEW_MPCORE_REVB
/* board GIC, secondary */
gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
#endif
} else {
/* board GIC, primary */
gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
}
}
#ifdef CONFIG_REALVIEW_MPCORE
/*
* Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
*/
......@@ -290,19 +301,19 @@ static void realview_eb11mp_fixup(void)
realview_eb_smc91x_resources[1].start = IRQ_EB11MP_ETH;
realview_eb_smc91x_resources[1].end = IRQ_EB11MP_ETH;
}
#endif
static void __init realview_eb_init(void)
{
int i;
#ifdef CONFIG_REALVIEW_MPCORE
realview_eb11mp_fixup();
if (core_tile_eb11mp()) {
realview_eb11mp_fixup();
/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
* Bits: .... ...0 0111 1001 0000 .... .... .... */
l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
}
/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
* Bits: .... ...0 0111 1001 0000 .... .... .... */
l2x0_init(__io_address(REALVIEW_MPCORE_L220_BASE), 0x00790000, 0xfe000fff);
#endif
clk_register(&realview_clcd_clk);
platform_device_register(&realview_flash_device);
......
......@@ -149,4 +149,23 @@
#define MAX_GIC_NR NR_GIC_EB11MP
#endif
/*
* Core tile identification (REALVIEW_SYS_PROCID)
*/
#define REALVIEW_EB_PROC_MASK 0xFF000000
#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
#define REALVIEW_EB_PROC_ARM9 0x02000000
#define REALVIEW_EB_PROC_ARM11 0x04000000
#define REALVIEW_EB_PROC_ARM11MP 0x06000000
#define check_eb_proc(proc_type) \
((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
== proc_type)
#ifdef CONFIG_REALVIEW_MPCORE
#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
#else
#define core_tile_eb11mp() 0
#endif
#endif /* __ASM_ARCH_BOARD_EB_H */
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