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7dae1134
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7dae1134
编写于
2月 07, 2009
作者:
S
Sascha Hauer
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[ARM] MXC: Switch MX1 to clkdev support
Signed-off-by:
N
Sascha Hauer
<
s.hauer@pengutronix.de
>
上级
6d73665f
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
29 addition
and
56 deletion
+29
-56
arch/arm/mach-mx1/clock.c
arch/arm/mach-mx1/clock.c
+28
-56
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Kconfig
+1
-0
未找到文件。
arch/arm/mach-mx1/clock.c
浏览文件 @
7dae1134
...
@@ -18,11 +18,14 @@
...
@@ -18,11 +18,14 @@
#include <linux/kernel.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/math64.h>
#include <linux/math64.h>
#include <linux/err.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/io.h>
#include <asm/clkdev.h>
#include <mach/clock.h>
#include <mach/clock.h>
#include <mach/hardware.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/common.h>
...
@@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk)
...
@@ -94,7 +97,6 @@ static unsigned long clk16m_get_rate(struct clk *clk)
}
}
static
struct
clk
clk16m
=
{
static
struct
clk
clk16m
=
{
.
name
=
"CLK16M"
,
.
get_rate
=
clk16m_get_rate
,
.
get_rate
=
clk16m_get_rate
,
.
enable
=
_clk_enable
,
.
enable
=
_clk_enable
,
.
enable_reg
=
CCM_CSCR
,
.
enable_reg
=
CCM_CSCR
,
...
@@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk)
...
@@ -111,7 +113,6 @@ static unsigned long clk32_get_rate(struct clk *clk)
}
}
static
struct
clk
clk32
=
{
static
struct
clk
clk32
=
{
.
name
=
"CLK32"
,
.
get_rate
=
clk32_get_rate
,
.
get_rate
=
clk32_get_rate
,
};
};
...
@@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk)
...
@@ -121,7 +122,6 @@ static unsigned long clk32_premult_get_rate(struct clk *clk)
}
}
static
struct
clk
clk32_premult
=
{
static
struct
clk
clk32_premult
=
{
.
name
=
"CLK32_premultiplier"
,
.
parent
=
&
clk32
,
.
parent
=
&
clk32
,
.
get_rate
=
clk32_premult_get_rate
,
.
get_rate
=
clk32_premult_get_rate
,
};
};
...
@@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent)
...
@@ -156,7 +156,6 @@ static int prem_clk_set_parent(struct clk *clk, struct clk *parent)
}
}
static
struct
clk
prem_clk
=
{
static
struct
clk
prem_clk
=
{
.
name
=
"prem_clk"
,
.
set_parent
=
prem_clk_set_parent
,
.
set_parent
=
prem_clk_set_parent
,
};
};
...
@@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk)
...
@@ -167,7 +166,6 @@ static unsigned long system_clk_get_rate(struct clk *clk)
}
}
static
struct
clk
system_clk
=
{
static
struct
clk
system_clk
=
{
.
name
=
"system_clk"
,
.
parent
=
&
prem_clk
,
.
parent
=
&
prem_clk
,
.
get_rate
=
system_clk_get_rate
,
.
get_rate
=
system_clk_get_rate
,
};
};
...
@@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk)
...
@@ -179,7 +177,6 @@ static unsigned long mcu_clk_get_rate(struct clk *clk)
}
}
static
struct
clk
mcu_clk
=
{
static
struct
clk
mcu_clk
=
{
.
name
=
"mcu_clk"
,
.
parent
=
&
clk32_premult
,
.
parent
=
&
clk32_premult
,
.
get_rate
=
mcu_clk_get_rate
,
.
get_rate
=
mcu_clk_get_rate
,
};
};
...
@@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk)
...
@@ -195,7 +192,6 @@ static unsigned long fclk_get_rate(struct clk *clk)
}
}
static
struct
clk
fclk
=
{
static
struct
clk
fclk
=
{
.
name
=
"fclk"
,
.
parent
=
&
mcu_clk
,
.
parent
=
&
mcu_clk
,
.
get_rate
=
fclk_get_rate
,
.
get_rate
=
fclk_get_rate
,
};
};
...
@@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate)
...
@@ -238,7 +234,6 @@ static int hclk_set_rate(struct clk *clk, unsigned long rate)
}
}
static
struct
clk
hclk
=
{
static
struct
clk
hclk
=
{
.
name
=
"hclk"
,
.
parent
=
&
system_clk
,
.
parent
=
&
system_clk
,
.
get_rate
=
hclk_get_rate
,
.
get_rate
=
hclk_get_rate
,
.
round_rate
=
hclk_round_rate
,
.
round_rate
=
hclk_round_rate
,
...
@@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate)
...
@@ -280,7 +275,6 @@ static int clk48m_set_rate(struct clk *clk, unsigned long rate)
}
}
static
struct
clk
clk48m
=
{
static
struct
clk
clk48m
=
{
.
name
=
"CLK48M"
,
.
parent
=
&
system_clk
,
.
parent
=
&
system_clk
,
.
get_rate
=
clk48m_get_rate
,
.
get_rate
=
clk48m_get_rate
,
.
round_rate
=
clk48m_round_rate
,
.
round_rate
=
clk48m_round_rate
,
...
@@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate)
...
@@ -400,21 +394,18 @@ static int perclk3_set_rate(struct clk *clk, unsigned long rate)
static
struct
clk
perclk
[]
=
{
static
struct
clk
perclk
[]
=
{
{
{
.
name
=
"perclk"
,
.
id
=
0
,
.
id
=
0
,
.
parent
=
&
system_clk
,
.
parent
=
&
system_clk
,
.
get_rate
=
perclk1_get_rate
,
.
get_rate
=
perclk1_get_rate
,
.
round_rate
=
perclk1_round_rate
,
.
round_rate
=
perclk1_round_rate
,
.
set_rate
=
perclk1_set_rate
,
.
set_rate
=
perclk1_set_rate
,
},
{
},
{
.
name
=
"perclk"
,
.
id
=
1
,
.
id
=
1
,
.
parent
=
&
system_clk
,
.
parent
=
&
system_clk
,
.
get_rate
=
perclk2_get_rate
,
.
get_rate
=
perclk2_get_rate
,
.
round_rate
=
perclk2_round_rate
,
.
round_rate
=
perclk2_round_rate
,
.
set_rate
=
perclk2_set_rate
,
.
set_rate
=
perclk2_set_rate
,
},
{
},
{
.
name
=
"perclk"
,
.
id
=
2
,
.
id
=
2
,
.
parent
=
&
system_clk
,
.
parent
=
&
system_clk
,
.
get_rate
=
perclk3_get_rate
,
.
get_rate
=
perclk3_get_rate
,
...
@@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent)
...
@@ -457,12 +448,10 @@ static int clko_set_parent(struct clk *clk, struct clk *parent)
}
}
static
struct
clk
clko_clk
=
{
static
struct
clk
clko_clk
=
{
.
name
=
"clko_clk"
,
.
set_parent
=
clko_set_parent
,
.
set_parent
=
clko_set_parent
,
};
};
static
struct
clk
dma_clk
=
{
static
struct
clk
dma_clk
=
{
.
name
=
"dma"
,
.
parent
=
&
hclk
,
.
parent
=
&
hclk
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
...
@@ -473,7 +462,6 @@ static struct clk dma_clk = {
...
@@ -473,7 +462,6 @@ static struct clk dma_clk = {
};
};
static
struct
clk
csi_clk
=
{
static
struct
clk
csi_clk
=
{
.
name
=
"csi_clk"
,
.
parent
=
&
hclk
,
.
parent
=
&
hclk
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
...
@@ -484,7 +472,6 @@ static struct clk csi_clk = {
...
@@ -484,7 +472,6 @@ static struct clk csi_clk = {
};
};
static
struct
clk
mma_clk
=
{
static
struct
clk
mma_clk
=
{
.
name
=
"mma_clk"
,
.
parent
=
&
hclk
,
.
parent
=
&
hclk
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
...
@@ -495,7 +482,6 @@ static struct clk mma_clk = {
...
@@ -495,7 +482,6 @@ static struct clk mma_clk = {
};
};
static
struct
clk
usbd_clk
=
{
static
struct
clk
usbd_clk
=
{
.
name
=
"usbd_clk"
,
.
parent
=
&
clk48m
,
.
parent
=
&
clk48m
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
...
@@ -506,99 +492,85 @@ static struct clk usbd_clk = {
...
@@ -506,99 +492,85 @@ static struct clk usbd_clk = {
};
};
static
struct
clk
gpt_clk
=
{
static
struct
clk
gpt_clk
=
{
.
name
=
"gpt_clk"
,
.
parent
=
&
perclk
[
0
],
.
parent
=
&
perclk
[
0
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
uart_clk
=
{
static
struct
clk
uart_clk
=
{
.
name
=
"uart"
,
.
parent
=
&
perclk
[
0
],
.
parent
=
&
perclk
[
0
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
i2c_clk
=
{
static
struct
clk
i2c_clk
=
{
.
name
=
"i2c_clk"
,
.
parent
=
&
hclk
,
.
parent
=
&
hclk
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
spi_clk
=
{
static
struct
clk
spi_clk
=
{
.
name
=
"spi_clk"
,
.
parent
=
&
perclk
[
1
],
.
parent
=
&
perclk
[
1
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
sdhc_clk
=
{
static
struct
clk
sdhc_clk
=
{
.
name
=
"sdhc_clk"
,
.
parent
=
&
perclk
[
1
],
.
parent
=
&
perclk
[
1
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
lcdc_clk
=
{
static
struct
clk
lcdc_clk
=
{
.
name
=
"lcdc_clk"
,
.
parent
=
&
perclk
[
1
],
.
parent
=
&
perclk
[
1
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
mshc_clk
=
{
static
struct
clk
mshc_clk
=
{
.
name
=
"mshc_clk"
,
.
parent
=
&
hclk
,
.
parent
=
&
hclk
,
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
ssi_clk
=
{
static
struct
clk
ssi_clk
=
{
.
name
=
"ssi_clk"
,
.
parent
=
&
perclk
[
2
],
.
parent
=
&
perclk
[
2
],
.
round_rate
=
_clk_parent_round_rate
,
.
round_rate
=
_clk_parent_round_rate
,
.
set_rate
=
_clk_parent_set_rate
,
.
set_rate
=
_clk_parent_set_rate
,
};
};
static
struct
clk
rtc_clk
=
{
static
struct
clk
rtc_clk
=
{
.
name
=
"rtc_clk"
,
.
parent
=
&
clk32
,
.
parent
=
&
clk32
,
};
};
static
struct
clk
*
mxc_clks
[]
=
{
#define _REGISTER_CLOCK(d, n, c) \
&
clk16m
,
{ \
&
clk32
,
.dev_id = d, \
&
clk32_premult
,
.con_id = n, \
&
prem_clk
,
.clk = &c, \
&
system_clk
,
},
&
mcu_clk
,
static
struct
clk_lookup
lookups
[]
__initdata
=
{
&
fclk
,
_REGISTER_CLOCK
(
NULL
,
"dma"
,
dma_clk
)
&
hclk
,
_REGISTER_CLOCK
(
"mx1-camera.0"
,
NULL
,
csi_clk
)
&
clk48m
,
_REGISTER_CLOCK
(
NULL
,
"mma"
,
mma_clk
)
&
perclk
[
0
],
_REGISTER_CLOCK
(
"imx_udc.0"
,
NULL
,
usbd_clk
)
&
perclk
[
1
],
_REGISTER_CLOCK
(
NULL
,
"gpt"
,
gpt_clk
)
&
perclk
[
2
],
_REGISTER_CLOCK
(
"imx-uart.0"
,
NULL
,
uart_clk
)
&
clko_clk
,
_REGISTER_CLOCK
(
"imx-uart.1"
,
NULL
,
uart_clk
)
&
dma_clk
,
_REGISTER_CLOCK
(
"imx-uart.2"
,
NULL
,
uart_clk
)
&
csi_clk
,
_REGISTER_CLOCK
(
"imx-i2c.0"
,
NULL
,
i2c_clk
)
&
mma_clk
,
_REGISTER_CLOCK
(
"spi_imx.0"
,
NULL
,
spi_clk
)
&
usbd_clk
,
_REGISTER_CLOCK
(
"imx-mmc.0"
,
NULL
,
sdhc_clk
)
&
gpt_clk
,
_REGISTER_CLOCK
(
"imx-fb.0"
,
NULL
,
lcdc_clk
)
&
uart_clk
,
_REGISTER_CLOCK
(
NULL
,
"mshc"
,
mshc_clk
)
&
i2c_clk
,
_REGISTER_CLOCK
(
NULL
,
"ssi"
,
ssi_clk
)
&
spi_clk
,
_REGISTER_CLOCK
(
"mxc_rtc.0"
,
NULL
,
rtc_clk
)
&
sdhc_clk
,
&
lcdc_clk
,
&
mshc_clk
,
&
ssi_clk
,
&
rtc_clk
,
};
};
int
__init
mx1_clocks_init
(
unsigned
long
fref
)
int
__init
mx1_clocks_init
(
unsigned
long
fref
)
{
{
struct
clk
**
clkp
;
unsigned
int
reg
;
unsigned
int
reg
;
int
i
;
/* disable clocks we are able to */
/* disable clocks we are able to */
__raw_writel
(
0
,
SCM_GCCR
);
__raw_writel
(
0
,
SCM_GCCR
);
...
@@ -620,8 +592,8 @@ int __init mx1_clocks_init(unsigned long fref)
...
@@ -620,8 +592,8 @@ int __init mx1_clocks_init(unsigned long fref)
reg
=
(
reg
&
CCM_CSCR_CLKO_MASK
)
>>
CCM_CSCR_CLKO_OFFSET
;
reg
=
(
reg
&
CCM_CSCR_CLKO_MASK
)
>>
CCM_CSCR_CLKO_OFFSET
;
clko_clk
.
parent
=
(
struct
clk
*
)
clko_clocks
[
reg
];
clko_clk
.
parent
=
(
struct
clk
*
)
clko_clocks
[
reg
];
for
(
clkp
=
mxc_clks
;
clkp
<
mxc_clks
+
ARRAY_SIZE
(
mxc_clks
);
clkp
++
)
for
(
i
=
0
;
i
<
ARRAY_SIZE
(
lookups
);
i
++
)
clk
_register
(
*
clkp
);
clk
dev_add
(
&
lookups
[
i
]
);
clk_enable
(
&
hclk
);
clk_enable
(
&
hclk
);
clk_enable
(
&
fclk
);
clk_enable
(
&
fclk
);
...
...
arch/arm/plat-mxc/Kconfig
浏览文件 @
7dae1134
...
@@ -9,6 +9,7 @@ choice
...
@@ -9,6 +9,7 @@ choice
config ARCH_MX1
config ARCH_MX1
bool "MX1-based"
bool "MX1-based"
select CPU_ARM920T
select CPU_ARM920T
select COMMON_CLKDEV
help
help
This enables support for systems based on the Freescale i.MX1 family
This enables support for systems based on the Freescale i.MX1 family
...
...
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