drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range
Both hsync/vsync polarity and interlace mode can be parsed from drm display mode, and dynamic_range and ycbcr_coeff can be judge by the video code. But presumably Exynos still relies on the DT properties, so take good use of mode_fixup() in to achieve the compatibility hacks. Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by: NCaesar Wang <wxt@rock-chips.com> Tested-by: NDouglas Anderson <dianders@chromium.org> Tested-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NJavier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: NYakir Yang <ykk@rock-chips.com>
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