提交 77d63443 编写于 作者: H Heiko Stuebner

Merge branch 'v3.20-clk/new-ids' into v3.20-clk/next

...@@ -80,6 +80,9 @@ ...@@ -80,6 +80,9 @@
#define SCLK_SDIO0_SAMPLE 119 #define SCLK_SDIO0_SAMPLE 119
#define SCLK_SDIO1_SAMPLE 120 #define SCLK_SDIO1_SAMPLE 120
#define SCLK_EMMC_SAMPLE 121 #define SCLK_EMMC_SAMPLE 121
#define SCLK_USBPHY480M_SRC 122
#define SCLK_PVTM_CORE 123
#define SCLK_PVTM_GPU 124
#define DCLK_VOP0 190 #define DCLK_VOP0 190
#define DCLK_VOP1 191 #define DCLK_VOP1 191
...@@ -154,6 +157,7 @@ ...@@ -154,6 +157,7 @@
#define PCLK_PUBL0 365 #define PCLK_PUBL0 365
#define PCLK_DDRUPCTL1 366 #define PCLK_DDRUPCTL1 366
#define PCLK_PUBL1 367 #define PCLK_PUBL1 367
#define PCLK_WDT 368
/* hclk gates */ /* hclk gates */
#define HCLK_GPS 448 #define HCLK_GPS 448
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册