提交 74c9c0fe 编写于 作者: M Mats Randgaard 提交者: Mauro Carvalho Chehab

[media] v4l2-dv-timings: Compare horizontal blanking

hsync and hbackporch must also be compared
Signed-off-by: NMats Randgaard <matrandg@cisco.com>
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@osg.samsung.com>
上级 95ad7ff3
......@@ -239,6 +239,8 @@ bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
t1->bt.hfrontporch == t2->bt.hfrontporch &&
t1->bt.hsync == t2->bt.hsync &&
t1->bt.hbackporch == t2->bt.hbackporch &&
t1->bt.vfrontporch == t2->bt.vfrontporch &&
t1->bt.vsync == t2->bt.vsync &&
t1->bt.vbackporch == t2->bt.vbackporch &&
......
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