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提交 723e9db7 编写于 作者: L Linus Torvalds
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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (134 commits)
  powerpc/nvram: Enable use Generic NVRAM driver for different size chips
  powerpc/iseries: Fix oops reading from /proc/iSeries/mf/*/cmdline
  powerpc/ps3: Workaround for flash memory I/O error
  powerpc/booke: Don't set DABR on 64-bit BookE, use DAC1 instead
  powerpc/perf_counters: Reduce stack usage of power_check_constraints
  powerpc: Fix bug where perf_counters breaks oprofile
  powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops
  powerpc/irq: Improve nanodoc
  powerpc: Fix some late PowerMac G5 with PCIe ATI graphics
  powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT
  powerpc/book3e: Add missing page sizes
  powerpc/pseries: Fix to handle slb resize across migration
  powerpc/powermac: Thermal control turns system off too eagerly
  powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan()
  powerpc/405ex: support cuImage via included dtb
  powerpc/405ex: provide necessary fixup function to support cuImage
  powerpc/40x: Add support for the ESTeem 195E (PPC405EP) SBC
  powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support.
  powerpc/44x: Update Arches defconfig
  powerpc/44x: Update Arches dts
  ...

Fix up conflicts in drivers/char/agp/uninorth-agp.c
上级 ada3fa15 d331d830
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Showing with 11256 addition and 2461 deletion
arch/powerpc/Kconfig
浏览文件 @ 723e9db7
......@@ -123,7 +123,8 @@ config PPC
select HAVE_KRETPROBES
select HAVE_ARCH_TRACEHOOK
select HAVE_LMB
select HAVE_DMA_ATTRS if PPC64
select HAVE_DMA_ATTRS
select HAVE_DMA_API_DEBUG
select USE_GENERIC_SMP_HELPERS if SMP
select HAVE_OPROFILE
select HAVE_SYSCALL_WRAPPERS if PPC64
......@@ -310,10 +311,6 @@ config SWIOTLB
platforms where the size of a physical address is larger
than the bus address. Not all platforms support this.
config PPC_NEED_DMA_SYNC_OPS
def_bool y
depends on (NOT_COHERENT_CACHE || SWIOTLB)
config HOTPLUG_CPU
bool "Support for enabling/disabling CPUs"
depends on SMP && HOTPLUG && EXPERIMENTAL && (PPC_PSERIES || PPC_PMAC)
......@@ -475,7 +472,7 @@ config PPC_16K_PAGES
bool "16k page size" if 44x
config PPC_64K_PAGES
bool "64k page size" if 44x || PPC_STD_MMU_64
bool "64k page size" if 44x || PPC_STD_MMU_64 || PPC_BOOK3E_64
select PPC_HAS_HASH_64K if PPC_STD_MMU_64
config PPC_256K_PAGES
......@@ -495,16 +492,16 @@ endchoice
config FORCE_MAX_ZONEORDER
int "Maximum zone order"
range 9 64 if PPC_STD_MMU_64 && PPC_64K_PAGES
default "9" if PPC_STD_MMU_64 && PPC_64K_PAGES
range 13 64 if PPC_STD_MMU_64 && !PPC_64K_PAGES
default "13" if PPC_STD_MMU_64 && !PPC_64K_PAGES
range 9 64 if PPC_STD_MMU_32 && PPC_16K_PAGES
default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES
range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES
default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES
range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES
default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES
range 9 64 if PPC64 && PPC_64K_PAGES
default "9" if PPC64 && PPC_64K_PAGES
range 13 64 if PPC64 && !PPC_64K_PAGES
default "13" if PPC64 && !PPC_64K_PAGES
range 9 64 if PPC32 && PPC_16K_PAGES
default "9" if PPC32 && PPC_16K_PAGES
range 7 64 if PPC32 && PPC_64K_PAGES
default "7" if PPC32 && PPC_64K_PAGES
range 5 64 if PPC32 && PPC_256K_PAGES
default "5" if PPC32 && PPC_256K_PAGES
range 11 64
default "11"
help
......
arch/powerpc/Makefile
浏览文件 @ 723e9db7
......@@ -77,7 +77,7 @@ CPP = $(CC) -E $(KBUILD_CFLAGS)
CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__
ifeq ($(CONFIG_PPC64),y)
GCC_BROKEN_VEC := $(shell if [ $(call cc-version) -lt 0400 ] ; then echo "y"; fi)
GCC_BROKEN_VEC := $(call cc-ifversion, -lt, 0400, y)
ifeq ($(CONFIG_POWER4_ONLY),y)
ifeq ($(CONFIG_ALTIVEC),y)
......
arch/powerpc/boot/4xx.c
浏览文件 @ 723e9db7
......@@ -8,6 +8,10 @@
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003, 2004 Zultys Technologies
*
* Copyright (C) 2009 Wind River Systems, Inc.
* Updated for supporting PPC405EX on Kilauea.
* Tiejun Chen <tiejun.chen@windriver.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
......@@ -659,3 +663,141 @@ void ibm405ep_fixup_clocks(unsigned int sys_clk)
dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
}
static u8 ibm405ex_fwdv_multi_bits[] = {
/* values for: 1 - 16 */
0x01, 0x02, 0x0e, 0x09, 0x04, 0x0b, 0x10, 0x0d, 0x0c, 0x05,
0x06, 0x0f, 0x0a, 0x07, 0x08, 0x03
};
u32 ibm405ex_get_fwdva(unsigned long cpr_fwdv)
{
u32 index;
for (index = 0; index < ARRAY_SIZE(ibm405ex_fwdv_multi_bits); index++)
if (cpr_fwdv == (u32)ibm405ex_fwdv_multi_bits[index])
return index + 1;
return 0;
}
static u8 ibm405ex_fbdv_multi_bits[] = {
/* values for: 1 - 100 */
0x00, 0xff, 0x7e, 0xfd, 0x7a, 0xf5, 0x6a, 0xd5, 0x2a, 0xd4,
0x29, 0xd3, 0x26, 0xcc, 0x19, 0xb3, 0x67, 0xce, 0x1d, 0xbb,
0x77, 0xee, 0x5d, 0xba, 0x74, 0xe9, 0x52, 0xa5, 0x4b, 0x96,
0x2c, 0xd8, 0x31, 0xe3, 0x46, 0x8d, 0x1b, 0xb7, 0x6f, 0xde,
0x3d, 0xfb, 0x76, 0xed, 0x5a, 0xb5, 0x6b, 0xd6, 0x2d, 0xdb,
0x36, 0xec, 0x59, 0xb2, 0x64, 0xc9, 0x12, 0xa4, 0x48, 0x91,
0x23, 0xc7, 0x0e, 0x9c, 0x38, 0xf0, 0x61, 0xc2, 0x05, 0x8b,
0x17, 0xaf, 0x5f, 0xbe, 0x7c, 0xf9, 0x72, 0xe5, 0x4a, 0x95,
0x2b, 0xd7, 0x2e, 0xdc, 0x39, 0xf3, 0x66, 0xcd, 0x1a, 0xb4,
0x68, 0xd1, 0x22, 0xc4, 0x09, 0x93, 0x27, 0xcf, 0x1e, 0xbc,
/* values for: 101 - 200 */
0x78, 0xf1, 0x62, 0xc5, 0x0a, 0x94, 0x28, 0xd0, 0x21, 0xc3,
0x06, 0x8c, 0x18, 0xb0, 0x60, 0xc1, 0x02, 0x84, 0x08, 0x90,
0x20, 0xc0, 0x01, 0x83, 0x07, 0x8f, 0x1f, 0xbf, 0x7f, 0xfe,
0x7d, 0xfa, 0x75, 0xea, 0x55, 0xaa, 0x54, 0xa9, 0x53, 0xa6,
0x4c, 0x99, 0x33, 0xe7, 0x4e, 0x9d, 0x3b, 0xf7, 0x6e, 0xdd,
0x3a, 0xf4, 0x69, 0xd2, 0x25, 0xcb, 0x16, 0xac, 0x58, 0xb1,
0x63, 0xc6, 0x0d, 0x9b, 0x37, 0xef, 0x5e, 0xbd, 0x7b, 0xf6,
0x6d, 0xda, 0x35, 0xeb, 0x56, 0xad, 0x5b, 0xb6, 0x6c, 0xd9,
0x32, 0xe4, 0x49, 0x92, 0x24, 0xc8, 0x11, 0xa3, 0x47, 0x8e,
0x1c, 0xb8, 0x70, 0xe1, 0x42, 0x85, 0x0b, 0x97, 0x2f, 0xdf,
/* values for: 201 - 255 */
0x3e, 0xfc, 0x79, 0xf2, 0x65, 0xca, 0x15, 0xab, 0x57, 0xae,
0x5c, 0xb9, 0x73, 0xe6, 0x4d, 0x9a, 0x34, 0xe8, 0x51, 0xa2,
0x44, 0x89, 0x13, 0xa7, 0x4f, 0x9e, 0x3c, 0xf8, 0x71, 0xe2,
0x45, 0x8a, 0x14, 0xa8, 0x50, 0xa1, 0x43, 0x86, 0x0c, 0x98,
0x30, 0xe0, 0x41, 0x82, 0x04, 0x88, 0x10, 0xa0, 0x40, 0x81,
0x03, 0x87, 0x0f, 0x9f, 0x3f /* END */
};
u32 ibm405ex_get_fbdv(unsigned long cpr_fbdv)
{
u32 index;
for (index = 0; index < ARRAY_SIZE(ibm405ex_fbdv_multi_bits); index++)
if (cpr_fbdv == (u32)ibm405ex_fbdv_multi_bits[index])
return index + 1;
return 0;
}
void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk)
{
/* PLL config */
u32 pllc = CPR0_READ(DCRN_CPR0_PLLC);
u32 plld = CPR0_READ(DCRN_CPR0_PLLD);
u32 cpud = CPR0_READ(DCRN_CPR0_PRIMAD);
u32 plbd = CPR0_READ(DCRN_CPR0_PRIMBD);
u32 opbd = CPR0_READ(DCRN_CPR0_OPBD);
u32 perd = CPR0_READ(DCRN_CPR0_PERD);
/* Dividers */
u32 fbdv = ibm405ex_get_fbdv(__fix_zero((plld >> 24) & 0xff, 1));
u32 fwdva = ibm405ex_get_fwdva(__fix_zero((plld >> 16) & 0x0f, 1));
u32 cpudv0 = __fix_zero((cpud >> 24) & 7, 8);
/* PLBDV0 is hardwared to 010. */
u32 plbdv0 = 2;
u32 plb2xdv0 = __fix_zero((plbd >> 16) & 7, 8);
u32 opbdv0 = __fix_zero((opbd >> 24) & 3, 4);
u32 perdv0 = __fix_zero((perd >> 24) & 3, 4);
/* Resulting clocks */
u32 cpu, plb, opb, ebc, vco, tb, uart0, uart1;
/* PLL's VCO is the source for primary forward ? */
if (pllc & 0x40000000) {
u32 m;
/* Feedback path */
switch ((pllc >> 24) & 7) {
case 0:
/* PLLOUTx */
m = fbdv;
break;
case 1:
/* CPU */
m = fbdv * fwdva * cpudv0;
break;
case 5:
/* PERClk */
m = fbdv * fwdva * plb2xdv0 * plbdv0 * opbdv0 * perdv0;
break;
default:
printf("WARNING ! Invalid PLL feedback source !\n");
goto bypass;
}
vco = (unsigned int)(sys_clk * m);
} else {
bypass:
/* Bypass system PLL */
vco = 0;
}
/* CPU = VCO / ( FWDVA x CPUDV0) */
cpu = vco / (fwdva * cpudv0);
/* PLB = VCO / ( FWDVA x PLB2XDV0 x PLBDV0) */
plb = vco / (fwdva * plb2xdv0 * plbdv0);
/* OPB = PLB / OPBDV0 */
opb = plb / opbdv0;
/* EBC = OPB / PERDV0 */
ebc = opb / perdv0;
tb = cpu;
uart0 = uart1 = uart_clk;
dt_fixup_cpu_clocks(cpu, tb, 0);
dt_fixup_clock("/plb", plb);
dt_fixup_clock("/plb/opb", opb);
dt_fixup_clock("/plb/opb/ebc", ebc);
dt_fixup_clock("/plb/opb/serial@ef600200", uart0);
dt_fixup_clock("/plb/opb/serial@ef600300", uart1);
}
arch/powerpc/boot/4xx.h
浏览文件 @ 723e9db7
......@@ -21,6 +21,7 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc);
void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
void ibm405ep_fixup_clocks(unsigned int sys_clk);
void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk);
void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
unsigned int tmr_clk);
......
arch/powerpc/boot/Makefile
浏览文件 @ 723e9db7
......@@ -39,6 +39,7 @@ DTS_FLAGS ?= -p 1024
$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
......@@ -67,7 +68,7 @@ src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
fsl-soc.c mpc8xx.c pq2.c
src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
cuboot-ebony.c cuboot-hotfoot.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
......@@ -75,7 +76,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
cuboot-acadia.c cuboot-amigaone.c
cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
......@@ -190,6 +191,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
# Board ports in arch/powerpc/platform/40x/Kconfig
image-$(CONFIG_EP405) += dtbImage.ep405
image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
image-$(CONFIG_WALNUT) += treeImage.walnut
image-$(CONFIG_ACADIA) += cuImage.acadia
......
arch/powerpc/boot/cuboot-hotfoot.c 0 → 100644
浏览文件 @ 723e9db7
/*
* Old U-boot compatibility for Esteem 195E Hotfoot CPU Board
*
* Author: Solomon Peachy <solomon@linux-wlan.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "reg.h"
#include "dcr.h"
#include "4xx.h"
#include "cuboot.h"
#define TARGET_4xx
#define TARGET_HOTFOOT
#include "ppcboot-hotfoot.h"
static bd_t bd;
#define NUM_REGS 3
static void hotfoot_fixups(void)
{
u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f;
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0);
dt_fixup_clock("/plb", bd.bi_plb_busfreq);
dt_fixup_clock("/plb/opb", bd.bi_opbfreq);
dt_fixup_clock("/plb/ebc", bd.bi_pci_busfreq);
dt_fixup_clock("/plb/opb/serial@ef600300", bd.bi_procfreq / uart);
dt_fixup_clock("/plb/opb/serial@ef600400", bd.bi_procfreq / uart);
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
/* Is this a single eth/serial board? */
if ((bd.bi_enet1addr[0] == 0) &&
(bd.bi_enet1addr[1] == 0) &&
(bd.bi_enet1addr[2] == 0) &&
(bd.bi_enet1addr[3] == 0) &&
(bd.bi_enet1addr[4] == 0) &&
(bd.bi_enet1addr[5] == 0)) {
void *devp;
printf("Trimming devtree for single serial/eth board\n");
devp = finddevice("/plb/opb/serial@ef600300");
if (!devp)
fatal("Can't find node for /plb/opb/serial@ef600300");
del_node(devp);
devp = finddevice("/plb/opb/ethernet@ef600900");
if (!devp)
fatal("Can't find node for /plb/opb/ethernet@ef600900");
del_node(devp);
}
ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900);
/* Fix up flash size in fdt for 4M boards. */
if (bd.bi_flashsize < 0x800000) {
u32 regs[NUM_REGS];
void *devp = finddevice("/plb/ebc/nor_flash@0");
if (!devp)
fatal("Can't find FDT node for nor_flash!??");
printf("Fixing devtree for 4M Flash\n");
/* First fix up the base addresse */
getprop(devp, "reg", regs, sizeof(regs));
regs[0] = 0;
regs[1] = 0xffc00000;
regs[2] = 0x00400000;
setprop(devp, "reg", regs, sizeof(regs));
/* Then the offsets */
devp = finddevice("/plb/ebc/nor_flash@0/partition@0");
if (!devp)
fatal("Can't find FDT node for partition@0");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
devp = finddevice("/plb/ebc/nor_flash@0/partition@1");
if (!devp)
fatal("Can't find FDT node for partition@1");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
devp = finddevice("/plb/ebc/nor_flash@0/partition@2");
if (!devp)
fatal("Can't find FDT node for partition@2");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
devp = finddevice("/plb/ebc/nor_flash@0/partition@3");
if (!devp)
fatal("Can't find FDT node for partition@3");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
devp = finddevice("/plb/ebc/nor_flash@0/partition@4");
if (!devp)
fatal("Can't find FDT node for partition@4");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
devp = finddevice("/plb/ebc/nor_flash@0/partition@6");
if (!devp)
fatal("Can't find FDT node for partition@6");
getprop(devp, "reg", regs, 2*sizeof(u32));
regs[0] -= 0x400000;
setprop(devp, "reg", regs, 2*sizeof(u32));
/* Delete the FeatFS node */
devp = finddevice("/plb/ebc/nor_flash@0/partition@5");
if (!devp)
fatal("Can't find FDT node for partition@5");
del_node(devp);
}
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
platform_ops.fixups = hotfoot_fixups;
platform_ops.exit = ibm40x_dbcr_reset;
fdt_init(_dtb_start);
serial_console_init();
}
arch/powerpc/boot/cuboot-kilauea.c 0 → 100644
浏览文件 @ 723e9db7
/*
* Old U-boot compatibility for PPC405EX. This image is already included
* a dtb.
*
* Author: Tiejun Chen <tiejun.chen@windriver.com>
*
* Copyright (C) 2009 Wind River Systems, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "io.h"
#include "dcr.h"
#include "stdio.h"
#include "4xx.h"
#include "44x.h"
#include "cuboot.h"
#define TARGET_4xx
#define TARGET_44x
#include "ppcboot.h"
#define KILAUEA_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
static bd_t bd;
static void kilauea_fixups(void)
{
unsigned long sysclk = 33333333;
ibm405ex_fixup_clocks(sysclk, KILAUEA_SYS_EXT_SERIAL_CLOCK);
dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
}
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
CUBOOT_INIT();
platform_ops.fixups = kilauea_fixups;
platform_ops.exit = ibm40x_dbcr_reset;
fdt_init(_dtb_start);
serial_console_init();
}
arch/powerpc/boot/dcr.h
浏览文件 @ 723e9db7
......@@ -153,9 +153,7 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
#define DCRN_CPC0_PLLMR1 0xf4
#define DCRN_CPC0_UCR 0xf5
/* 440GX Clock control etc */
/* 440GX/405EX Clock Control reg */
#define DCRN_CPR0_CLKUPD 0x020
#define DCRN_CPR0_PLLC 0x040
#define DCRN_CPR0_PLLD 0x060
......
arch/powerpc/boot/dts/arches.dts
浏览文件 @ 723e9db7
......@@ -124,6 +124,16 @@
dcr-reg = <0x00c 0x002>;
};
L2C0: l2c {
compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0x030 0x008>; /* L2 cache DCR's */
cache-line-size = <32>; /* 32 bytes */
cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC1>;
interrupts = <11 1>;
};
plb {
compatible = "ibm,plb-460gt", "ibm,plb4";
#address-cells = <2>;
......@@ -168,6 +178,38 @@
/* ranges property is supplied by U-Boot */
interrupts = <0x6 0x4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl256n", "cfi-flash";
bank-width = <2>;
reg = <0x00000000 0x00000000 0x02000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "root";
reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
reg = <0x00400000 0x01b60000>;
};
partition@1f60000 {
label = "env";
reg = <0x01f60000 0x00040000>;
};
partition@1fa0000 {
label = "u-boot";
reg = <0x01fa0000 0x00060000>;
};
};
};
UART0: serial@ef600300 {
......@@ -186,6 +228,14 @@
reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
#address-cells = <1>;
#size-cells = <0>;
sttm@4a {
compatible = "ad,ad7414";
reg = <0x4a>;
interrupt-parent = <&UIC1>;
interrupts = <0x0 0x8>;
};
};
IIC1: i2c@ef600800 {
......
arch/powerpc/boot/dts/canyonlands.dts
浏览文件 @ 723e9db7
/*
* Device Tree Source for AMCC Canyonlands (460EX)
*
* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
* Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
......@@ -149,19 +149,19 @@
/*RXDE*/ 0x5 0x4>;
};
USB0: ehci@bffd0400 {
compatible = "ibm,usb-ehci-460ex", "usb-ehci";
interrupt-parent = <&UIC2>;
interrupts = <0x1d 4>;
reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
};
USB0: ehci@bffd0400 {
compatible = "ibm,usb-ehci-460ex", "usb-ehci";
interrupt-parent = <&UIC2>;
interrupts = <0x1d 4>;
reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
};
USB1: usb@bffd0000 {
compatible = "ohci-le";
reg = <4 0xbffd0000 0x60>;
interrupt-parent = <&UIC2>;
interrupts = <0x1e 4>;
};
USB1: usb@bffd0000 {
compatible = "ohci-le";
reg = <4 0xbffd0000 0x60>;
interrupt-parent = <&UIC2>;
interrupts = <0x1e 4>;
};
POB0: opb {
compatible = "ibm,opb-460ex", "ibm,opb";
......@@ -215,6 +215,29 @@
reg = <0x03fa0000 0x00060000>;
};
};
ndfc@3,0 {
compatible = "ibm,ndfc";
reg = <0x00000003 0x00000000 0x00002000>;
ccr = <0x00001000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
nand {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00100000>;
};
partition@100000 {
label = "user";
reg = <0x00000000 0x03f00000>;
};
};
};
};
UART0: serial@ef600300 {
......
arch/powerpc/boot/dts/eiger.dts 0 → 100644
浏览文件 @ 723e9db7
/*
* Device Tree Source for AMCC (AppliedMicro) Eiger(460SX)
*
* Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,eiger";
compatible = "amcc,eiger";
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
ethernet1 = &EMAC1;
ethernet2 = &EMAC2;
ethernet3 = &EMAC3;
serial0 = &UART0;
serial1 = &UART1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,460SX";
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <32768>;
d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-460sx","ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic-460sx","ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC2: interrupt-controller2 {
compatible = "ibm,uic-460sx","ibm,uic";
interrupt-controller;
cell-index = <2>;
dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC3: interrupt-controller3 {
compatible = "ibm,uic-460sx","ibm,uic";
interrupt-controller;
cell-index = <3>;
dcr-reg = <0x0f0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-460sx";
dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-460sx";
dcr-reg = <0x00c 0x002>;
};
plb {
compatible = "ibm,plb-460sx", "ibm,plb4";
#address-cells = <2>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by U-Boot */
SDRAM0: sdram {
compatible = "ibm,sdram-460sx", "ibm,sdram-405gp";
dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-460sx", "ibm,mcmal2";
dcr-reg = <0x180 0x62>;
num-tx-chans = <4>;
num-rx-chans = <32>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&UIC1>;
interrupts = < /*TXEOB*/ 0x6 0x4
/*RXEOB*/ 0x7 0x4
/*SERR*/ 0x1 0x4
/*TXDE*/ 0x2 0x4
/*RXDE*/ 0x3 0x4
/*COAL TX0*/ 0x18 0x2
/*COAL TX1*/ 0x19 0x2
/*COAL TX2*/ 0x1a 0x2
/*COAL TX3*/ 0x1b 0x2
/*COAL RX0*/ 0x1c 0x2
/*COAL RX1*/ 0x1d 0x2
/*COAL RX2*/ 0x1e 0x2
/*COAL RX3*/ 0x1f 0x2>;
};
POB0: opb {
compatible = "ibm,opb-460sx", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-460sx", "ibm,ebc";
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
interrupts = <0x6 0x4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
/* reg property is supplied in by U-Boot */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "ramdisk";
reg = <0x00200000 0x01400000>;
};
partition@1600000 {
label = "jffs2";
reg = <0x01600000 0x00400000>;
};
partition@1a00000 {
label = "user";
reg = <0x01a00000 0x02560000>;
};
partition@3f60000 {
label = "env";
reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
reg = <0x03fa0000 0x00060000>;
};
};
ndfc@1,0 {
compatible = "ibm,ndfc";
/* reg property is supplied by U-boot */
ccr = <0x00003000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
nand {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "uboot";
reg = <0x00000000 0x00200000>;
};
partition@200000 {
label = "uboot-environment";
reg = <0x00200000 0x00100000>;
};
partition@300000 {
label = "linux";
reg = <0x00300000 0x00300000>;
};
partition@600000 {
label = "root-file-system";
reg = <0x00600000 0x01900000>;
};
partition@1f00000 {
label = "device-tree";
reg = <0x01f00000 0x00020000>;
};
partition@1f20000 {
label = "data";
reg = <0x01f20000 0x060E0000>;
};
};
};
};
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600200 0x00000008>;
virtual-reg = <0xef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC0>;
interrupts = <0x0 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC0>;
interrupts = <0x1 0x4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-460sx", "ibm,iic";
reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
#address-cells = <1>;
#size-cells = <0>;
index = <0>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-460sx", "ibm,iic";
reg = <0xef600500 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x3 0x4>;
#address-cells = <1>;
#size-cells = <0>;
index = <1>;
};
RGMII0: emac-rgmii@ef600900 {
compatible = "ibm,rgmii-460sx", "ibm,rgmii";
reg = <0xef600900 0x00000008>;
has-mdio;
};
RGMII1: emac-rgmii@ef600920 {
compatible = "ibm,rgmii-460sx", "ibm,rgmii";
reg = <0xef600920 0x00000008>;
has-mdio;
};
TAH0: emac-tah@ef600e50 {
compatible = "ibm,tah-460sx", "ibm,tah";
reg = <0xef600e50 0x00000030>;
};
TAH1: emac-tah@ef600f50 {
compatible = "ibm,tah-460sx", "ibm,tah";
reg = <0xef600f50 0x00000030>;
};
EMAC0: ethernet@ef600a00 {
device_type = "network";
compatible = "ibm,emac-460sx", "ibm,emac4";
interrupt-parent = <&EMAC0>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
reg = <0xef600a00 0x00000070>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
EMAC1: ethernet@ef600b00 {
device_type = "network";
compatible = "ibm,emac-460sx", "ibm,emac4";
interrupt-parent = <&EMAC1>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
reg = <0xef600b00 0x00000070>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <8>;
cell-index = <1>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
tah-device = <&TAH1>;
tah-channel = <1>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio-device = <&EMAC0>;
};
EMAC2: ethernet@ef600c00 {
device_type = "network";
compatible = "ibm,emac-460sx", "ibm,emac4";
interrupt-parent = <&EMAC2>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x15 0x4
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
reg = <0xef600c00 0x00000070>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <2>;
mal-rx-channel = <16>;
cell-index = <2>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII1>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio-device = <&EMAC0>;
};
EMAC3: ethernet@ef600d00 {
device_type = "network";
compatible = "ibm,emac-460sx", "ibm,emac4";
interrupt-parent = <&EMAC3>;
interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x16 0x4
/*Wake*/ 0x1 &UIC2 0x1d 0x4>;
reg = <0xef600d00 0x00000070>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <3>;
mal-rx-channel = <24>;
cell-index = <3>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-map = <0x00000000>;
rgmii-device = <&RGMII1>;
rgmii-channel = <1>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio-device = <&EMAC0>;
};
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@ef600200";
};
};
arch/powerpc/boot/dts/gef_sbc310.dts
浏览文件 @ 723e9db7
......@@ -83,34 +83,34 @@
/* flash@0,0 is a mirror of part of the memory in flash@1,0
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0 0x01000000>;
compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
reg = <0x0 0x0 0x01000000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "firmware";
reg = <0x00000000 0x01000000>;
reg = <0x0 0x01000000>;
read-only;
};
};
*/
flash@1,0 {
compatible = "cfi-flash";
reg = <1 0 0x8000000>;
compatible = "gef,sbc310-paged-flash", "cfi-flash";
reg = <0x1 0x0 0x8000000>;
bank-width = <2>;
device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "user";
reg = <0x00000000 0x07800000>;
reg = <0x0 0x7800000>;
};
partition@7800000 {
label = "firmware";
reg = <0x07800000 0x00800000>;
reg = <0x7800000 0x800000>;
read-only;
};
};
......@@ -121,18 +121,16 @@
};
wdt@4,2000 {
#interrupt-cells = <2>;
device_type = "watchdog";
compatible = "gef,fpga-wdt";
compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
"gef,fpga-wdt";
reg = <0x4 0x2000 0x8>;
interrupts = <0x1a 0x4>;
interrupt-parent = <&gef_pic>;
};
/*
wdt@4,2010 {
#interrupt-cells = <2>;
device_type = "watchdog";
compatible = "gef,fpga-wdt";
compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
"gef,fpga-wdt";
reg = <0x4 0x2010 0x8>;
interrupts = <0x1b 0x4>;
interrupt-parent = <&gef_pic>;
......@@ -141,7 +139,7 @@
gef_pic: pic@4,4000 {
#interrupt-cells = <1>;
interrupt-controller;
compatible = "gef,fpga-pic";
compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic";
reg = <0x4 0x4000 0x20>;
interrupts = <0x8
0x9>;
......@@ -161,7 +159,7 @@
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
compatible = "simple-bus";
compatible = "fsl,mpc8641-soc", "simple-bus";
ranges = <0x0 0xfef00000 0x00100000>;
bus-frequency = <33333333>;
......@@ -376,4 +374,40 @@
0x0 0x00400000>;
};
};
pci1: pcie@fef09000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xfef09000 0x1000>;
bus-range = <0x0 0xff>;
ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <0x19 0x2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x0000 0x0 0x0 0x1 &mpic 0x4 0x2
0x0000 0x0 0x0 0x2 &mpic 0x5 0x2
0x0000 0x0 0x0 0x3 &mpic 0x6 0x2
0x0000 0x0 0x0 0x4 &mpic 0x7 0x2
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xc0000000
0x02000000 0x0 0xc0000000
0x0 0x20000000
0x01000000 0x0 0x00000000
0x01000000 0x0 0x00000000
0x0 0x00400000>;
};
};
};
arch/powerpc/boot/dts/hotfoot.dts 0 → 100644
浏览文件 @ 723e9db7
/*
* Device Tree Source for ESTeem 195E Hotfoot
*
* Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "est,hotfoot";
compatible = "est,hotfoot";
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
ethernet1 = &EMAC1;
serial0 = &UART0;
serial1 = &UART1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EP";
reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
i-cache-line-size = <0x20>;
d-cache-line-size = <0x20>;
i-cache-size = <0x4000>;
d-cache-size = <0x4000>;
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
plb {
compatible = "ibm,plb3";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by zImage */
SDRAM0: memory-controller {
compatible = "ibm,sdram-405ep";
dcr-reg = <0x010 0x002>;
};
MAL: mcmal {
compatible = "ibm,mcmal-405ep", "ibm,mcmal";
dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&UIC0>;
interrupts = <
0xb 0x4 /* TXEOB */
0xc 0x4 /* RXEOB */
0xa 0x4 /* SERR */
0xd 0x4 /* TXDE */
0xe 0x4 /* RXDE */>;
};
POB0: opb {
compatible = "ibm,opb-405ep", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0xef600000 0xef600000 0x00a00000>;
dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by zImage */
/* Hotfoot has UART0/UART1 swapped */
UART0: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600400 0x00000008>;
virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <0x9600>;
interrupt-parent = <&UIC0>;
interrupts = <0x1 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
reg = <0xef600300 0x00000008>;
virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
current-speed = <0x9600>;
interrupt-parent = <&UIC0>;
interrupts = <0x0 0x4>;
};
IIC: i2c@ef600500 {
compatible = "ibm,iic-405ep", "ibm,iic";
reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
rtc@68 {
/* Actually a DS1339 */
compatible = "dallas,ds1307";
reg = <0x68>;
};
temp@4a {
/* Not present on all boards */
compatible = "national,lm75";
reg = <0x4a>;
};
};
GPIO: gpio@ef600700 {
#gpio-cells = <2>;
compatible = "ibm,ppc4xx-gpio";
reg = <0xef600700 0x00000020>;
gpio-controller;
};
gpio-leds {
compatible = "gpio-leds";
status {
label = "Status";
gpios = <&GPIO 1 0>;
};
radiorx {
label = "Rx";
gpios = <&GPIO 0xe 0>;
};
};
EMAC0: ethernet@ef600800 {
linux,network-index = <0x0>;
device_type = "network";
compatible = "ibm,emac-405ep", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
0xf 0x4 /* Ethernet */
0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
reg = <0xef600800 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <0x5dc>;
rx-fifo-size = <0x1000>;
tx-fifo-size = <0x800>;
phy-mode = "mii";
phy-map = <0x00000000>;
};
EMAC1: ethernet@ef600900 {
linux,network-index = <0x1>;
device_type = "network";
compatible = "ibm,emac-405ep", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
0x11 0x4 /* Ethernet */
0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
reg = <0xef600900 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <2>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <0x5dc>;
rx-fifo-size = <0x1000>;
tx-fifo-size = <0x800>;
mdio-device = <&EMAC0>;
phy-mode = "mii";
phy-map = <0x0000001>;
};
};
EBC0: ebc {
compatible = "ibm,ebc-405ep", "ibm,ebc";
dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
/* The ranges property is supplied by the bootwrapper
* and is based on the firmware's configuration of the
* EBC bridge
*/
clock-frequency = <0>; /* Filled in by zImage */
nor_flash@0 {
compatible = "cfi-flash";
bank-width = <2>;
reg = <0x0 0xff800000 0x00800000>;
#address-cells = <1>;
#size-cells = <1>;
/* This mapping is for the 8M flash
4M flash has all ofssets -= 4M,
and FeatFS partition is not present */
partition@0 {
label = "Bootloader";
reg = <0x7c0000 0x40000>;
/* read-only; */
};
partition@1 {
label = "Env_and_Config_Primary";
reg = <0x400000 0x10000>;
};
partition@2 {
label = "Kernel";
reg = <0x420000 0x100000>;
};
partition@3 {
label = "Filesystem";
reg = <0x520000 0x2a0000>;
};
partition@4 {
label = "Env_and_Config_Secondary";
reg = <0x410000 0x10000>;
};
partition@5 {
label = "FeatFS";
reg = <0x000000 0x400000>;
};
partition@6 {
label = "Bootloader_Env";
reg = <0x7d0000 0x10000>;
};
};
};
PCI0: pci@ec000000 {
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
primary;
reg = <0xeec00000 0x00000008 /* Config space access */
0xeed80000 0x00000004 /* IACK */
0xeed80000 0x00000004 /* Special cycle */
0xef480000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
interrupt-parent = <&UIC0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
/* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
>;
};
};
chosen {
linux,stdout-path = &UART0;
};
};
arch/powerpc/boot/dts/kilauea.dts
浏览文件 @ 723e9db7
/*
* Device Tree Source for AMCC Kilauea (405EX)
*
* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
* Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
......@@ -150,7 +150,11 @@
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x00200000>;
reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "root";
......@@ -169,6 +173,29 @@
reg = <0x03fa0000 0x00060000>;
};
};
ndfc@1,0 {
compatible = "ibm,ndfc";
reg = <0x00000001 0x00000000 0x00002000>;
ccr = <0x00001000>;
bank-settings = <0x80002222>;
#address-cells = <1>;
#size-cells = <1>;
nand {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00100000>;
};
partition@100000 {
label = "user";
reg = <0x00000000 0x03f00000>;
};
};
};
};
UART0: serial@ef600200 {
......@@ -198,6 +225,18 @@
reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
interrupts = <0x2 0x4>;
#address-cells = <1>;
#size-cells = <0>;
rtc@68 {
compatible = "dallas,ds1338";
reg = <0x68>;
};
dtt@48 {
compatible = "dallas,ds1775";
reg = <0x48>;
};
};
IIC1: i2c@ef600500 {
......@@ -207,7 +246,6 @@
interrupts = <0x7 0x4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405ex", "ibm,rgmii";
reg = <0xef600b00 0x00000104>;
......
arch/powerpc/boot/dts/mgcoge.dts
浏览文件 @ 723e9db7
......@@ -162,6 +162,59 @@
fixed-link = <0 0 10 0 0>;
};
i2c@11860 {
compatible = "fsl,mpc8272-i2c",
"fsl,cpm2-i2c";
reg = <0x11860 0x20 0x8afc 0x2>;
interrupts = <1 8>;
interrupt-parent = <&PIC>;
fsl,cpm-command = <0x29600000>;
#address-cells = <1>;
#size-cells = <0>;
};
mdio@10d40 {
compatible = "fsl,cpm2-mdio-bitbang";
reg = <0x10d00 0x14>;
#address-cells = <1>;
#size-cells = <0>;
fsl,mdio-pin = <12>;
fsl,mdc-pin = <13>;
phy0: ethernet-phy@0 {
reg = <0x0>;
};
phy1: ethernet-phy@1 {
reg = <0x1>;
};
};
/* FCC1 management to switch */
ethernet@11300 {
device_type = "network";
compatible = "fsl,cpm2-fcc-enet";
reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
local-mac-address = [ 00 01 02 03 04 07 ];
interrupts = <32 8>;
interrupt-parent = <&PIC>;
phy-handle = <&phy0>;
linux,network-index = <1>;
fsl,cpm-command = <0x12000300>;
};
/* FCC2 to redundant core unit over backplane */
ethernet@11320 {
device_type = "network";
compatible = "fsl,cpm2-fcc-enet";
reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
local-mac-address = [ 00 01 02 03 04 08 ];
interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&phy1>;
linux,network-index = <2>;
fsl,cpm-command = <0x16200300>;
};
};
PIC: interrupt-controller@10c00 {
......
arch/powerpc/boot/dts/mpc8272ads.dts
浏览文件 @ 723e9db7
......@@ -173,6 +173,14 @@
fsl,cpm-command = <0xce00000>;
};
usb@11b60 {
compatible = "fsl,mpc8272-cpm-usb";
reg = <0x11b60 0x40 0x8b00 0x100>;
interrupts = <11 8>;
interrupt-parent = <&PIC>;
mode = "peripheral";
};
mdio@10d40 {
device_type = "mdio";
compatible = "fsl,mpc8272ads-mdio-bitbang",
......
arch/powerpc/boot/dts/mpc8377_rdb.dts
浏览文件 @ 723e9db7
......@@ -174,7 +174,7 @@
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
clock-frequency = <111111111>;
};
};
......
arch/powerpc/boot/dts/mpc8377_wlan.dts 0 → 100644
浏览文件 @ 723e9db7
/*
* MPC8377E WLAN Device Tree Source
*
* Copyright 2007-2009 Freescale Semiconductor Inc.
* Copyright 2009 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
compatible = "fsl,mpc8377wlan";
#address-cells = <1>;
#size-cells = <1>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8377@0 {
device_type = "cpu";
reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
i-cache-size = <32768>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; // 512MB at 0
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
reg = <0xe0005000 0x1000>;
interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
ranges = <0x0 0x0 0xfc000000 0x04000000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
reg = <0 0x8000>;
label = "u-boot";
read-only;
};
partition@a0000 {
reg = <0xa0000 0x300000>;
label = "kernel";
};
partition@3a0000 {
reg = <0x3a0000 0x3c60000>;
label = "rootfs";
};
};
};
immr@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <0x200 0x100>;
};
gpio1: gpio-controller@c00 {
#gpio-cells = <2>;
compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
reg = <0xc00 0x100>;
interrupts = <74 0x8>;
interrupt-parent = <&ipic>;
gpio-controller;
};
gpio2: gpio-controller@d00 {
#gpio-cells = <2>;
compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
reg = <0xd00 0x100>;
interrupts = <75 0x8>;
interrupt-parent = <&ipic>;
gpio-controller;
};
sleep-nexus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
sleep = <&pmc 0x0c000000>;
ranges;
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
at24@50 {
compatible = "at24,24c256";
reg = <0x50>;
};
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
sdhci@2e000 {
compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
clock-frequency = <133333333>;
};
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
dma@82a8 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
reg = <0x82a8 4>;
ranges = <0 0x8100 0x1a8>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
reg = <0 0x80>;
cell-index = <0>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
dma-channel@80 {
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
dma-channel@100 {
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
dma-channel@180 {
compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
reg = <0x180 0x28>;
cell-index = <3>;
interrupt-parent = <&ipic>;
interrupts = <71 8>;
};
};
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
phy_type = "ulpi";
sleep = <&pmc 0x00c00000>;
};
enet0: ethernet@24000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
ranges = <0x0 0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy2>;
sleep = <&pmc 0xc0000000>;
fsl,magic-packet;
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x520 0x20>;
phy2: ethernet-phy@2 {
interrupt-parent = <&ipic>;
interrupts = <17 0x8>;
reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = <&ipic>;
interrupts = <18 0x8>;
reg = <0x3>;
device_type = "ethernet-phy";
};
tbi0: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
};
enet1: ethernet@25000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
ranges = <0x0 0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
interrupt-parent = <&ipic>;
phy-handle = <&phy3>;
tbi-handle = <&tbi1>;
sleep = <&pmc 0x30000000>;
fsl,magic-packet;
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-tbi";
reg = <0x520 0x20>;
tbi1: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
crypto@30000 {
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
sleep = <&pmc 0x03000000>;
};
sata@18000 {
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
interrupts = <44 0x8>;
interrupt-parent = <&ipic>;
sleep = <&pmc 0x000000c0>;
};
sata@19000 {
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
reg = <0x19000 0x1000>;
interrupts = <45 0x8>;
interrupt-parent = <&ipic>;
sleep = <&pmc 0x00000030>;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
ipic: interrupt-controller@700 {
compatible = "fsl,ipic";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x700 0x100>;
};
pmc: power@b00 {
compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
reg = <0xb00 0x100 0xa00 0x100>;
interrupts = <80 0x8>;
interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
/* IDSEL AD14 IRQ6 inta */
0x7000 0x0 0x0 0x1 &ipic 22 0x8
/* IDSEL AD15 IRQ5 inta */
0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
interrupt-parent = <&ipic>;
interrupts = <66 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
sleep = <&pmc 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xe0008500 0x100 /* internal registers */
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pcie@e0009000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
reg = <0xe0009000 0x00001000>;
ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
bus-range = <0 255>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0 0 0 1 &ipic 1 8
0 0 0 2 &ipic 1 8
0 0 0 3 &ipic 1 8
0 0 0 4 &ipic 1 8>;
sleep = <&pmc 0x00300000>;
clock-frequency = <0>;
pcie@0 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
reg = <0 0 0 0 0>;
ranges = <0x02000000 0 0xa8000000
0x02000000 0 0xa8000000
0 0x10000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00800000>;
};
};
pci2: pcie@e000a000 {
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
reg = <0xe000a000 0x00001000>;
ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
bus-range = <0 255>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <0 0 0 1 &ipic 2 8
0 0 0 2 &ipic 2 8
0 0 0 3 &ipic 2 8
0 0 0 4 &ipic 2 8>;
sleep = <&pmc 0x000c0000>;
clock-frequency = <0>;
pcie@0 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
reg = <0 0 0 0 0>;
ranges = <0x02000000 0 0xc8000000
0x02000000 0 0xc8000000
0 0x10000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00800000>;
};
};
};
arch/powerpc/boot/dts/mpc8378_rdb.dts
浏览文件 @ 723e9db7
......@@ -174,7 +174,7 @@
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
clock-frequency = <111111111>;
};
};
......
arch/powerpc/boot/dts/mpc8379_rdb.dts
浏览文件 @ 723e9db7
......@@ -172,7 +172,7 @@
interrupts = <42 0x8>;
interrupt-parent = <&ipic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
clock-frequency = <111111111>;
};
};
......
arch/powerpc/boot/dts/mpc8536ds.dts
浏览文件 @ 723e9db7
......@@ -14,8 +14,8 @@
/ {
model = "fsl,mpc8536ds";
compatible = "fsl,mpc8536ds";
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
ethernet0 = &enet0;
......@@ -42,7 +42,7 @@
memory {
device_type = "memory";
reg = <00000000 00000000>; // Filled by U-Boot
reg = <0 0 0 0>; // Filled by U-Boot
};
soc@ffe00000 {
......@@ -50,7 +50,7 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xffe00000 0x100000>;
ranges = <0x0 0 0xffe00000 0x100000>;
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
......@@ -250,6 +250,14 @@
phy_type = "ulpi";
};
sdhci@2e000 {
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <72 0x2>;
interrupt-parent = <&mpic>;
clock-frequency = <250000000>;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
......@@ -347,13 +355,13 @@
interrupt-parent = <&mpic>;
interrupts = <24 0x2>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xffe08000 0x1000>;
reg = <0 0xffe08000 0 0x1000>;
};
pci1: pcie@ffe09000 {
......@@ -362,10 +370,10 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xffe09000 0x1000>;
reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <25 0x2>;
......@@ -398,10 +406,10 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xffe0a000 0x1000>;
reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <26 0x2>;
......@@ -434,10 +442,10 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xffe0b000 0x1000>;
reg = <0 0xffe0b000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <27 0x2>;
......
arch/powerpc/boot/dts/mpc8536ds_36b.dts 0 → 100644
浏览文件 @ 723e9db7
/*
* MPC8536 DS Device Tree Source
*
* Copyright 2008-2009 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,mpc8536ds";
compatible = "fsl,mpc8536ds";
#address-cells = <2>;
#size-cells = <2>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
pci3 = &pci3;
};
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8536@0 {
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
};
memory {
device_type = "memory";
reg = <0 0 0 0>; // Filled by U-Boot
};
soc@fffe00000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xf 0xffe00000 0x100000>;
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,mpc8536-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,mpc8536-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 0x2>;
};
L2: l2-cache-controller@20000 {
compatible = "fsl,mpc8536-l2-cache-controller";
reg = <0x20000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <16 0x2>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <43 0x2>;
interrupt-parent = <&mpic>;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <43 0x2>;
interrupt-parent = <&mpic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
interrupts = <0 0x1>;
interrupt-parent = <&mpic>;
};
};
dma@21300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
reg = <0x21300 4>;
ranges = <0 0x21100 0x200>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,mpc8536-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <20 2>;
};
dma-channel@80 {
compatible = "fsl,mpc8536-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <21 2>;
};
dma-channel@100 {
compatible = "fsl,mpc8536-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <22 2>;
};
dma-channel@180 {
compatible = "fsl,mpc8536-dma-channel",
"fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <23 2>;
};
};
usb@22000 {
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&mpic>;
interrupts = <28 0x2>;
phy_type = "ulpi";
};
usb@23000 {
compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&mpic>;
interrupts = <46 0x2>;
phy_type = "ulpi";
};
enet0: ethernet@24000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
ranges = <0x0 0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <29 2 30 2 34 2>;
interrupt-parent = <&mpic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x520 0x20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <10 0x1>;
reg = <0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <10 0x1>;
reg = <1>;
device_type = "ethernet-phy";
};
tbi0: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
};
enet1: ethernet@26000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x26000 0x1000>;
ranges = <0x0 0x26000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <31 2 32 2 33 2>;
interrupt-parent = <&mpic>;
tbi-handle = <&tbi1>;
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-tbi";
reg = <0x520 0x20>;
tbi1: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
};
usb@2b000 {
compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
reg = <0x2b000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&mpic>;
interrupts = <60 0x2>;
dr_mode = "peripheral";
phy_type = "ulpi";
};
sdhci@2e000 {
compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <72 0x2>;
interrupt-parent = <&mpic>;
clock-frequency = <250000000>;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <42 0x2>;
interrupt-parent = <&mpic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <42 0x2>;
interrupt-parent = <&mpic>;
};
crypto@30000 {
compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
"fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2 58 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x9fe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
cell-index = <1>;
interrupts = <74 0x2>;
interrupt-parent = <&mpic>;
};
sata@19000 {
compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
reg = <0x19000 0x1000>;
cell-index = <2>;
interrupts = <41 0x2>;
interrupt-parent = <&mpic>;
};
global-utilities@e0000 { //global utilities block
compatible = "fsl,mpc8548-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
};
msi@41600 {
compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
reg = <0x41600 0x80>;
msi-available-ranges = <0 0x100>;
interrupts = <
0xe0 0
0xe1 0
0xe2 0
0xe3 0
0xe4 0
0xe5 0
0xe6 0
0xe7 0>;
interrupt-parent = <&mpic>;
};
};
pci0: pci@fffe08000 {
compatible = "fsl,mpc8540-pci";
device_type = "pci";
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 J17 Slot 1 */
0x8800 0 0 1 &mpic 1 1
0x8800 0 0 2 &mpic 2 1
0x8800 0 0 3 &mpic 3 1
0x8800 0 0 4 &mpic 4 1>;
interrupt-parent = <&mpic>;
interrupts = <24 0x2>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf 0xffe08000 0 0x1000>;
};
pci1: pcie@fffe09000 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf 0xffe09000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <25 0x2>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 4 1
0000 0 0 2 &mpic 5 1
0000 0 0 3 &mpic 6 1
0000 0 0 4 &mpic 7 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0 0xf8000000
0x02000000 0 0xf8000000
0 0x08000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00010000>;
};
};
pci2: pcie@fffe0a000 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf 0xffe0a000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000
0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <26 0x2>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 0 1
0000 0 0 2 &mpic 1 1
0000 0 0 3 &mpic 2 1
0000 0 0 4 &mpic 3 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0 0xf8000000
0x02000000 0 0xf8000000
0 0x08000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00010000>;
};
};
pci3: pcie@fffe0b000 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf 0xffe0b000 0 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000
0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <27 0x2>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 8 1
0000 0 0 2 &mpic 9 1
0000 0 0 3 &mpic 10 1
0000 0 0 4 &mpic 11 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0 0xe0000000
0x02000000 0 0xe0000000
0 0x20000000
0x01000000 0 0x00000000
0x01000000 0 0x00000000
0 0x00100000>;
};
};
};
arch/powerpc/boot/dts/mpc8548cds.dts
浏览文件 @ 723e9db7
......@@ -100,6 +100,21 @@
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@56 {
compatible = "atmel,24c64";
reg = <0x56>;
};
eeprom@57 {
compatible = "atmel,24c64";
reg = <0x57>;
};
};
i2c@3100 {
......@@ -111,6 +126,11 @@
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
};
dma@21300 {
......
arch/powerpc/boot/dts/mpc8569mds.dts
浏览文件 @ 723e9db7
......@@ -99,8 +99,18 @@
};
bcsr@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8569mds-bcsr";
reg = <1 0 0x8000>;
ranges = <0 1 0 0x8000>;
bcsr17: gpio-controller@11 {
#gpio-cells = <2>;
compatible = "fsl,mpc8569mds-bcsr-gpio";
reg = <0x11 0x1>;
gpio-controller;
};
};
nand@3,0 {
......@@ -315,6 +325,14 @@
gpio-controller;
};
qe_pio_f: gpio-controller@a0 {
#gpio-cells = <2>;
compatible = "fsl,mpc8569-qe-pario-bank",
"fsl,mpc8323-qe-pario-bank";
reg = <0xa0 0x18>;
gpio-controller;
};
pio1: ucc_pin@01 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
......@@ -419,6 +437,16 @@
interrupt-parent = <&mpic>;
};
timer@440 {
compatible = "fsl,mpc8569-qe-gtm",
"fsl,qe-gtm", "fsl,gtm";
reg = <0x440 0x40>;
interrupts = <12 13 14 15>;
interrupt-parent = <&qeic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
spi@4c0 {
#address-cells = <1>;
#size-cells = <0>;
......@@ -446,6 +474,23 @@
mode = "cpu";
};
usb@6c0 {
compatible = "fsl,mpc8569-qe-usb",
"fsl,mpc8323-qe-usb";
reg = <0x6c0 0x40 0x8b00 0x100>;
interrupts = <11>;
interrupt-parent = <&qeic>;
fsl,fullspeed-clock = "clk5";
fsl,lowspeed-clock = "brg10";
gpios = <&qe_pio_f 3 0 /* USBOE */
&qe_pio_f 4 0 /* USBTP */
&qe_pio_f 5 0 /* USBTN */
&qe_pio_f 6 0 /* USBRP */
&qe_pio_f 8 0 /* USBRN */
&bcsr17 6 0 /* SPEED */
&bcsr17 5 1>; /* POWER */
};
enet0: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
......
arch/powerpc/boot/dts/p2020rdb.dts 0 → 100644
浏览文件 @ 723e9db7
/*
* P2020 RDB Device Tree Source
*
* Copyright 2009 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/dts-v1/;
/ {
model = "fsl,P2020";
compatible = "fsl,P2020RDB";
#address-cells = <2>;
#size-cells = <2>;
aliases {
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,P2020@0 {
device_type = "cpu";
reg = <0x0>;
next-level-cache = <&L2>;
};
PowerPC,P2020@1 {
device_type = "cpu";
reg = <0x1>;
next-level-cache = <&L2>;
};
};
memory {
device_type = "memory";
};
localbus@ffe05000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
reg = <0 0xffe05000 0 0x1000>;
interrupts = <19 2>;
interrupt-parent = <&mpic>;
/* NOR and NAND Flashes */
ranges = <0x0 0x0 0x0 0xef000000 0x01000000
0x1 0x0 0x0 0xffa00000 0x00040000
0x2 0x0 0x0 0xffb00000 0x00020000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x1000000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
/* This location must not be altered */
/* 256KB for Vitesse 7385 Switch firmware */
reg = <0x0 0x00040000>;
label = "NOR (RO) Vitesse-7385 Firmware";
read-only;
};
partition@40000 {
/* 256KB for DTB Image */
reg = <0x00040000 0x00040000>;
label = "NOR (RO) DTB Image";
read-only;
};
partition@80000 {
/* 3.5 MB for Linux Kernel Image */
reg = <0x00080000 0x00380000>;
label = "NOR (RO) Linux Kernel Image";
read-only;
};
partition@400000 {
/* 11MB for JFFS2 based Root file System */
reg = <0x00400000 0x00b00000>;
label = "NOR (RW) JFFS2 Root File System";
};
partition@f00000 {
/* This location must not be altered */
/* 512KB for u-boot Bootloader Image */
/* 512KB for u-boot Environment Variables */
reg = <0x00f00000 0x00100000>;
label = "NOR (RO) U-Boot Image";
read-only;
};
};
nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,p2020-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
partition@0 {
/* This location must not be altered */
/* 1MB for u-boot Bootloader Image */
reg = <0x0 0x00100000>;
label = "NAND (RO) U-Boot Image";
read-only;
};
partition@100000 {
/* 1MB for DTB Image */
reg = <0x00100000 0x00100000>;
label = "NAND (RO) DTB Image";
read-only;
};
partition@200000 {
/* 4MB for Linux Kernel Image */
reg = <0x00200000 0x00400000>;
label = "NAND (RO) Linux Kernel Image";
read-only;
};
partition@600000 {
/* 4MB for Compressed Root file System Image */
reg = <0x00600000 0x00400000>;
label = "NAND (RO) Compressed RFS Image";
read-only;
};
partition@a00000 {
/* 7MB for JFFS2 based Root file System */
reg = <0x00a00000 0x00700000>;
label = "NAND (RW) JFFS2 Root File System";
};
partition@1100000 {
/* 15MB for JFFS2 based Root file System */
reg = <0x01100000 0x00f00000>;
label = "NAND (RW) Writable User area";
};
};
L2switch@2,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "vitesse-7385";
reg = <0x2 0x0 0x20000>;
};
};
soc@ffe00000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,p2020-immr", "simple-bus";
ranges = <0x0 0x0 0xffe00000 0x100000>;
bus-frequency = <0>; // Filled out by uboot.
ecm-law@0 {
compatible = "fsl,ecm-law";
reg = <0x0 0x1000>;
fsl,num-laws = <12>;
};
ecm@1000 {
compatible = "fsl,p2020-ecm", "fsl,ecm";
reg = <0x1000 0x1000>;
interrupts = <17 2>;
interrupt-parent = <&mpic>;
};
memory-controller@2000 {
compatible = "fsl,p2020-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
dfsrr;
};
serial0: serial@4500 {
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <42 2>;
interrupt-parent = <&mpic>;
};
spi@7000 {
cell-index = <0>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,espi";
reg = <0x7000 0x1000>;
interrupts = <59 0x2>;
interrupt-parent = <&mpic>;
mode = "cpu";
fsl_m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,espi-flash";
reg = <0>;
linux,modalias = "fsl_m25p80";
modal = "s25sl128b";
spi-max-frequency = <50000000>;
mode = <0>;
partition@0 {
/* 512KB for u-boot Bootloader Image */
reg = <0x0 0x00080000>;
label = "SPI (RO) U-Boot Image";
read-only;
};
partition@80000 {
/* 512KB for DTB Image */
reg = <0x00080000 0x00080000>;
label = "SPI (RO) DTB Image";
read-only;
};
partition@100000 {
/* 4MB for Linux Kernel Image */
reg = <0x00100000 0x00400000>;
label = "SPI (RO) Linux Kernel Image";
read-only;
};
partition@500000 {
/* 4MB for Compressed RFS Image */
reg = <0x00500000 0x00400000>;
label = "SPI (RO) Compressed RFS Image";
read-only;
};
partition@900000 {
/* 7MB for JFFS2 based RFS */
reg = <0x00900000 0x00700000>;
label = "SPI (RW) JFFS2 RFS";
};
};
};
dma@c300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,eloplus-dma";
reg = <0xc300 0x4>;
ranges = <0x0 0xc100 0x200>;
cell-index = <1>;
dma-channel@0 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <76 2>;
};
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <77 2>;
};
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <78 2>;
};
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <79 2>;
};
};
gpio: gpio-controller@f000 {
#gpio-cells = <2>;
compatible = "fsl,mpc8572-gpio";
reg = <0xf000 0x100>;
interrupts = <47 0x2>;
interrupt-parent = <&mpic>;
gpio-controller;
};
L2: l2-cache-controller@20000 {
compatible = "fsl,p2020-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x80000>; // L2,512K
interrupt-parent = <&mpic>;
interrupts = <16 2>;
};
dma@21300 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,eloplus-dma";
reg = <0x21300 0x4>;
ranges = <0x0 0x21100 0x200>;
cell-index = <0>;
dma-channel@0 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x0 0x80>;
cell-index = <0>;
interrupt-parent = <&mpic>;
interrupts = <20 2>;
};
dma-channel@80 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x80 0x80>;
cell-index = <1>;
interrupt-parent = <&mpic>;
interrupts = <21 2>;
};
dma-channel@100 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>;
cell-index = <2>;
interrupt-parent = <&mpic>;
interrupts = <22 2>;
};
dma-channel@180 {
compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>;
cell-index = <3>;
interrupt-parent = <&mpic>;
interrupts = <23 2>;
};
};
usb@22000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl-usb2-dr";
reg = <0x22000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <28 0x2>;
phy_type = "ulpi";
};
enet0: ethernet@24000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x24000 0x1000>;
ranges = <0x0 0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <29 2 30 2 34 2>;
interrupt-parent = <&mpic>;
fixed-link = <1 1 1000 0 0>;
phy-connection-type = "rgmii-id";
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x520 0x20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <3 1>;
reg = <0x0>;
};
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <3 1>;
reg = <0x1>;
};
};
};
enet1: ethernet@25000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <1>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x25000 0x1000>;
ranges = <0x0 0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <35 2 36 2 40 2>;
interrupt-parent = <&mpic>;
tbi-handle = <&tbi0>;
phy-handle = <&phy0>;
phy-connection-type = "sgmii";
mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-tbi";
reg = <0x520 0x20>;
tbi0: tbi-phy@11 {
reg = <0x11>;
device_type = "tbi-phy";
};
};
};
enet2: ethernet@26000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <2>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <0x26000 0x1000>;
ranges = <0x0 0x26000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <31 2 32 2 33 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
};
sdhci@2e000 {
compatible = "fsl,p2020-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>;
interrupts = <72 0x2>;
interrupt-parent = <&mpic>;
/* Filled in by U-Boot */
clock-frequency = <0>;
};
crypto@30000 {
compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
"fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <45 2 58 2>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0xbfe>;
fsl,descriptor-types-mask = <0x3ab0ebf>;
};
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
};
msi@41600 {
compatible = "fsl,p2020-msi", "fsl,mpic-msi";
reg = <0x41600 0x80>;
msi-available-ranges = <0 0x100>;
interrupts = <
0xe0 0
0xe1 0
0xe2 0
0xe3 0
0xe4 0
0xe5 0
0xe6 0
0xe7 0>;
interrupt-parent = <&mpic>;
};
global-utilities@e0000 { //global utilities block
compatible = "fsl,p2020-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
};
pci0: pcie@ffe09000 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0 0xffe09000 0 0x1000>;
bus-range = <0 255>;
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <25 2>;
pcie@0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
pci1: pcie@ffe0a000 {
compatible = "fsl,mpc8548-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <0 0xffe0a000 0 0x1000>;
bus-range = <0 255>;
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
clock-frequency = <33333333>;
interrupt-parent = <&mpic>;
interrupts = <26 2>;
pcie@0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
};
};
};
arch/powerpc/boot/dts/sbc8349.dts
浏览文件 @ 723e9db7
......@@ -146,18 +146,6 @@
phy_type = "ulpi";
port0;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
enet0: ethernet@24000 {
#address-cells = <1>;
......@@ -277,15 +265,55 @@
};
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8349-localbus", "simple-bus";
reg = <0xe0005000 0x1000>;
interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
ranges = <0x0 0x0 0xff800000 0x00800000 /* 8MB Flash */
0x1 0x0 0xf8000000 0x00002000 /* 8KB EEPROM */
0x2 0x0 0x10000000 0x04000000 /* 64MB SDRAM */
0x3 0x0 0x10000000 0x04000000>; /* 64MB SDRAM */
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,28F640J3A", "cfi-flash";
reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "user";
reg = <0x00040000 0x006c0000>;
};
partition@700000 {
label = "legacy u-boot";
reg = <0x00700000 0x00100000>;
read-only;
};
};
};
pci0: pci@e0008500 {
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
0x8800 0x0 0x0 0x1 &ipic 20 0x8
0x8800 0x0 0x0 0x2 &ipic 21 0x8
0x8800 0x0 0x0 0x3 &ipic 22 0x8
0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
0x8800 0x0 0x0 0x1 &ipic 48 0x8
0x8800 0x0 0x0 0x2 &ipic 17 0x8
0x8800 0x0 0x0 0x3 &ipic 18 0x8
0x8800 0x0 0x0 0x4 &ipic 19 0x8>;
interrupt-parent = <&ipic>;
interrupts = <0x42 0x8>;
......
arch/powerpc/boot/dts/sbc8560.dts
浏览文件 @ 723e9db7
......@@ -303,7 +303,6 @@
global-utilities@e0000 {
compatible = "fsl,mpc8560-guts";
reg = <0xe0000 0x1000>;
fsl,has-rstcr;
};
};
......
arch/powerpc/boot/mktree.c
浏览文件 @ 723e9db7
......@@ -36,7 +36,7 @@ typedef struct boot_block {
} boot_block_t;
#define IMGBLK 512
char tmpbuf[IMGBLK];
unsigned int tmpbuf[IMGBLK / sizeof(unsigned int)];
int main(int argc, char *argv[])
{
......@@ -95,13 +95,13 @@ int main(int argc, char *argv[])
/* Assume zImage is an ELF file, and skip the 64K header.
*/
if (read(in_fd, tmpbuf, IMGBLK) != IMGBLK) {
if (read(in_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) {
fprintf(stderr, "%s is too small to be an ELF image\n",
argv[1]);
exit(4);
}
if ((*(unsigned int *)tmpbuf) != htonl(0x7f454c46)) {
if (tmpbuf[0] != htonl(0x7f454c46)) {
fprintf(stderr, "%s is not an ELF image\n", argv[1]);
exit(4);
}
......@@ -121,11 +121,11 @@ int main(int argc, char *argv[])
}
while (nblks-- > 0) {
if (read(in_fd, tmpbuf, IMGBLK) < 0) {
if (read(in_fd, tmpbuf, sizeof(tmpbuf)) < 0) {
perror("zImage read");
exit(5);
}
cp = (unsigned int *)tmpbuf;
cp = tmpbuf;
for (i = 0; i < sizeof(tmpbuf) / sizeof(unsigned int); i++)
cksum += *cp++;
if (write(out_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) {
......
arch/powerpc/boot/ppcboot-hotfoot.h 0 → 100644
浏览文件 @ 723e9db7
/*
* This interface is used for compatibility with old U-boots *ONLY*.
* Please do not imitate or extend this.
*/
/*
* Unfortunately, the ESTeem Hotfoot board uses a mangled version of
* ppcboot.h for historical reasons, and in the interest of having a
* mainline kernel boot on the production board+bootloader, this was the
* least-offensive solution. Please direct all flames to:
*
* Solomon Peachy <solomon@linux-wlan.com>
*
* (This header is identical to ppcboot.h except for the
* TARGET_HOTFOOT bits)
*/
/*
* (C) Copyright 2000, 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __PPCBOOT_H__
#define __PPCBOOT_H__
/*
* Board information passed to kernel from PPCBoot
*
* include/asm-ppc/ppcboot.h
*/
#include "types.h"
typedef struct bd_info {
unsigned long bi_memstart; /* start of DRAM memory */
unsigned long bi_memsize; /* size of DRAM memory in bytes */
unsigned long bi_flashstart; /* start of FLASH memory */
unsigned long bi_flashsize; /* size of FLASH memory */
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
#if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\
defined(TARGET_83xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(TARGET_PPC_MPC52xx)
unsigned long bi_mbar_base; /* base of internal registers */
#endif
unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
unsigned long bi_ip_addr; /* IP Address */
unsigned char bi_enetaddr[6]; /* Ethernet address */
#if defined(TARGET_HOTFOOT)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#define HAVE_ENET1ADDR
#endif /* TARGET_HOOTFOOT */
unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
unsigned long bi_intfreq; /* Internal Freq, in MHz */
unsigned long bi_busfreq; /* Bus Freq, in MHz */
#if defined(TARGET_CPM2)
unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
unsigned long bi_vco; /* VCO Out from PLL, in MHz */
#endif
#if defined(TARGET_PPC_MPC52xx)
unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
#endif
unsigned long bi_baudrate; /* Console Baudrate */
#if defined(TARGET_4xx)
unsigned char bi_s_version[4]; /* Version of this structure */
unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */
unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
#endif
#if defined(TARGET_HOTFOOT)
unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
#endif
#if defined(TARGET_HYMOD)
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
#if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \
defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#define HAVE_ENET1ADDR
#endif
#if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \
defined(TARGET_85xx) || defined(TARGET_HAS_ETH2)
/* third onboard ethernet ports */
unsigned char bi_enet2addr[6];
#define HAVE_ENET2ADDR
#endif
#if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3)
/* fourth onboard ethernet ports */
unsigned char bi_enet3addr[6];
#define HAVE_ENET3ADDR
#endif
#if defined(TARGET_HOTFOOT)
int bi_phynum[2]; /* Determines phy mapping */
int bi_phymode[2]; /* Determines phy mode */
#endif
#if defined(TARGET_4xx)
unsigned int bi_opbfreq; /* OB clock in Hz */
int bi_iic_fast[2]; /* Use fast i2c mode */
#endif
#if defined(TARGET_440GX)
int bi_phynum[4]; /* phy mapping */
int bi_phymode[4]; /* phy mode */
#endif
} bd_t;
#define bi_tbfreq bi_intfreq
#endif /* __PPCBOOT_H__ */
arch/powerpc/boot/wrapper
浏览文件 @ 723e9db7
......@@ -46,6 +46,7 @@ CROSS=
# directory for object and other files used by this script
object=arch/powerpc/boot
objbin=$object
dtc=scripts/dtc/dtc
# directory for working files
tmpdir=.
......@@ -124,7 +125,7 @@ if [ -n "$dts" ]; then
if [ -z "$dtb" ]; then
dtb="$platform.dtb"
fi
$object/dtc -O dtb -o "$dtb" -b 0 "$dts"
$dtc -O dtb -o "$dtb" -b 0 "$dts"
fi
if [ -z "$kernel" ]; then
......
arch/powerpc/configs/40x/kilauea_defconfig
浏览文件 @ 723e9db7
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.30-rc7
# Wed Jun 3 10:18:16 2009
# Linux kernel version: 2.6.31-rc4
# Wed Jul 29 13:28:37 2009
#
# CONFIG_PPC64 is not set
#
# Processor support
#
# CONFIG_6xx is not set
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_8xx is not set
CONFIG_40x=y
......@@ -32,11 +32,11 @@ CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_IRQ_PER_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
CONFIG_PPC=y
......@@ -57,6 +57,7 @@ CONFIG_PPC_DCR_NATIVE=y
CONFIG_PPC_DCR=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
#
# General setup
......@@ -108,7 +109,6 @@ CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
......@@ -121,9 +121,16 @@ CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_HAVE_PERF_COUNTERS=y
#
# Performance Counters
#
# CONFIG_PERF_COUNTERS is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_PCI_QUIRKS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_COMPAT_BRK=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
......@@ -137,6 +144,11 @@ CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
# CONFIG_SLOW_WORK is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
......@@ -149,7 +161,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
CONFIG_LBD=y
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
......@@ -220,6 +232,7 @@ CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_IOMMU_HELPER is not set
# CONFIG_SWIOTLB is not set
CONFIG_PPC_NEED_DMA_SYNC_OPS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
......@@ -239,9 +252,9 @@ CONFIG_MIGRATION=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_PPC_4K_PAGES=y
# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_64K_PAGES is not set
......@@ -344,6 +357,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
......@@ -393,9 +407,8 @@ CONFIG_MTD_OF_PARTS=y
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=m
CONFIG_MTD_BLOCK=m
# CONFIG_MTD_BLOCK_RO is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
......@@ -452,7 +465,17 @@ CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
CONFIG_MTD_NAND_ECC_SMC=y
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
CONFIG_MTD_NAND_IDS=y
CONFIG_MTD_NAND_NDFC=y
# CONFIG_MTD_NAND_DISKONCHIP is not set
# CONFIG_MTD_NAND_CAFE is not set
# CONFIG_MTD_NAND_NANDSIM is not set
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_NAND_FSL_ELBC is not set
# CONFIG_MTD_ONENAND is not set
#
......@@ -465,6 +488,7 @@ CONFIG_MTD_PHYSMAP_OF=y
#
# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
......@@ -504,14 +528,17 @@ CONFIG_HAVE_IDE=y
#
#
# Enable only one of the two stacks, unless you know what you are doing
# You can enable one or both FireWire driver stacks.
#
#
# See the help texts for more information.
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_NETDEVICES=y
CONFIG_COMPAT_NET_DEV_OPS=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
......@@ -546,6 +573,7 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
# CONFIG_KS8842 is not set
# CONFIG_ATL2 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
......@@ -621,20 +649,150 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_IBM_IIC=y
# CONFIG_I2C_MPC is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
#
# Graphics adapter I2C/DDC channel drivers
#
# CONFIG_I2C_VOODOO3 is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
#
# PPS support
#
# CONFIG_PPS is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_AD7414 is not set
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
CONFIG_SENSORS_LM75=y
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4245 is not set
# CONFIG_SENSORS_LM95241 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_DME1737 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_TMP401 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_VT8231 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
CONFIG_THERMAL=y
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
......@@ -649,24 +807,15 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
# CONFIG_DAB is not set
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
......@@ -691,10 +840,69 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
CONFIG_RTC_DRV_DS1307=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
#
# SPI RTC drivers
#
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
# CONFIG_RTC_DRV_GENERIC is not set
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
......@@ -708,11 +916,12 @@ CONFIG_EXT2_FS=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
......@@ -818,6 +1027,7 @@ CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_HAVE_LMB=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
#
# Kernel hacking
......@@ -848,6 +1058,9 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
......@@ -859,7 +1072,6 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
......@@ -873,16 +1085,15 @@ CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_TRACING_SUPPORT=y
#
# Tracers
#
CONFIG_FTRACE=y
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_EVENT_TRACER is not set
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_TRACE_BRANCH_PROFILING is not set
CONFIG_BRANCH_PROFILE_NONE=y
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
# CONFIG_PROFILE_ALL_BRANCHES is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_KMEMTRACE is not set
# CONFIG_WORKQUEUE_TRACER is not set
......@@ -891,6 +1102,9 @@ CONFIG_TRACING_SUPPORT=y
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_KMEMCHECK is not set
# CONFIG_PPC_DISABLE_WERROR is not set
CONFIG_PPC_WERROR=y
CONFIG_PRINT_STACK_DEPTH=64
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
......
arch/powerpc/configs/44x/arches_defconfig
浏览文件 @ 723e9db7
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.29-rc2
# Tue Jan 20 08:22:31 2009
# Linux kernel version: 2.6.31-rc5
# Thu Aug 13 14:14:07 2009
#
# CONFIG_PPC64 is not set
#
# Processor support
#
# CONFIG_6xx is not set
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
......@@ -31,15 +31,16 @@ CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_IRQ_PER_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
CONFIG_PPC=y
......@@ -53,11 +54,14 @@ CONFIG_PPC_UDBG_16550=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_BUG=y
CONFIG_DTC=y
# CONFIG_DEFAULT_UIMAGE is not set
CONFIG_PPC_DCR_NATIVE=y
# CONFIG_PPC_DCR_MMIO is not set
CONFIG_PPC_DCR=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
#
# General setup
......@@ -71,9 +75,19 @@ CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_GROUP_SCHED is not set
......@@ -84,8 +98,12 @@ CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
......@@ -95,23 +113,30 @@ CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_HAVE_PERF_COUNTERS=y
#
# Performance Counters
#
# CONFIG_PERF_COUNTERS is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_PCI_QUIRKS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_COMPAT_BRK=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
......@@ -119,6 +144,12 @@ CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
# CONFIG_SLOW_WORK is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
......@@ -130,8 +161,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
CONFIG_LBD=y
# CONFIG_BLK_DEV_IO_TRACE is not set
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
......@@ -147,11 +177,6 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_FREEZER is not set
CONFIG_PPC4xx_PCI_EXPRESS=y
......@@ -172,6 +197,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y
CONFIG_ARCHES=y
# CONFIG_CANYONLANDS is not set
# CONFIG_GLACIER is not set
# CONFIG_REDWOOD is not set
# CONFIG_YOSEMITE is not set
# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
CONFIG_PPC44x_SIMPLE=y
......@@ -214,6 +240,7 @@ CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_IOMMU_HELPER is not set
# CONFIG_SWIOTLB is not set
CONFIG_PPC_NEED_DMA_SYNC_OPS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
......@@ -233,10 +260,14 @@ CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
CONFIG_UNEVICTABLE_LRU=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_STDBINUTILS=y
CONFIG_PPC_4K_PAGES=y
# CONFIG_PPC_16K_PAGES is not set
# CONFIG_PPC_64K_PAGES is not set
# CONFIG_PPC_256K_PAGES is not set
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_PROC_DEVICETREE=y
CONFIG_CMDLINE_BOOL=y
......@@ -261,6 +292,7 @@ CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_LEGACY is not set
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_HAS_RAPIDIO is not set
......@@ -278,14 +310,12 @@ CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_PHYSICAL_START=0x00000000
CONFIG_TASK_SIZE=0xc0000000
CONFIG_CONSISTENT_START=0xff100000
CONFIG_CONSISTENT_SIZE=0x00200000
CONFIG_NET=y
#
# Networking options
#
CONFIG_COMPAT_NET_DEV_OPS=y
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
......@@ -335,6 +365,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
......@@ -347,7 +379,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_PHONET is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
......@@ -371,8 +402,92 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
# CONFIG_MTD is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_MTD_OOPS is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR flash memory drivers
#
# CONFIG_MTD_LPDDR is not set
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
......@@ -412,7 +527,11 @@ CONFIG_HAVE_IDE=y
#
#
# Enable only one of the two stacks, unless you know what you are doing
# You can enable one or both FireWire driver stacks.
#
#
# See the help texts for more information.
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
......@@ -433,6 +552,8 @@ CONFIG_NET_ETHERNET=y
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_ETHOC is not set
# CONFIG_DNET is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_IBM_NEW_EMAC=y
......@@ -451,6 +572,7 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
# CONFIG_KS8842 is not set
# CONFIG_ATL2 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
......@@ -461,7 +583,6 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
......@@ -533,13 +654,143 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_IBM_IIC=y
# CONFIG_I2C_MPC is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
#
# Graphics adapter I2C/DDC channel drivers
#
# CONFIG_I2C_VOODOO3 is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_STUB is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
#
# PPS support
#
# CONFIG_PPS is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
CONFIG_SENSORS_AD7414=y
# CONFIG_SENSORS_AD7418 is not set
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ADT7462 is not set
# CONFIG_SENSORS_ADT7470 is not set
# CONFIG_SENSORS_ADT7473 is not set
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
# CONFIG_SENSORS_G760A is not set
# CONFIG_SENSORS_GL518SM is not set
# CONFIG_SENSORS_GL520SM is not set
# CONFIG_SENSORS_IT87 is not set
# CONFIG_SENSORS_LM63 is not set
# CONFIG_SENSORS_LM75 is not set
# CONFIG_SENSORS_LM77 is not set
# CONFIG_SENSORS_LM78 is not set
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4245 is not set
# CONFIG_SENSORS_LM95241 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_PC87360 is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_DME1737 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_ADS7828 is not set
# CONFIG_SENSORS_THMC50 is not set
# CONFIG_SENSORS_TMP401 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_SENSORS_VT8231 is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83791D is not set
# CONFIG_SENSORS_W83792D is not set
# CONFIG_SENSORS_W83793 is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83L786NG is not set
# CONFIG_SENSORS_W83627HF is not set
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
......@@ -556,24 +807,15 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_REGULATOR is not set
#
# Multimedia devices
#
#
# Multimedia core support
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_VIDEO_MEDIA is not set
#
# Multimedia drivers
#
CONFIG_DAB=y
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
......@@ -600,7 +842,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
# CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
......@@ -614,11 +861,12 @@ CONFIG_EXT2_FS=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
......@@ -627,6 +875,11 @@ CONFIG_INOTIFY_USER=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
#
# CD-ROM/DVD Filesystems
#
......@@ -660,6 +913,17 @@ CONFIG_MISC_FILESYSTEMS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
# CONFIG_JFFS2_SUMMARY is not set
# CONFIG_JFFS2_FS_XATTR is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
# CONFIG_JFFS2_LZO is not set
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
CONFIG_CRAMFS=y
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
......@@ -670,6 +934,7 @@ CONFIG_CRAMFS=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
......@@ -681,7 +946,6 @@ CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_SUNRPC_REGISTER_V4 is not set
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
......@@ -697,6 +961,7 @@ CONFIG_SUNRPC=y
CONFIG_MSDOS_PARTITION=y
# CONFIG_NLS is not set
# CONFIG_DLM is not set
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
......@@ -711,11 +976,14 @@ CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_PLIST=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_HAVE_LMB=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
#
# Kernel hacking
......@@ -733,6 +1001,9 @@ CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
......@@ -743,6 +1014,9 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
......@@ -754,7 +1028,6 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
......@@ -762,27 +1035,36 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
#
# Tracers
#
CONFIG_TRACING_SUPPORT=y
CONFIG_FTRACE=y
# CONFIG_FUNCTION_TRACER is not set
# CONFIG_IRQSOFF_TRACER is not set
# CONFIG_SCHED_TRACER is not set
# CONFIG_CONTEXT_SWITCH_TRACER is not set
# CONFIG_ENABLE_DEFAULT_TRACERS is not set
# CONFIG_BOOT_TRACER is not set
# CONFIG_TRACE_BRANCH_PROFILING is not set
CONFIG_BRANCH_PROFILE_NONE=y
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
# CONFIG_PROFILE_ALL_BRANCHES is not set
# CONFIG_STACK_TRACER is not set
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
# CONFIG_KMEMTRACE is not set
# CONFIG_WORKQUEUE_TRACER is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_KMEMCHECK is not set
# CONFIG_PPC_DISABLE_WERROR is not set
CONFIG_PPC_WERROR=y
CONFIG_PRINT_STACK_DEPTH=64
# CONFIG_DEBUG_STACKOVERFLOW is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_PPC_EMULATED_STATS is not set
# CONFIG_CODE_PATCHING_SELFTEST is not set
# CONFIG_FTR_FIXUP_SELFTEST is not set
# CONFIG_MSI_BITMAP_SELFTEST is not set
......
arch/powerpc/configs/44x/eiger_defconfig 0 → 100644
浏览文件 @ 723e9db7
此差异已折叠。
arch/powerpc/configs/mgcoge_defconfig
浏览文件 @ 723e9db7
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.31-rc4
# Wed Jul 29 23:31:51 2009
# Linux kernel version: 2.6.31-rc5
# Fri Aug 7 08:19:15 2009
#
# CONFIG_PPC64 is not set
......@@ -158,6 +158,7 @@ CONFIG_BASE_SMALL=0
# CONFIG_MODULES is not set
CONFIG_BLOCK=y
CONFIG_LBDAF=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_BLK_DEV_INTEGRITY is not set
#
......@@ -506,6 +507,7 @@ CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
CONFIG_OF_GPIO=y
CONFIG_OF_I2C=y
CONFIG_OF_MDIO=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
......@@ -582,7 +584,8 @@ CONFIG_PHYLIB=y
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
CONFIG_FIXED_PHY=y
# CONFIG_MDIO_BITBANG is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_GPIO is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_MACE is not set
......@@ -608,8 +611,8 @@ CONFIG_MII=y
# CONFIG_ATL2 is not set
CONFIG_FS_ENET=y
CONFIG_FS_ENET_HAS_SCC=y
# CONFIG_FS_ENET_HAS_FCC is not set
# CONFIG_FS_ENET_MDIO_FCC is not set
CONFIG_FS_ENET_HAS_FCC=y
CONFIG_FS_ENET_MDIO_FCC=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_TR is not set
......@@ -680,7 +683,68 @@ CONFIG_HW_RANDOM=y
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIAPRO is not set
#
# Mac SMBus host controller drivers
#
# CONFIG_I2C_POWERMAC is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_CPM=y
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_MPC is not set
# CONFIG_I2C_SIMTEC is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
#
# Graphics adapter I2C/DDC channel drivers
#
# CONFIG_I2C_VOODOO3 is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
#
# CONFIG_PCF8575 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
# CONFIG_SPI is not set
#
......@@ -699,6 +763,9 @@ CONFIG_GPIOLIB=y
#
# I2C GPIO expanders:
#
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
#
# PCI GPIO expanders:
......@@ -727,7 +794,14 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_TPS65010 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_AB3100_CORE is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
......
arch/powerpc/configs/mpc85xx_defconfig
浏览文件 @ 723e9db7
......@@ -203,6 +203,7 @@ CONFIG_MPC85xx_CDS=y
CONFIG_MPC85xx_MDS=y
CONFIG_MPC8536_DS=y
CONFIG_MPC85xx_DS=y
CONFIG_MPC85xx_RDB=y
CONFIG_SOCRATES=y
CONFIG_KSI8560=y
# CONFIG_XES_MPC85xx is not set
......
arch/powerpc/include/asm/bitops.h
浏览文件 @ 723e9db7
此差异已折叠。
arch/powerpc/include/asm/cell-regs.h
浏览文件 @ 723e9db7
......@@ -303,6 +303,17 @@ struct cbe_mic_tm_regs {
extern struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np);
extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu);
/* Cell page table entries */
#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
/* some utility functions to deal with SMT */
extern u32 cbe_get_hw_thread_id(int cpu);
extern u32 cbe_cpu_to_node(int cpu);
......
arch/powerpc/include/asm/cputhreads.h
浏览文件 @ 723e9db7
......@@ -5,6 +5,15 @@
/*
* Mapping of threads to cores
*
* Note: This implementation is limited to a power of 2 number of
* threads per core and the same number for each core in the system
* (though it would work if some processors had less threads as long
* as the CPU numbers are still allocated, just not brought offline).
*
* However, the API allows for a different implementation in the future
* if needed, as long as you only use the functions and not the variables
* directly.
*/
#ifdef CONFIG_SMP
......@@ -67,5 +76,12 @@ static inline int cpu_first_thread_in_core(int cpu)
return cpu & ~(threads_per_core - 1);
}
static inline int cpu_last_thread_in_core(int cpu)
{
return cpu | (threads_per_core - 1);
}
#endif /* _ASM_POWERPC_CPUTHREADS_H */
arch/powerpc/include/asm/device.h
浏览文件 @ 723e9db7
......@@ -6,7 +6,7 @@
#ifndef _ASM_POWERPC_DEVICE_H
#define _ASM_POWERPC_DEVICE_H
struct dma_mapping_ops;
struct dma_map_ops;
struct device_node;
struct dev_archdata {
......@@ -14,8 +14,11 @@ struct dev_archdata {
struct device_node *of_node;
/* DMA operations on that device */
struct dma_mapping_ops *dma_ops;
struct dma_map_ops *dma_ops;
void *dma_data;
#ifdef CONFIG_SWIOTLB
dma_addr_t max_direct_dma_addr;
#endif
};
static inline void dev_archdata_set_node(struct dev_archdata *ad,
......
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arch/powerpc/include/asm/hardirq.h
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#ifndef _ASM_POWERPC_HARDIRQ_H
#define _ASM_POWERPC_HARDIRQ_H
#ifdef __KERNEL__
#include <asm/irq.h>
#include <asm/bug.h>
/* The __last_jiffy_stamp field is needed to ensure that no decrementer
* interrupt is lost on SMP machines. Since on most CPUs it is in the same
* cache line as local_irq_count, it is cheap to access and is also used on UP
* for uniformity.
*/
typedef struct {
unsigned int __softirq_pending; /* set_bit is used on this */
unsigned int __last_jiffy_stamp;
} ____cacheline_aligned irq_cpustat_t;
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp)
static inline void ack_bad_irq(int irq)
{
printk(KERN_CRIT "illegal vector %d received!\n", irq);
BUG();
}
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_HARDIRQ_H */
#include <asm-generic/hardirq.h>
arch/powerpc/include/asm/hw_irq.h
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......@@ -49,8 +49,13 @@ extern void iseries_handle_interrupts(void);
#define raw_irqs_disabled() (local_get_flags() == 0)
#define raw_irqs_disabled_flags(flags) ((flags) == 0)
#ifdef CONFIG_PPC_BOOK3E
#define __hard_irq_enable() __asm__ __volatile__("wrteei 1": : :"memory");
#define __hard_irq_disable() __asm__ __volatile__("wrteei 0": : :"memory");
#else
#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
#endif
#define hard_irq_disable() \
do { \
......
arch/powerpc/include/asm/iommu.h
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#define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1))
#define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE)
/* Cell page table entries */
#define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */
#define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */
#define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */
#define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
#define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
#define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
#define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */
#define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */
/* Boot time flags */
extern int iommu_is_off;
extern int iommu_force_on;
......
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