ARM: 7552/1: mmc: mmci: Switching off HWFC for SDIO depends on MCLK

For writes, HWFC shall be switched off when transfer size <= 8
bytes and when MCLK rate is above 50 MHz. For 50MHz and below
it shall be switched off when transfer size < 8 bytes.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NJohan Rudholm <johan.rudholm@stericsson.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

drivers/mmc/host/mmci.c

@@ -664,12 +664,14 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
 			datactrl |= MCI_ST_DPSM_SDIOEN;
 
 			/*
-			 * The ST Micro variant for SDIO transfer sizes
-			 * less then 8 bytes should have clock H/W flow
-			 * control disabled.
+			 * The ST Micro variant for SDIO small write transfers
+			 * needs to have clock H/W flow control disabled,
+			 * otherwise the transfer will not start. The threshold
+			 * depends on the rate of MCLK.
 			 */
-			if ((host->size < 8) &&
-			    (data->flags & MMC_DATA_WRITE))
+			if (data->flags & MMC_DATA_WRITE &&
+			    (host->size < 8 ||
+			     (host->size <= 8 && host->mclk > 50000000)))
 				clk = host->clk_reg & ~variant->clkreg_enable;
 			else
 				clk = host->clk_reg | variant->clkreg_enable;