[X86] Add new Intel cache descriptors.
From http://www.intel.com/design/xeon/applnots/24161830.pdf 16MB of 16-way assoc 64 byte per cacheline L3 cache anyone? Yum. Signed-off-by: NDave Jones <davej@redhat.com>
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From http://www.intel.com/design/xeon/applnots/24161830.pdf 16MB of 16-way assoc 64 byte per cacheline L3 cache anyone? Yum. Signed-off-by: NDave Jones <davej@redhat.com>