提交 6ed911fb 编写于 作者: L Linus Torvalds

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (40 commits)
  bonding/bond_main.c: make 2 functions static
  ps3: gigabit ethernet driver for PS3, take3
  [netdrvr] Fix dependencies for ax88796 ne2k clone driver
  eHEA: Capability flag for DLPAR support
  Remove sk98lin ethernet driver.
  sunhme.c:quattro_pci_find() must be __devinit
  bonding / ipv6: no addrconf for slaves separately from master
  atl1: remove write-only var in tx handler
  macmace: use "unsigned long flags;"
  Cleanup usbnet_probe() return value handling
  netxen: deinline and sparse fix
  eeprom_93cx6: shorten pulse timing to match spec (bis)
  phylib: Add Marvell 88E1112 phy id
  phylib: cleanup marvell.c a bit
  AX88796 network driver
  IOC3: Switch to pci refcounting safe APIs
  e100: Fix Tyan motherboard e100 not receiving IPMI commands
  QE Ethernet driver writes to wrong register to mask interrupts
  rrunner.c:rr_init() must be __devinit
  tokenring/3c359.c:xl_init() must be __devinit
  ...
......@@ -248,14 +248,6 @@ Who: Len Brown <len.brown@intel.com>
---------------------------
What: sk98lin network driver
When: July 2007
Why: In kernel tree version of driver is unmaintained. Sk98lin driver
replaced by the skge driver.
Who: Stephen Hemminger <shemminger@osdl.org>
---------------------------
What: Compaq touchscreen device emulation
When: Oct 2007
Files: drivers/input/tsdev.c
......
......@@ -96,9 +96,6 @@ routing.txt
- the new routing mechanism
shaper.txt
- info on the module that can shape/limit transmitted traffic.
sk98lin.txt
- Marvell Yukon Chipset / SysKonnect SK-98xx compliant Gigabit
Ethernet Adapter family driver info
skfp.txt
- SysKonnect FDDI (SK-5xxx, Compaq Netelligent) driver info.
smc9.txt
......
此差异已折叠。
......@@ -2930,6 +2930,13 @@ M: mikpe@it.uu.se
L: linux-ide@vger.kernel.org
S: Maintained
PS3 NETWORK SUPPORT
P: Masakazu Mokuno
M: mokuno@sm.sony.co.jp
L: netdev@vger.kernel.org
L: cbe-oss-dev@ozlabs.org
S: Supported
PS3 PLATFORM SUPPORT
P: Geoff Levand
M: geoffrey.levand@am.sony.com
......
......@@ -55,10 +55,10 @@ static inline void eeprom_93cx6_pulse_low(struct eeprom_93cx6 *eeprom)
/*
* Add a short delay for the pulse to work.
* According to the specifications the minimal time
* should be 450ns so a 1us delay is sufficient.
* According to the specifications the "maximum minimum"
* time should be 450ns.
*/
udelay(1);
ndelay(450);
}
static void eeprom_93cx6_startup(struct eeprom_93cx6 *eeprom)
......
......@@ -324,7 +324,7 @@ static struct vortex_chip_info {
{"3c980C Python-T",
PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
{"3cSOHO100-TX Hurricane",
PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
{"3c555 Laptop Hurricane",
PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
{"3c556 Laptop Tornado",
......
......@@ -73,6 +73,9 @@ struct ei_device {
u32 *reg_offset; /* Register mapping table */
spinlock_t page_lock; /* Page register locks */
unsigned long priv; /* Private field to store bus IDs etc. */
#ifdef AX88796_PLATFORM
unsigned char rxcr_base; /* default value for RXCR */
#endif
};
/* The maximum number of 8390 interrupt service routines called per IRQ. */
......@@ -86,11 +89,19 @@ struct ei_device {
/* Some generic ethernet register configurations. */
#define E8390_TX_IRQ_MASK 0xa /* For register EN0_ISR */
#define E8390_RX_IRQ_MASK 0x5
#ifdef AX88796_PLATFORM
#define E8390_RXCONFIG (ei_status.rxcr_base | 0x04)
#define E8390_RXOFF (ei_status.rxcr_base | 0x20)
#else
#define E8390_RXCONFIG 0x4 /* EN0_RXCR: broadcasts, no multicast,errors */
#define E8390_RXOFF 0x20 /* EN0_RXCR: Accept no packets */
#endif
#define E8390_TXCONFIG 0x00 /* EN0_TXCR: Normal transmit mode */
#define E8390_TXOFF 0x02 /* EN0_TXCR: Transmitter off */
/* Register accessed at EN_CMD, the 8390 base addr. */
#define E8390_STOP 0x01 /* Stop and reset the chip */
#define E8390_START 0x02 /* Start the chip, clear reset */
......
......@@ -197,6 +197,15 @@ config MACB
source "drivers/net/arm/Kconfig"
config AX88796
tristate "ASIX AX88796 NE2000 clone support"
depends on ARM || MIPS
select CRC32
select MII
help
AX88796 driver, using platform bus to provide
chip detection and resources
config MACE
tristate "MACE (Power Mac ethernet) support"
depends on PPC_PMAC && PPC32
......@@ -2105,7 +2114,7 @@ config SKGE
with better performance and more complete ethtool support.
It does not support the link failover and network management
features that "portable" vendor supplied sk98lin driver does.
features available in the hardware.
This driver supports adapters based on the original Yukon chipset:
Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
......@@ -2118,7 +2127,7 @@ config SKGE
will be called skge. This is recommended.
config SKY2
tristate "SysKonnect Yukon2 support (EXPERIMENTAL)"
tristate "SysKonnect Yukon2 support"
depends on PCI
select CRC32
---help---
......@@ -2133,92 +2142,15 @@ config SKY2
To compile this driver as a module, choose M here: the module
will be called sky2. This is recommended.
config SK98LIN
tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support (DEPRECATED)"
depends on PCI
---help---
Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
compliant Gigabit Ethernet Adapter.
This driver supports the original Yukon chipset. This driver is
deprecated and will be removed from the kernel in the near future,
it has been replaced by the skge driver. skge is cleaner and
seems to work better.
config SKY2_DEBUG
bool "Debugging interface"
depends on SKY2 && DEBUG_FS
help
This option adds the ability to dump driver state for debugging.
The file debugfs/sky2/ethX displays the state of the internal
transmit and receive rings.
This driver does not support the newer Yukon2 chipset. A separate
driver, sky2, is provided to support Yukon2-based adapters.
The following adapters are supported by this driver:
- 3Com 3C940 Gigabit LOM Ethernet Adapter
- 3Com 3C941 Gigabit LOM Ethernet Adapter
- Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
- Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
- Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
- Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
- Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
- Allied Telesyn AT-2971T Gigabit Ethernet Adapter
- Belkin Gigabit Desktop Card 10/100/1000Base-T Adapter, Copper RJ-45
- EG1032 v2 Instant Gigabit Network Adapter
- EG1064 v2 Instant Gigabit Network Adapter
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Abit)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Albatron)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Asus)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (ECS)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Epox)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Foxconn)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Gigabyte)
- Marvell 88E8001 Gigabit LOM Ethernet Adapter (Iwill)
- Marvell 88E8050 Gigabit LOM Ethernet Adapter (Intel)
- Marvell RDK-8001 Adapter
- Marvell RDK-8002 Adapter
- Marvell RDK-8003 Adapter
- Marvell RDK-8004 Adapter
- Marvell RDK-8006 Adapter
- Marvell RDK-8007 Adapter
- Marvell RDK-8008 Adapter
- Marvell RDK-8009 Adapter
- Marvell RDK-8010 Adapter
- Marvell RDK-8011 Adapter
- Marvell RDK-8012 Adapter
- Marvell RDK-8052 Adapter
- Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (32 bit)
- Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (64 bit)
- N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
- SK-9521 10/100/1000Base-T Adapter
- SK-9521 V2.0 10/100/1000Base-T Adapter
- SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
- SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
- SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
- SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
- SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
- SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
- SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
- SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
- SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
- SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
- SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
- SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
- SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
- SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
- SMC EZ Card 1000 (SMC9452TXV.2)
The adapters support Jumbo Frames.
The dual link adapters support link-failover and dual port features.
Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support
the scatter-gather functionality with sendfile(). Please refer to
<file:Documentation/networking/sk98lin.txt> for more information about
optional driver parameters.
Questions concerning this driver may be addressed to:
<linux@syskonnect.de>
If you want to compile this driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/kbuild/modules.txt>. The module will
be called sk98lin. This is recommended.
If unsure, say N.
config VIA_VELOCITY
tristate "VIA Velocity support"
......@@ -2268,6 +2200,16 @@ config TSI108_ETH
To compile this driver as a module, choose M here: the module
will be called tsi108_eth.
config GELIC_NET
tristate "PS3 Gigabit Ethernet driver"
depends on PPC_PS3
help
This driver supports the network device on the PS3 game
console. This driver has built-in support for Ethernet.
To compile this driver as a module, choose M here: the
module will be called ps3_gelic.
config GIANFAR
tristate "Gianfar Ethernet"
depends on 85xx || 83xx || PPC_86xx
......
......@@ -60,10 +60,11 @@ obj-$(CONFIG_TIGON3) += tg3.o
obj-$(CONFIG_BNX2) += bnx2.o
spidernet-y += spider_net.o spider_net_ethtool.o
obj-$(CONFIG_SPIDER_NET) += spidernet.o sungem_phy.o
obj-$(CONFIG_GELIC_NET) += ps3_gelic.o
ps3_gelic-objs += ps3_gelic_net.o
obj-$(CONFIG_TC35815) += tc35815.o
obj-$(CONFIG_SKGE) += skge.o
obj-$(CONFIG_SKY2) += sky2.o
obj-$(CONFIG_SK98LIN) += sk98lin/
obj-$(CONFIG_SKFP) += skfp/
obj-$(CONFIG_VIA_RHINE) += via-rhine.o
obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
......@@ -107,6 +108,7 @@ obj-$(CONFIG_NET_SB1250_MAC) += sb1250-mac.o
obj-$(CONFIG_B44) += b44.o
obj-$(CONFIG_FORCEDETH) += forcedeth.o
obj-$(CONFIG_NE_H8300) += ne-h8300.o
obj-$(CONFIG_AX88796) += ax88796.o
obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
......
......@@ -295,10 +295,7 @@ int if_up = 0;
/* Setup the DMA counter */
static void
setup_dma (address, rw_flag, num_blocks)
void *address;
unsigned rw_flag;
int num_blocks;
setup_dma (void *address, unsigned rw_flag, int num_blocks)
{
WRITEMODE((unsigned) rw_flag | DMA_FDC | SEC_COUNT | REG_ACSI |
A1);
......@@ -317,9 +314,7 @@ setup_dma (address, rw_flag, num_blocks)
/* Send the first byte of an command block */
static int
send_first (target, byte)
int target;
unsigned char byte;
send_first (int target, unsigned char byte)
{
rw = READ;
acsi_delay_end(COMMAND_DELAY);
......@@ -338,10 +333,7 @@ send_first (target, byte)
/* Send the rest of an command block */
static int
send_1_5 (lun, command, dma)
int lun;
unsigned char *command;
int dma;
send_1_5 (int lun, unsigned char *command, int dma)
{
int i, j;
......@@ -371,8 +363,7 @@ get_status (void)
/* Calculate the number of received bytes */
static int
calc_received (start_address)
void *start_address;
calc_received (void *start_address)
{
return (int)(
(((unsigned long)DMAHIGH << 16) | ((unsigned)DMAMID << 8) | DMALOW)
......@@ -384,8 +375,7 @@ calc_received (start_address)
/* start() starts the PAM's DMA adaptor */
static void
start (target)
int target;
start (int target)
{
send_first(target, START);
}
......@@ -393,8 +383,7 @@ start (target)
/* stop() stops the PAM's DMA adaptor and returns a value of zero in case of success */
static int
stop (target)
int target;
stop (int target)
{
int ret = -1;
unsigned char cmd_buffer[5];
......@@ -415,8 +404,7 @@ stop (target)
/* testpkt() returns the number of received packets waiting in the queue */
static int
testpkt(target)
int target;
testpkt(int target)
{
int ret = -1;
......@@ -431,9 +419,7 @@ testpkt(target)
/* Please note: The buffer is for internal use only but must be defined! */
static int
inquiry (target, buffer)
int target;
unsigned char *buffer;
inquiry (int target, unsigned char *buffer)
{
int ret = -1;
unsigned char *vbuffer = phys_to_virt((unsigned long)buffer);
......@@ -468,9 +454,7 @@ inquiry (target, buffer)
*/
static HADDR
*read_hw_addr(target, buffer)
int target;
unsigned char *buffer;
*read_hw_addr(int target, unsigned char *buffer)
{
HADDR *ret = 0;
unsigned char cmd_buffer[5];
......@@ -491,9 +475,7 @@ static HADDR
}
static irqreturn_t
pamsnet_intr(irq, data, fp)
int irq;
void *data;
pamsnet_intr(int irq, void *data)
{
return IRQ_HANDLED;
}
......@@ -501,9 +483,7 @@ pamsnet_intr(irq, data, fp)
/* receivepkt() loads a packet to a given buffer and returns its length */
static int
receivepkt (target, buffer)
int target;
unsigned char *buffer;
receivepkt (int target, unsigned char *buffer)
{
int ret = -1;
unsigned char cmd_buffer[5];
......@@ -526,10 +506,7 @@ receivepkt (target, buffer)
successfully */
static int
sendpkt (target, buffer, length)
int target;
unsigned char *buffer;
int length;
sendpkt (int target, unsigned char *buffer, int length)
{
int ret = -1;
unsigned char cmd_buffer[5];
......@@ -665,7 +642,8 @@ struct net_device * __init pamsnet_probe (int unit)
there is non-reboot way to recover if something goes wrong.
*/
static int
pamsnet_open(struct net_device *dev) {
pamsnet_open(struct net_device *dev)
{
struct net_local *lp = netdev_priv(dev);
if (pamsnet_debug > 0)
......@@ -694,7 +672,8 @@ pamsnet_open(struct net_device *dev) {
}
static int
pamsnet_send_packet(struct sk_buff *skb, struct net_device *dev) {
pamsnet_send_packet(struct sk_buff *skb, struct net_device *dev)
{
struct net_local *lp = netdev_priv(dev);
unsigned long flags;
......@@ -741,7 +720,8 @@ pamsnet_send_packet(struct sk_buff *skb, struct net_device *dev) {
/* We have a good packet(s), get it/them out of the buffers.
*/
static void
pamsnet_poll_rx(struct net_device *dev) {
pamsnet_poll_rx(struct net_device *dev)
{
struct net_local *lp = netdev_priv(dev);
int boguscount;
int pkt_len;
......@@ -816,7 +796,8 @@ pamsnet_poll_rx(struct net_device *dev) {
* passes them to the higher layers and restarts the timer.
*/
static void
pamsnet_tick(unsigned long data) {
pamsnet_tick(unsigned long data)
{
struct net_device *dev = (struct net_device *)data;
struct net_local *lp = netdev_priv(dev);
......@@ -832,7 +813,8 @@ pamsnet_tick(unsigned long data) {
/* The inverse routine to pamsnet_open().
*/
static int
pamsnet_close(struct net_device *dev) {
pamsnet_close(struct net_device *dev)
{
struct net_local *lp = netdev_priv(dev);
if (pamsnet_debug > 0)
......
......@@ -634,14 +634,13 @@ static void atl1_intr_tx(struct atl1_adapter *adapter)
struct atl1_buffer *buffer_info;
u16 sw_tpd_next_to_clean;
u16 cmb_tpd_next_to_clean;
u8 update = 0;
sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
struct tx_packet_desc *tpd;
update = 1;
tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
if (buffer_info->dma) {
......
此差异已折叠。
......@@ -187,7 +187,7 @@ static void bond_send_gratuitous_arp(struct bonding *bond);
/*---------------------------- General routines -----------------------------*/
const char *bond_mode_name(int mode)
static const char *bond_mode_name(int mode)
{
switch (mode) {
case BOND_MODE_ROUNDROBIN :
......@@ -1224,7 +1224,8 @@ static void bond_detach_slave(struct bonding *bond, struct slave *slave)
/*---------------------------------- IOCTL ----------------------------------*/
int bond_sethwaddr(struct net_device *bond_dev, struct net_device *slave_dev)
static int bond_sethwaddr(struct net_device *bond_dev,
struct net_device *slave_dev)
{
dprintk("bond_dev=%p\n", bond_dev);
dprintk("slave_dev=%p\n", slave_dev);
......@@ -1390,6 +1391,11 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
goto err_free;
}
res = netdev_set_master(slave_dev, bond_dev);
if (res) {
dprintk("Error %d calling netdev_set_master\n", res);
goto err_close;
}
/* open the slave since the application closed it */
res = dev_open(slave_dev);
if (res) {
......@@ -1397,12 +1403,6 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
goto err_restore_mac;
}
res = netdev_set_master(slave_dev, bond_dev);
if (res) {
dprintk("Error %d calling netdev_set_master\n", res);
goto err_close;
}
new_slave->dev = slave_dev;
slave_dev->priv_flags |= IFF_BONDING;
......
......@@ -301,13 +301,11 @@ int bond_create_slave_symlinks(struct net_device *master, struct net_device *sla
void bond_destroy_slave_symlinks(struct net_device *master, struct net_device *slave);
int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev);
int bond_release(struct net_device *bond_dev, struct net_device *slave_dev);
int bond_sethwaddr(struct net_device *bond_dev, struct net_device *slave_dev);
void bond_mii_monitor(struct net_device *bond_dev);
void bond_loadbalance_arp_mon(struct net_device *bond_dev);
void bond_activebackup_arp_mon(struct net_device *bond_dev);
void bond_set_mode_ops(struct bonding *bond, int mode);
int bond_parse_parm(char *mode_arg, struct bond_parm_tbl *tbl);
const char *bond_mode_name(int mode);
void bond_select_active_slave(struct bonding *bond);
void bond_change_active_slave(struct bonding *bond, struct slave *new_active);
void bond_register_arp(struct bonding *);
......
......@@ -43,6 +43,7 @@
#include <linux/proc_fs.h>
#include <linux/rtnetlink.h>
#include <linux/firmware.h>
#include <linux/log2.h>
#include <asm/uaccess.h>
#include "common.h"
......@@ -1818,8 +1819,8 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
return -EBUSY;
if (copy_from_user(&m, useraddr, sizeof(m)))
return -EFAULT;
if (!m.rx_pg_sz || (m.rx_pg_sz & (m.rx_pg_sz - 1)) ||
!m.tx_pg_sz || (m.tx_pg_sz & (m.tx_pg_sz - 1)))
if (!is_power_of_2(m.rx_pg_sz) ||
!is_power_of_2(m.tx_pg_sz))
return -EINVAL; /* not power of 2 */
if (!(m.rx_pg_sz & 0x14000))
return -EINVAL; /* not 16KB or 64KB */
......
......@@ -159,7 +159,7 @@
#define DRV_NAME "e100"
#define DRV_EXT "-NAPI"
#define DRV_VERSION "3.5.17-k4"DRV_EXT
#define DRV_VERSION "3.5.23-k4"DRV_EXT
#define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver"
#define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation"
#define PFX DRV_NAME ": "
......@@ -1024,10 +1024,16 @@ static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
config->mwi_enable = 0x1; /* 1=enable, 0=disable */
config->standard_tcb = 0x0; /* 1=standard, 0=extended */
config->rx_long_ok = 0x1; /* 1=VLANs ok, 0=standard */
if(nic->mac >= mac_82559_D101M)
if (nic->mac >= mac_82559_D101M) {
config->tno_intr = 0x1; /* TCO stats enable */
else
/* Enable TCO in extended config */
if (nic->mac >= mac_82551_10) {
config->byte_count = 0x20; /* extended bytes */
config->rx_d102_mode = 0x1; /* GMRC for TCO */
}
} else {
config->standard_stat_counter = 0x0;
}
}
DPRINTK(HW, DEBUG, "[00-07]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
......
......@@ -39,7 +39,13 @@
#include <asm/io.h>
#define DRV_NAME "ehea"
#define DRV_VERSION "EHEA_0065"
#define DRV_VERSION "EHEA_0067"
/* EHEA capability flags */
#define DLPAR_PORT_ADD_REM 1
#define DLPAR_MEM_ADD 2
#define DLPAR_MEM_REM 4
#define EHEA_CAPABILITIES (DLPAR_PORT_ADD_REM)
#define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
| NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
......
......@@ -2923,6 +2923,15 @@ static int check_module_parm(void)
return ret;
}
static ssize_t ehea_show_capabilities(struct device_driver *drv,
char *buf)
{
return sprintf(buf, "%d", EHEA_CAPABILITIES);
}
static DRIVER_ATTR(capabilities, S_IRUSR | S_IRGRP | S_IROTH,
ehea_show_capabilities, NULL);
int __init ehea_module_init(void)
{
int ret;
......@@ -2934,8 +2943,19 @@ int __init ehea_module_init(void)
if (ret)
goto out;
ret = ibmebus_register_driver(&ehea_driver);
if (ret)
if (ret) {
ehea_error("failed registering eHEA device driver on ebus");
goto out;
}
ret = driver_create_file(&ehea_driver.driver,
&driver_attr_capabilities);
if (ret) {
ehea_error("failed to register capabilities attribute, ret=%d",
ret);
ibmebus_unregister_driver(&ehea_driver);
goto out;
}
out:
return ret;
......@@ -2943,6 +2963,7 @@ int __init ehea_module_init(void)
static void __exit ehea_module_exit(void)
{
driver_remove_file(&ehea_driver.driver, &driver_attr_capabilities);
ibmebus_unregister_driver(&ehea_driver);
}
......
......@@ -352,13 +352,12 @@ static u64 nic_find(struct ioc3 *ioc3, int *last)
static int nic_init(struct ioc3 *ioc3)
{
const char *type;
const char *unknown = "unknown";
const char *type = unknown;
u8 crc;
u8 serial[6];
int save = 0, i;
type = "unknown";
while (1) {
u64 reg;
reg = nic_find(ioc3, &save);
......@@ -392,7 +391,7 @@ static int nic_init(struct ioc3 *ioc3)
}
printk("Found %s NIC", type);
if (type != "unknown") {
if (type != unknown) {
printk (" registration number %02x:%02x:%02x:%02x:%02x:%02x,"
" CRC %02x", serial[0], serial[1], serial[2],
serial[3], serial[4], serial[5], crc);
......@@ -1103,20 +1102,28 @@ static int ioc3_close(struct net_device *dev)
* MiniDINs; all other subdevices are left swinging in the wind, leave
* them disabled.
*/
static inline int ioc3_is_menet(struct pci_dev *pdev)
static int ioc3_adjacent_is_ioc3(struct pci_dev *pdev, int slot)
{
struct pci_dev *dev = pci_get_slot(pdev->bus, PCI_DEVFN(slot, 0));
int ret = 0;
if (dev) {
if (dev->vendor == PCI_VENDOR_ID_SGI &&
dev->device == PCI_DEVICE_ID_SGI_IOC3)
ret = 1;
pci_dev_put(dev);
}
return ret;
}
static int ioc3_is_menet(struct pci_dev *pdev)
{
struct pci_dev *dev;
return pdev->bus->parent == NULL
&& (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(0, 0)))
&& dev->vendor == PCI_VENDOR_ID_SGI
&& dev->device == PCI_DEVICE_ID_SGI_IOC3
&& (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(1, 0)))
&& dev->vendor == PCI_VENDOR_ID_SGI
&& dev->device == PCI_DEVICE_ID_SGI_IOC3
&& (dev = pci_find_slot(pdev->bus->number, PCI_DEVFN(2, 0)))
&& dev->vendor == PCI_VENDOR_ID_SGI
&& dev->device == PCI_DEVICE_ID_SGI_IOC3;
return pdev->bus->parent == NULL &&
ioc3_adjacent_is_ioc3(pdev, 0) &&
ioc3_adjacent_is_ioc3(pdev, 1) &&
ioc3_adjacent_is_ioc3(pdev, 2);
}
#ifdef CONFIG_SERIAL_8250
......
......@@ -577,7 +577,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)
struct mace_data *mp = netdev_priv(dev);
volatile struct mace *mb = mp->mace;
int intr, fs;
unsigned int flags;
unsigned long flags;
/* don't want the dma interrupt handler to fire */
local_irq_save(flags);
......
......@@ -60,6 +60,7 @@
#include <linux/crc32.h>
#include <linux/moduleparam.h>
#include <linux/io.h>
#include <linux/log2.h>
#include <net/checksum.h>
#include <asm/byteorder.h>
#include <asm/io.h>
......@@ -1804,7 +1805,7 @@ static int myri10ge_open(struct net_device *dev)
*/
big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
while ((big_pow2 & (big_pow2 - 1)) != 0)
while (!is_power_of_2(big_pow2))
big_pow2++;
mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
} else {
......
......@@ -1097,109 +1097,6 @@ int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu);
int netxen_nic_set_mac(struct net_device *netdev, void *p);
struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
static inline void netxen_nic_disable_int(struct netxen_adapter *adapter)
{
uint32_t mask = 0x7ff;
int retries = 32;
DPRINTK(1, INFO, "Entered ISR Disable \n");
switch (adapter->portnum) {
case 0:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_0));
break;
case 1:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_1));
break;
case 2:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_2));
break;
case 3:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_3));
break;
}
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT) {
writel(mask,
(void *)(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK)));
}
/* Window = 0 or 1 */
if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
do {
writel(0xffffffff, (void *)
(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_TARGET_STATUS)));
mask = readl((void *)
(pci_base_offset(adapter, ISR_INT_VECTOR)));
if (!(mask & 0x80))
break;
udelay(10);
} while (--retries);
if (!retries) {
printk(KERN_NOTICE "%s: Failed to disable interrupt completely\n",
netxen_nic_driver_name);
}
}
DPRINTK(1, INFO, "Done with Disable Int\n");
return;
}
static inline void netxen_nic_enable_int(struct netxen_adapter *adapter)
{
u32 mask;
DPRINTK(1, INFO, "Entered ISR Enable \n");
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT) {
switch (adapter->ahw.board_type) {
case NETXEN_NIC_GBE:
mask = 0x77b;
break;
case NETXEN_NIC_XGBE:
mask = 0x77f;
break;
default:
mask = 0x7ff;
break;
}
writel(mask,
(void *)(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK)));
}
switch (adapter->portnum) {
case 0:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_0));
break;
case 1:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_1));
break;
case 2:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_2));
break;
case 3:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_3));
break;
}
if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
mask = 0xbff;
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT) {
writel(0X0, NETXEN_CRB_NORMALIZE(adapter, CRB_INT_VECTOR));
}
writel(mask,
(void *)(PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_TARGET_MASK)));
}
DPRINTK(1, INFO, "Done with enable Int\n");
return;
}
/*
* NetXen Board information
......
......@@ -156,6 +156,103 @@ static inline void netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter
#define ADAPTER_LIST_SIZE 12
int netxen_cards_found;
static void netxen_nic_disable_int(struct netxen_adapter *adapter)
{
uint32_t mask = 0x7ff;
int retries = 32;
DPRINTK(1, INFO, "Entered ISR Disable \n");
switch (adapter->portnum) {
case 0:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_0));
break;
case 1:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_1));
break;
case 2:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_2));
break;
case 3:
writel(0x0, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_3));
break;
}
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT)
writel(mask,PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK));
/* Window = 0 or 1 */
if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
do {
writel(0xffffffff,
PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_TARGET_STATUS));
mask = readl(pci_base_offset(adapter, ISR_INT_VECTOR));
if (!(mask & 0x80))
break;
udelay(10);
} while (--retries);
if (!retries) {
printk(KERN_NOTICE "%s: Failed to disable interrupt completely\n",
netxen_nic_driver_name);
}
}
DPRINTK(1, INFO, "Done with Disable Int\n");
}
static void netxen_nic_enable_int(struct netxen_adapter *adapter)
{
u32 mask;
DPRINTK(1, INFO, "Entered ISR Enable \n");
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT) {
switch (adapter->ahw.board_type) {
case NETXEN_NIC_GBE:
mask = 0x77b;
break;
case NETXEN_NIC_XGBE:
mask = 0x77f;
break;
default:
mask = 0x7ff;
break;
}
writel(mask, PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_MASK));
}
switch (adapter->portnum) {
case 0:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_0));
break;
case 1:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_1));
break;
case 2:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_2));
break;
case 3:
writel(0x1, NETXEN_CRB_NORMALIZE(adapter, CRB_SW_INT_MASK_3));
break;
}
if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
mask = 0xbff;
if (adapter->intr_scheme != -1 &&
adapter->intr_scheme != INTR_SCHEME_PERPORT) {
writel(0X0, NETXEN_CRB_NORMALIZE(adapter, CRB_INT_VECTOR));
}
writel(mask,
PCI_OFFSET_SECOND_RANGE(adapter, ISR_INT_TARGET_MASK));
}
DPRINTK(1, INFO, "Done with enable Int\n");
}
/*
* netxen_nic_probe()
*
......
......@@ -1581,6 +1581,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1103),
PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1121),
PCMCIA_DEVICE_PROD_ID12("2408LAN", "Ethernet", 0x352fff7f, 0x00b2e941),
PCMCIA_DEVICE_PROD_ID1234("Socket", "CF 10/100 Ethernet Card", "Revision B", "05/11/06", 0xb38bcc2e, 0x4de88352, 0xeaca6c8d, 0x7e57c22e),
PCMCIA_DEVICE_PROD_ID123("Cardwell", "PCMCIA", "ETHERNET", 0x9533672e, 0x281f1c5d, 0x3ff7175b),
PCMCIA_DEVICE_PROD_ID123("CNet ", "CN30BC", "ETHERNET", 0x9fe55d3d, 0x85601198, 0x3ff7175b),
PCMCIA_DEVICE_PROD_ID123("Digital", "Ethernet", "Adapter", 0x9999ab35, 0x00b2e941, 0x4b0d829e),
......
......@@ -254,77 +254,84 @@ static int m88e1145_config_init(struct phy_device *phydev)
return 0;
}
static struct phy_driver m88e1101_driver = {
.phy_id = 0x01410c60,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1101",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
};
static struct phy_driver m88e1111_driver = {
.phy_id = 0x01410cc0,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1111",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.config_init = &m88e1111_config_init,
.driver = {.owner = THIS_MODULE,},
};
static struct phy_driver m88e1145_driver = {
.phy_id = 0x01410cd0,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1145",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_init = &m88e1145_config_init,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
static struct phy_driver marvell_drivers[] = {
{
.phy_id = 0x01410c60,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1101",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
},
{
.phy_id = 0x01410c90,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1112",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_init = &m88e1111_config_init,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
},
{
.phy_id = 0x01410cc0,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1111",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_init = &m88e1111_config_init,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
},
{
.phy_id = 0x01410cd0,
.phy_id_mask = 0xfffffff0,
.name = "Marvell 88E1145",
.features = PHY_GBIT_FEATURES,
.flags = PHY_HAS_INTERRUPT,
.config_init = &m88e1145_config_init,
.config_aneg = &marvell_config_aneg,
.read_status = &genphy_read_status,
.ack_interrupt = &marvell_ack_interrupt,
.config_intr = &marvell_config_intr,
.driver = {.owner = THIS_MODULE,},
}
};
static int __init marvell_init(void)
{
int ret;
int i;
ret = phy_driver_register(&m88e1101_driver);
if (ret)
return ret;
for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
ret = phy_driver_register(&marvell_drivers[i]);
ret = phy_driver_register(&m88e1111_driver);
if (ret)
goto err1111;
ret = phy_driver_register(&m88e1145_driver);
if (ret)
goto err1145;
if (ret) {
while (i-- > 0)
phy_driver_unregister(&marvell_drivers[i]);
return ret;
}
}
return 0;
err1145:
phy_driver_unregister(&m88e1111_driver);
err1111:
phy_driver_unregister(&m88e1101_driver);
return ret;
}
static void __exit marvell_exit(void)
{
phy_driver_unregister(&m88e1101_driver);
phy_driver_unregister(&m88e1111_driver);
phy_driver_unregister(&m88e1145_driver);
int i;
for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
phy_driver_unregister(&marvell_drivers[i]);
}
module_init(marvell_init);
......
此差异已折叠。
/*
* PS3 Platfom gelic network driver.
*
* Copyright (C) 2007 Sony Computer Entertainment Inc.
* Copyright 2006, 2007 Sony Corporation.
*
* This file is based on: spider_net.h
*
* (C) Copyright IBM Corp. 2005
*
* Authors : Utz Bacher <utz.bacher@de.ibm.com>
* Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _GELIC_NET_H
#define _GELIC_NET_H
#define GELIC_NET_DRV_NAME "Gelic Network Driver"
#define GELIC_NET_DRV_VERSION "1.0"
#define GELIC_NET_ETHTOOL /* use ethtool */
/* ioctl */
#define GELIC_NET_GET_MODE (SIOCDEVPRIVATE + 0)
#define GELIC_NET_SET_MODE (SIOCDEVPRIVATE + 1)
/* descriptors */
#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */
#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */
#define GELIC_NET_MAX_MTU 2308
#define GELIC_NET_MIN_MTU 64
#define GELIC_NET_RXBUF_ALIGN 128
#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
#define GELIC_NET_NAPI_WEIGHT (GELIC_NET_RX_DESCRIPTORS)
#define GELIC_NET_BROADCAST_ADDR 0xffffffffffffL
#define GELIC_NET_VLAN_POS (VLAN_ETH_ALEN * 2)
#define GELIC_NET_VLAN_MAX 4
#define GELIC_NET_MC_COUNT_MAX 32 /* multicast address list */
enum gelic_net_int0_status {
GELIC_NET_GDTDCEINT = 24,
GELIC_NET_GRFANMINT = 28,
};
/* GHIINT1STS bits */
enum gelic_net_int1_status {
GELIC_NET_GDADCEINT = 14,
};
/* interrupt mask */
#define GELIC_NET_TXINT (1L << (GELIC_NET_GDTDCEINT + 32))
#define GELIC_NET_RXINT0 (1L << (GELIC_NET_GRFANMINT + 32))
#define GELIC_NET_RXINT1 (1L << GELIC_NET_GDADCEINT)
#define GELIC_NET_RXINT (GELIC_NET_RXINT0 | GELIC_NET_RXINT1)
/* RX descriptor data_status bits */
#define GELIC_NET_RXDMADU 0x80000000 /* destination MAC addr unknown */
#define GELIC_NET_RXLSTFBF 0x40000000 /* last frame buffer */
#define GELIC_NET_RXIPCHK 0x20000000 /* IP checksum performed */
#define GELIC_NET_RXTCPCHK 0x10000000 /* TCP/UDP checksup performed */
#define GELIC_NET_RXIPSPKT 0x08000000 /* IPsec packet */
#define GELIC_NET_RXIPSAHPRT 0x04000000 /* IPsec AH protocol performed */
#define GELIC_NET_RXIPSESPPRT 0x02000000 /* IPsec ESP protocol performed */
#define GELIC_NET_RXSESPAH 0x01000000 /*
* IPsec ESP protocol auth
* performed
*/
#define GELIC_NET_RXWTPKT 0x00C00000 /*
* wakeup trigger packet
* 01: Magic Packet (TM)
* 10: ARP packet
* 11: Multicast MAC addr
*/
#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
/* bit 20..16 reserved */
#define GELIC_NET_RXRECNUM 0x0000ff00 /* reception receipt number */
/* bit 7..0 reserved */
#define GELIC_NET_TXDESC_TAIL 0
#define GELIC_NET_DATA_STATUS_CHK_MASK (GELIC_NET_RXIPCHK | GELIC_NET_RXTCPCHK)
/* RX descriptor data_error bits */
/* bit 31 reserved */
#define GELIC_NET_RXALNERR 0x40000000 /* alignement error 10/100M */
#define GELIC_NET_RXOVERERR 0x20000000 /* oversize error */
#define GELIC_NET_RXRNTERR 0x10000000 /* Runt error */
#define GELIC_NET_RXIPCHKERR 0x08000000 /* IP checksum error */
#define GELIC_NET_RXTCPCHKERR 0x04000000 /* TCP/UDP checksum error */
#define GELIC_NET_RXUMCHSP 0x02000000 /* unmatched sp on sp */
#define GELIC_NET_RXUMCHSPI 0x01000000 /* unmatched SPI on SAD */
#define GELIC_NET_RXUMCHSAD 0x00800000 /* unmatched SAD */
#define GELIC_NET_RXIPSAHERR 0x00400000 /* auth error on AH protocol
* processing */
#define GELIC_NET_RXIPSESPAHERR 0x00200000 /* auth error on ESP protocol
* processing */
#define GELIC_NET_RXDRPPKT 0x00100000 /* drop packet */
#define GELIC_NET_RXIPFMTERR 0x00080000 /* IP packet format error */
/* bit 18 reserved */
#define GELIC_NET_RXDATAERR 0x00020000 /* IP packet format error */
#define GELIC_NET_RXCALERR 0x00010000 /* cariier extension length
* error */
#define GELIC_NET_RXCREXERR 0x00008000 /* carrier extention error */
#define GELIC_NET_RXMLTCST 0x00004000 /* multicast address frame */
/* bit 13..0 reserved */
#define GELIC_NET_DATA_ERROR_CHK_MASK \
(GELIC_NET_RXIPCHKERR | GELIC_NET_RXTCPCHKERR)
/* tx descriptor command and status */
#define GELIC_NET_DMAC_CMDSTAT_NOCS 0xa0080000 /* middle of frame */
#define GELIC_NET_DMAC_CMDSTAT_TCPCS 0xa00a0000
#define GELIC_NET_DMAC_CMDSTAT_UDPCS 0xa00b0000
#define GELIC_NET_DMAC_CMDSTAT_END_FRAME 0x00040000 /* end of frame */
#define GELIC_NET_DMAC_CMDSTAT_RXDCEIS 0x00000002 /* descriptor chain end
* interrupt status */
#define GELIC_NET_DMAC_CMDSTAT_CHAIN_END 0x00000002 /* RXDCEIS:DMA stopped */
#define GELIC_NET_DMAC_CMDSTAT_NOT_IN_USE 0xb0000000
#define GELIC_NET_DESCR_IND_PROC_SHIFT 28
#define GELIC_NET_DESCR_IND_PROC_MASKO 0x0fffffff
enum gelic_net_descr_status {
GELIC_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */
GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
GELIC_NET_DESCR_NOT_IN_USE /* any other value */
};
/* for lv1_net_control */
#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001
#define GELIC_NET_GET_ETH_PORT_STATUS 0x0000000000000002
#define GELIC_NET_SET_NEGOTIATION_MODE 0x0000000000000003
#define GELIC_NET_GET_VLAN_ID 0x0000000000000004
#define GELIC_NET_LINK_UP 0x0000000000000001
#define GELIC_NET_FULL_DUPLEX 0x0000000000000002
#define GELIC_NET_AUTO_NEG 0x0000000000000004
#define GELIC_NET_SPEED_10 0x0000000000000010
#define GELIC_NET_SPEED_100 0x0000000000000020
#define GELIC_NET_SPEED_1000 0x0000000000000040
#define GELIC_NET_VLAN_ALL 0x0000000000000001
#define GELIC_NET_VLAN_WIRED 0x0000000000000002
#define GELIC_NET_VLAN_WIRELESS 0x0000000000000003
#define GELIC_NET_VLAN_PSP 0x0000000000000004
#define GELIC_NET_VLAN_PORT0 0x0000000000000010
#define GELIC_NET_VLAN_PORT1 0x0000000000000011
#define GELIC_NET_VLAN_PORT2 0x0000000000000012
#define GELIC_NET_VLAN_DAEMON_CLIENT_BSS 0x0000000000000013
#define GELIC_NET_VLAN_LIBERO_CLIENT_BSS 0x0000000000000014
#define GELIC_NET_VLAN_NO_ENTRY -6
#define GELIC_NET_PORT 2 /* for port status */
/* size of hardware part of gelic descriptor */
#define GELIC_NET_DESCR_SIZE (32)
struct gelic_net_descr {
/* as defined by the hardware */
u32 buf_addr;
u32 buf_size;
u32 next_descr_addr;
u32 dmac_cmd_status;
u32 result_size;
u32 valid_size; /* all zeroes for tx */
u32 data_status;
u32 data_error; /* all zeroes for tx */
/* used in the driver */
struct sk_buff *skb;
dma_addr_t bus_addr;
struct gelic_net_descr *next;
struct gelic_net_descr *prev;
struct vlan_ethhdr vlan;
} __attribute__((aligned(32)));
struct gelic_net_descr_chain {
/* we walk from tail to head */
struct gelic_net_descr *head;
struct gelic_net_descr *tail;
};
struct gelic_net_card {
struct net_device *netdev;
/*
* hypervisor requires irq_status should be
* 8 bytes aligned, but u64 member is
* always disposed in that manner
*/
u64 irq_status;
u64 ghiintmask;
struct ps3_system_bus_device *dev;
u32 vlan_id[GELIC_NET_VLAN_MAX];
int vlan_index;
struct gelic_net_descr_chain tx_chain;
struct gelic_net_descr_chain rx_chain;
/* gurad dmac descriptor chain*/
spinlock_t chain_lock;
struct net_device_stats netdev_stats;
int rx_csum;
/* guard tx_dma_progress */
spinlock_t tx_dma_lock;
int tx_dma_progress;
struct work_struct tx_timeout_task;
atomic_t tx_timeout_task_counter;
wait_queue_head_t waitq;
struct gelic_net_descr *tx_top, *rx_top;
struct gelic_net_descr descr[0];
};
extern unsigned long p_to_lp(long pa);
#endif /* _GELIC_NET_H */
......@@ -516,7 +516,7 @@ static unsigned int write_eeprom(struct rr_private *rrpriv,
}
static int __init rr_init(struct net_device *dev)
static int __devinit rr_init(struct net_device *dev)
{
struct rr_private *rrpriv;
struct rr_regs __iomem *regs;
......
......@@ -8036,7 +8036,7 @@ static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
/**
* s2io_io_error_detected - called when PCI error is detected
* @pdev: Pointer to PCI device
* @state: The current pci conneection state
* @state: The current pci connection state
*
* This function is called after a PCI bus error affecting
* this device has been detected.
......
......@@ -573,7 +573,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
* return error if it failed to found.
*/
static int __init sis900_mii_probe(struct net_device * net_dev)
static int __devinit sis900_mii_probe(struct net_device * net_dev)
{
struct sis900_private * sis_priv = net_dev->priv;
const char *dev_name = pci_name(sis_priv->pci_dev);
......
#
# Makefile for the SysKonnect SK-98xx device driver.
#
#
# Standalone driver params
# SKPARAM += -DSK_KERNEL_24
# SKPARAM += -DSK_KERNEL_24_26
# SKPARAM += -DSK_KERNEL_26
# SKPARAM += -DSK_KERNEL_22_24
obj-$(CONFIG_SK98LIN) += sk98lin.o
sk98lin-objs := \
skge.o \
skethtool.o \
skdim.o \
skaddr.o \
skgehwt.o \
skgeinit.o \
skgepnmi.o \
skgesirq.o \
ski2c.o \
sklm80.o \
skqueue.o \
skrlmt.o \
sktimer.o \
skvpd.o \
skxmac2.o
# DBGDEF = \
# -DDEBUG
ifdef DEBUG
DBGDEF += \
-DSK_DEBUG_CHKMOD=0x00000000L \
-DSK_DEBUG_CHKCAT=0x00000000L
endif
# **** possible debug modules for SK_DEBUG_CHKMOD *****************
# SK_DBGMOD_MERR 0x00000001L /* general module error indication */
# SK_DBGMOD_HWM 0x00000002L /* Hardware init module */
# SK_DBGMOD_RLMT 0x00000004L /* RLMT module */
# SK_DBGMOD_VPD 0x00000008L /* VPD module */
# SK_DBGMOD_I2C 0x00000010L /* I2C module */
# SK_DBGMOD_PNMI 0x00000020L /* PNMI module */
# SK_DBGMOD_CSUM 0x00000040L /* CSUM module */
# SK_DBGMOD_ADDR 0x00000080L /* ADDR module */
# SK_DBGMOD_DRV 0x00010000L /* DRV module */
# **** possible debug categories for SK_DEBUG_CHKCAT **************
# *** common modules ***
# SK_DBGCAT_INIT 0x00000001L module/driver initialization
# SK_DBGCAT_CTRL 0x00000002L controlling: add/rmv MCA/MAC and other controls (IOCTL)
# SK_DBGCAT_ERR 0x00000004L error handling paths
# SK_DBGCAT_TX 0x00000008L transmit path
# SK_DBGCAT_RX 0x00000010L receive path
# SK_DBGCAT_IRQ 0x00000020L general IRQ handling
# SK_DBGCAT_QUEUE 0x00000040L any queue management
# SK_DBGCAT_DUMP 0x00000080L large data output e.g. hex dump
# SK_DBGCAT_FATAL 0x00000100L large data output e.g. hex dump
# *** driver (file skge.c) ***
# SK_DBGCAT_DRV_ENTRY 0x00010000 entry points
# SK_DBGCAT_DRV_??? 0x00020000 not used
# SK_DBGCAT_DRV_MCA 0x00040000 multicast
# SK_DBGCAT_DRV_TX_PROGRESS 0x00080000 tx path
# SK_DBGCAT_DRV_RX_PROGRESS 0x00100000 rx path
# SK_DBGCAT_DRV_PROGRESS 0x00200000 general runtime
# SK_DBGCAT_DRV_??? 0x00400000 not used
# SK_DBGCAT_DRV_PROM 0x00800000 promiscuous mode
# SK_DBGCAT_DRV_TX_FRAME 0x01000000 display tx frames
# SK_DBGCAT_DRV_ERROR 0x02000000 error conditions
# SK_DBGCAT_DRV_INT_SRC 0x04000000 interrupts sources
# SK_DBGCAT_DRV_EVENT 0x08000000 driver events
EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_DIAG_SUPPORT -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
clean:
rm -f core *.o *.a *.s
/******************************************************************************
*
* Name: lm80.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.6 $
* Date: $Date: 2003/05/13 17:26:52 $
* Purpose: Contains all defines for the LM80 Chip
* (National Semiconductor).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef __INC_LM80_H
#define __INC_LM80_H
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* defines ********************************************************************/
/*
* LM80 register definition
*
* All registers are 8 bit wide
*/
#define LM80_CFG 0x00 /* Configuration Register */
#define LM80_ISRC_1 0x01 /* Interrupt Status Register 1 */
#define LM80_ISRC_2 0x02 /* Interrupt Status Register 2 */
#define LM80_IMSK_1 0x03 /* Interrupt Mask Register 1 */
#define LM80_IMSK_2 0x04 /* Interrupt Mask Register 2 */
#define LM80_FAN_CTRL 0x05 /* Fan Devisor/RST#/OS# Register */
#define LM80_TEMP_CTRL 0x06 /* OS# Config, Temp Res. Reg */
/* 0x07 - 0x1f reserved */
/* current values */
#define LM80_VT0_IN 0x20 /* current Voltage 0 value */
#define LM80_VT1_IN 0x21 /* current Voltage 1 value */
#define LM80_VT2_IN 0x22 /* current Voltage 2 value */
#define LM80_VT3_IN 0x23 /* current Voltage 3 value */
#define LM80_VT4_IN 0x24 /* current Voltage 4 value */
#define LM80_VT5_IN 0x25 /* current Voltage 5 value */
#define LM80_VT6_IN 0x26 /* current Voltage 6 value */
#define LM80_TEMP_IN 0x27 /* current Temperature value */
#define LM80_FAN1_IN 0x28 /* current Fan 1 count */
#define LM80_FAN2_IN 0x29 /* current Fan 2 count */
/* limit values */
#define LM80_VT0_HIGH_LIM 0x2a /* high limit val for Voltage 0 */
#define LM80_VT0_LOW_LIM 0x2b /* low limit val for Voltage 0 */
#define LM80_VT1_HIGH_LIM 0x2c /* high limit val for Voltage 1 */
#define LM80_VT1_LOW_LIM 0x2d /* low limit val for Voltage 1 */
#define LM80_VT2_HIGH_LIM 0x2e /* high limit val for Voltage 2 */
#define LM80_VT2_LOW_LIM 0x2f /* low limit val for Voltage 2 */
#define LM80_VT3_HIGH_LIM 0x30 /* high limit val for Voltage 3 */
#define LM80_VT3_LOW_LIM 0x31 /* low limit val for Voltage 3 */
#define LM80_VT4_HIGH_LIM 0x32 /* high limit val for Voltage 4 */
#define LM80_VT4_LOW_LIM 0x33 /* low limit val for Voltage 4 */
#define LM80_VT5_HIGH_LIM 0x34 /* high limit val for Voltage 5 */
#define LM80_VT5_LOW_LIM 0x35 /* low limit val for Voltage 5 */
#define LM80_VT6_HIGH_LIM 0x36 /* high limit val for Voltage 6 */
#define LM80_VT6_LOW_LIM 0x37 /* low limit val for Voltage 6 */
#define LM80_THOT_LIM_UP 0x38 /* hot temperature limit (high) */
#define LM80_THOT_LIM_LO 0x39 /* hot temperature limit (low) */
#define LM80_TOS_LIM_UP 0x3a /* OS temperature limit (high) */
#define LM80_TOS_LIM_LO 0x3b /* OS temperature limit (low) */
#define LM80_FAN1_COUNT_LIM 0x3c /* Fan 1 count limit (high) */
#define LM80_FAN2_COUNT_LIM 0x3d /* Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
/*
* LM80 bit definitions
*/
/* LM80_CFG Configuration Register */
#define LM80_CFG_START (1<<0) /* start monitoring operation */
#define LM80_CFG_INT_ENA (1<<1) /* enables the INT# Interrupt output */
#define LM80_CFG_INT_POL (1<<2) /* INT# pol: 0 act low, 1 act high */
#define LM80_CFG_INT_CLR (1<<3) /* disables INT#/RST_OUT#/OS# outputs */
#define LM80_CFG_RESET (1<<4) /* signals a reset */
#define LM80_CFG_CHASS_CLR (1<<5) /* clears Chassis Intrusion (CI) pin */
#define LM80_CFG_GPO (1<<6) /* drives the GPO# pin */
#define LM80_CFG_INIT (1<<7) /* restore power on defaults */
/* LM80_ISRC_1 Interrupt Status Register 1 */
/* LM80_IMSK_1 Interrupt Mask Register 1 */
#define LM80_IS_VT0 (1<<0) /* limit exceeded for Voltage 0 */
#define LM80_IS_VT1 (1<<1) /* limit exceeded for Voltage 1 */
#define LM80_IS_VT2 (1<<2) /* limit exceeded for Voltage 2 */
#define LM80_IS_VT3 (1<<3) /* limit exceeded for Voltage 3 */
#define LM80_IS_VT4 (1<<4) /* limit exceeded for Voltage 4 */
#define LM80_IS_VT5 (1<<5) /* limit exceeded for Voltage 5 */
#define LM80_IS_VT6 (1<<6) /* limit exceeded for Voltage 6 */
#define LM80_IS_INT_IN (1<<7) /* state of INT_IN# */
/* LM80_ISRC_2 Interrupt Status Register 2 */
/* LM80_IMSK_2 Interrupt Mask Register 2 */
#define LM80_IS_TEMP (1<<0) /* HOT temperature limit exceeded */
#define LM80_IS_BTI (1<<1) /* state of BTI# pin */
#define LM80_IS_FAN1 (1<<2) /* count limit exceeded for Fan 1 */
#define LM80_IS_FAN2 (1<<3) /* count limit exceeded for Fan 2 */
#define LM80_IS_CI (1<<4) /* Chassis Intrusion occured */
#define LM80_IS_OS (1<<5) /* OS temperature limit exceeded */
/* bit 6 and 7 are reserved in LM80_ISRC_2 */
#define LM80_IS_HT_IRQ_MD (1<<6) /* Hot temperature interrupt mode */
#define LM80_IS_OT_IRQ_MD (1<<7) /* OS temperature interrupt mode */
/* LM80_FAN_CTRL Fan Devisor/RST#/OS# Register */
#define LM80_FAN1_MD_SEL (1<<0) /* Fan 1 mode select */
#define LM80_FAN2_MD_SEL (1<<1) /* Fan 2 mode select */
#define LM80_FAN1_PRM_CTL (3<<2) /* Fan 1 speed control */
#define LM80_FAN2_PRM_CTL (3<<4) /* Fan 2 speed control */
#define LM80_FAN_OS_ENA (1<<6) /* enable OS mode on RST_OUT#/OS# pins*/
#define LM80_FAN_RST_ENA (1<<7) /* sets RST_OUT#/OS# pins in RST mode */
/* LM80_TEMP_CTRL OS# Config, Temp Res. Reg */
#define LM80_TEMP_OS_STAT (1<<0) /* mirrors the state of RST_OUT#/OS# */
#define LM80_TEMP_OS_POL (1<<1) /* select OS# polarity */
#define LM80_TEMP_OS_MODE (1<<2) /* selects Interrupt mode */
#define LM80_TEMP_RES (1<<3) /* selects 9 or 11 bit temp resulution*/
#define LM80_TEMP_LSB (0xf<<4)/* 4 LSBs of 11 bit temp data */
#define LM80_TEMP_LSB_9 (1<<7) /* LSB of 9 bit temperature data */
/* 0x07 - 0x1f reserved */
/* LM80_VT0_IN current Voltage 0 value */
/* LM80_VT1_IN current Voltage 1 value */
/* LM80_VT2_IN current Voltage 2 value */
/* LM80_VT3_IN current Voltage 3 value */
/* LM80_VT4_IN current Voltage 4 value */
/* LM80_VT5_IN current Voltage 5 value */
/* LM80_VT6_IN current Voltage 6 value */
/* LM80_TEMP_IN current temperature value */
/* LM80_FAN1_IN current Fan 1 count */
/* LM80_FAN2_IN current Fan 2 count */
/* LM80_VT0_HIGH_LIM high limit val for Voltage 0 */
/* LM80_VT0_LOW_LIM low limit val for Voltage 0 */
/* LM80_VT1_HIGH_LIM high limit val for Voltage 1 */
/* LM80_VT1_LOW_LIM low limit val for Voltage 1 */
/* LM80_VT2_HIGH_LIM high limit val for Voltage 2 */
/* LM80_VT2_LOW_LIM low limit val for Voltage 2 */
/* LM80_VT3_HIGH_LIM high limit val for Voltage 3 */
/* LM80_VT3_LOW_LIM low limit val for Voltage 3 */
/* LM80_VT4_HIGH_LIM high limit val for Voltage 4 */
/* LM80_VT4_LOW_LIM low limit val for Voltage 4 */
/* LM80_VT5_HIGH_LIM high limit val for Voltage 5 */
/* LM80_VT5_LOW_LIM low limit val for Voltage 5 */
/* LM80_VT6_HIGH_LIM high limit val for Voltage 6 */
/* LM80_VT6_LOW_LIM low limit val for Voltage 6 */
/* LM80_THOT_LIM_UP hot temperature limit (high) */
/* LM80_THOT_LIM_LO hot temperature limit (low) */
/* LM80_TOS_LIM_UP OS temperature limit (high) */
/* LM80_TOS_LIM_LO OS temperature limit (low) */
/* LM80_FAN1_COUNT_LIM Fan 1 count limit (high) */
/* LM80_FAN2_COUNT_LIM Fan 2 count limit (low) */
/* 0x3e - 0x3f reserved */
#define LM80_ADDR 0x28 /* LM80 default addr */
/* typedefs *******************************************************************/
/* function prototypes ********************************************************/
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_LM80_H */
/******************************************************************************
*
* Name: skaddr.h
* Project: Gigabit Ethernet Adapters, ADDR-Modul
* Version: $Revision: 1.29 $
* Date: $Date: 2003/05/13 16:57:24 $
* Purpose: Header file for Address Management (MC, UC, Prom).
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect GmbH.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
/******************************************************************************
*
* Description:
*
* This module is intended to manage multicast addresses and promiscuous mode
* on GEnesis adapters.
*
* Include File Hierarchy:
*
* "skdrv1st.h"
* ...
* "sktypes.h"
* "skqueue.h"
* "skaddr.h"
* ...
* "skdrv2nd.h"
*
******************************************************************************/
#ifndef __INC_SKADDR_H
#define __INC_SKADDR_H
#ifdef __cplusplus
extern "C" {
#endif /* cplusplus */
/* defines ********************************************************************/
#define SK_MAC_ADDR_LEN 6 /* Length of MAC address. */
#define SK_MAX_ADDRS 14 /* #Addrs for exact match. */
/* ----- Common return values ----- */
#define SK_ADDR_SUCCESS 0 /* Function returned successfully. */
#define SK_ADDR_ILLEGAL_PORT 100 /* Port number too high. */
#define SK_ADDR_TOO_EARLY 101 /* Function called too early. */
/* ----- Clear/Add flag bits ----- */
#define SK_ADDR_PERMANENT 1 /* RLMT Address */
/* ----- Additional Clear flag bits ----- */
#define SK_MC_SW_ONLY 2 /* Do not update HW when clearing. */
/* ----- Override flag bits ----- */
#define SK_ADDR_LOGICAL_ADDRESS 0
#define SK_ADDR_VIRTUAL_ADDRESS (SK_ADDR_LOGICAL_ADDRESS) /* old */
#define SK_ADDR_PHYSICAL_ADDRESS 1
#define SK_ADDR_CLEAR_LOGICAL 2
#define SK_ADDR_SET_LOGICAL 4
/* ----- Override return values ----- */
#define SK_ADDR_OVERRIDE_SUCCESS (SK_ADDR_SUCCESS)
#define SK_ADDR_DUPLICATE_ADDRESS 1
#define SK_ADDR_MULTICAST_ADDRESS 2
/* ----- Partitioning of excact match table ----- */
#define SK_ADDR_EXACT_MATCHES 16 /* #Exact match entries. */
#define SK_ADDR_FIRST_MATCH_RLMT 1
#define SK_ADDR_LAST_MATCH_RLMT 2
#define SK_ADDR_FIRST_MATCH_DRV 3
#define SK_ADDR_LAST_MATCH_DRV (SK_ADDR_EXACT_MATCHES - 1)
/* ----- SkAddrMcAdd/SkAddrMcUpdate return values ----- */
#define SK_MC_FILTERING_EXACT 0 /* Exact filtering. */
#define SK_MC_FILTERING_INEXACT 1 /* Inexact filtering. */
/* ----- Additional SkAddrMcAdd return values ----- */
#define SK_MC_ILLEGAL_ADDRESS 2 /* Illegal address. */
#define SK_MC_ILLEGAL_PORT 3 /* Illegal port (not the active one). */
#define SK_MC_RLMT_OVERFLOW 4 /* Too many RLMT mc addresses. */
/* Promiscuous mode bits ----- */
#define SK_PROM_MODE_NONE 0 /* Normal receive. */
#define SK_PROM_MODE_LLC 1 /* Receive all LLC frames. */
#define SK_PROM_MODE_ALL_MC 2 /* Receive all multicast frames. */
/* #define SK_PROM_MODE_NON_LLC 4 */ /* Receive all non-LLC frames. */
/* Macros */
#ifdef OLD_STUFF
#ifndef SK_ADDR_EQUAL
/*
* "&" instead of "&&" allows better optimization on IA-64.
* The replacement is safe here, as all bytes exist.
*/
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 *)(A1))[5] == ((SK_U8 *)(A2))[5]) & \
(((SK_U8 *)(A1))[4] == ((SK_U8 *)(A2))[4]) & \
(((SK_U8 *)(A1))[3] == ((SK_U8 *)(A2))[3]) & \
(((SK_U8 *)(A1))[2] == ((SK_U8 *)(A2))[2]) & \
(((SK_U8 *)(A1))[1] == ((SK_U8 *)(A2))[1]) & \
(((SK_U8 *)(A1))[0] == ((SK_U8 *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U32 *)&(((SK_U8 *)(A1))[2]) == *(SK_U32 *)&(((SK_U8 *)(A2))[2])) & \
(*(SK_U32 *)&(((SK_U8 *)(A1))[0]) == *(SK_U32 *)&(((SK_U8 *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
#endif /* 0 */
#ifndef SK_ADDR_EQUAL
#ifndef SK_ADDR_DWORD_COMPARE
#define SK_ADDR_EQUAL(A1,A2) ( \
(((SK_U8 SK_FAR *)(A1))[5] == ((SK_U8 SK_FAR *)(A2))[5]) & \
(((SK_U8 SK_FAR *)(A1))[4] == ((SK_U8 SK_FAR *)(A2))[4]) & \
(((SK_U8 SK_FAR *)(A1))[3] == ((SK_U8 SK_FAR *)(A2))[3]) & \
(((SK_U8 SK_FAR *)(A1))[2] == ((SK_U8 SK_FAR *)(A2))[2]) & \
(((SK_U8 SK_FAR *)(A1))[1] == ((SK_U8 SK_FAR *)(A2))[1]) & \
(((SK_U8 SK_FAR *)(A1))[0] == ((SK_U8 SK_FAR *)(A2))[0]))
#else /* SK_ADDR_DWORD_COMPARE */
#define SK_ADDR_EQUAL(A1,A2) ( \
(*(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[4]) == \
*(SK_U16 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[4])) && \
(*(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A1))[0]) == \
*(SK_U32 SK_FAR *)&(((SK_U8 SK_FAR *)(A2))[0])))
#endif /* SK_ADDR_DWORD_COMPARE */
#endif /* SK_ADDR_EQUAL */
/* typedefs *******************************************************************/
typedef struct s_MacAddr {
SK_U8 a[SK_MAC_ADDR_LEN];
} SK_MAC_ADDR;
/* SK_FILTER is used to ensure alignment of the filter. */
typedef union s_InexactFilter {
SK_U8 Bytes[8];
SK_U64 Val; /* Dummy entry for alignment only. */
} SK_FILTER64;
typedef struct s_AddrNet SK_ADDR_NET;
typedef struct s_AddrPort {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Current physical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Permanent physical MAC Address. */
int PromMode; /* Promiscuous Mode. */
/* ----- Private part ----- */
SK_MAC_ADDR PreviousMacAddress; /* Prev. phys. MAC Address. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U32 FirstExactMatchRlmt;
SK_U32 NextExactMatchRlmt;
SK_U32 FirstExactMatchDrv;
SK_U32 NextExactMatchDrv;
SK_MAC_ADDR Exact[SK_ADDR_EXACT_MATCHES];
SK_FILTER64 InexactFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactRlmtFilter; /* For 64-bit hash register. */
SK_FILTER64 InexactDrvFilter; /* For 64-bit hash register. */
} SK_ADDR_PORT;
struct s_AddrNet {
/* ----- Public part (read-only) ----- */
SK_MAC_ADDR CurrentMacAddress; /* Logical MAC Address. */
SK_MAC_ADDR PermanentMacAddress; /* Logical MAC Address. */
/* ----- Private part ----- */
SK_U32 ActivePort; /* View of module ADDR. */
SK_BOOL CurrentMacAddressSet; /* CurrentMacAddress is set. */
SK_U8 Align01;
SK_U16 Align02;
};
typedef struct s_Addr {
/* ----- Public part (read-only) ----- */
SK_ADDR_NET Net[SK_MAX_NETS];
SK_ADDR_PORT Port[SK_MAX_MACS];
/* ----- Private part ----- */
} SK_ADDR;
/* function prototypes ********************************************************/
#ifndef SK_KR_PROTO
/* Functions provided by SkAddr */
/* ANSI/C++ compliant function prototypes */
extern int SkAddrInit(
SK_AC *pAC,
SK_IOC IoC,
int Level);
extern int SkAddrMcClear(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int Flags);
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR *pMc,
int Flags);
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
SK_MAC_ADDR SK_FAR *pNewAddr,
int Flags);
extern int SkAddrPromiscuousChange(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
#ifndef SK_SLIM
extern int SkAddrSwap(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 FromPortNumber,
SK_U32 ToPortNumber);
#endif
#else /* defined(SK_KR_PROTO)) */
/* Non-ANSI/C++ compliant function prototypes */
#error KR-style prototypes are not yet provided.
#endif /* defined(SK_KR_PROTO)) */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* __INC_SKADDR_H */
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
/******************************************************************************
*
* Name: skerror.h
* Project: Gigabit Ethernet Adapters, Common Modules
* Version: $Revision: 1.7 $
* Date: $Date: 2003/05/13 17:25:13 $
* Purpose: SK specific Error log support
*
******************************************************************************/
/******************************************************************************
*
* (C)Copyright 1998-2002 SysKonnect.
* (C)Copyright 2002-2003 Marvell.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* The information in this file is provided "AS IS" without warranty.
*
******************************************************************************/
#ifndef _INC_SKERROR_H_
#define _INC_SKERROR_H_
/*
* Define Error Classes
*/
#define SK_ERRCL_OTHER (0) /* Other error */
#define SK_ERRCL_CONFIG (1L<<0) /* Configuration error */
#define SK_ERRCL_INIT (1L<<1) /* Initialization error */
#define SK_ERRCL_NORES (1L<<2) /* Out of Resources error */
#define SK_ERRCL_SW (1L<<3) /* Internal Software error */
#define SK_ERRCL_HW (1L<<4) /* Hardware Failure */
#define SK_ERRCL_COMM (1L<<5) /* Communication error */
/*
* Define Error Code Bases
*/
#define SK_ERRBASE_RLMT 100 /* Base Error number for RLMT */
#define SK_ERRBASE_HWINIT 200 /* Base Error number for HWInit */
#define SK_ERRBASE_VPD 300 /* Base Error number for VPD */
#define SK_ERRBASE_PNMI 400 /* Base Error number for PNMI */
#define SK_ERRBASE_CSUM 500 /* Base Error number for Checksum */
#define SK_ERRBASE_SIRQ 600 /* Base Error number for Special IRQ */
#define SK_ERRBASE_I2C 700 /* Base Error number for I2C module */
#define SK_ERRBASE_QUEUE 800 /* Base Error number for Scheduler */
#define SK_ERRBASE_ADDR 900 /* Base Error number for Address module */
#define SK_ERRBASE_PECP 1000 /* Base Error number for PECP */
#define SK_ERRBASE_DRV 1100 /* Base Error number for Driver */
#endif /* _INC_SKERROR_H_ */
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
此差异已折叠。
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册