提交 6dbb6ee0 编写于 作者: U Ulf Hansson 提交者: Russell King

ARM: 7617/1: mmc: mmci: Support for DDR mode

Add support for DDR mode which may be used for the ux500v2 variant.
Corresponding capabilities to enable the DDR support must be set in
the platform struct to enable the functionality.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 d1c3ed66
......@@ -202,6 +202,9 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8)
clk |= MCI_ST_8BIT_BUS;
if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
clk |= MCI_ST_UX500_NEG_EDGE;
mmci_write_clkreg(host, clk);
}
......@@ -680,6 +683,9 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
mmci_write_clkreg(host, clk);
}
if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50)
datactrl |= MCI_ST_DPSM_DDRMODE;
/*
* Attempt to use DMA operation mode, if this
* should fail, fall back to PIO mode
......
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