arm64: ARM: Fix the Generic Timers interrupt active level description
The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional description" that generic timers provide an active-LOW interrupt output. Fix the device trees to correctly describe this. While doing this update the CPU mask to match the number of described CPUs as well. Signed-off-by: NLiviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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