提交 694625c0 编写于 作者: R Randy Dunlap 提交者: Greg Kroah-Hartman

PCI: add pci_try_set_mwi

As suggested by Andrew, add pci_try_set_mwi(), which does not require
return-value checking.

- add pci_try_set_mwi() without __must_check
- make it return 0 on success, errno if the "try" failed or error
- review callers
Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 f5609d7e
...@@ -296,7 +296,10 @@ If the PCI device can use the PCI Memory-Write-Invalidate transaction, ...@@ -296,7 +296,10 @@ If the PCI device can use the PCI Memory-Write-Invalidate transaction,
call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval
and also ensures that the cache line size register is set correctly. and also ensures that the cache line size register is set correctly.
Check the return value of pci_set_mwi() as not all architectures Check the return value of pci_set_mwi() as not all architectures
or chip-sets may support Memory-Write-Invalidate. or chip-sets may support Memory-Write-Invalidate. Alternatively,
if Mem-Wr-Inval would be nice to have but is not required, call
pci_try_set_mwi() to have the system do its best effort at enabling
Mem-Wr-Inval.
3.2 Request MMIO/IOP resources 3.2 Request MMIO/IOP resources
......
...@@ -266,7 +266,7 @@ static int cs5530_init_chip(void) ...@@ -266,7 +266,7 @@ static int cs5530_init_chip(void)
} }
pci_set_master(cs5530_0); pci_set_master(cs5530_0);
pci_set_mwi(cs5530_0); pci_try_set_mwi(cs5530_0);
/* /*
* Set PCI CacheLineSize to 16-bytes: * Set PCI CacheLineSize to 16-bytes:
......
...@@ -236,7 +236,7 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch ...@@ -236,7 +236,7 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
*/ */
pci_set_master(cs5530_0); pci_set_master(cs5530_0);
pci_set_mwi(cs5530_0); pci_try_set_mwi(cs5530_0);
/* /*
* Set PCI CacheLineSize to 16-bytes: * Set PCI CacheLineSize to 16-bytes:
......
...@@ -4917,13 +4917,13 @@ static int __devinit cas_init_one(struct pci_dev *pdev, ...@@ -4917,13 +4917,13 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
pci_cmd &= ~PCI_COMMAND_SERR; pci_cmd &= ~PCI_COMMAND_SERR;
pci_cmd |= PCI_COMMAND_PARITY; pci_cmd |= PCI_COMMAND_PARITY;
pci_write_config_word(pdev, PCI_COMMAND, pci_cmd); pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
if (pci_set_mwi(pdev)) if (pci_try_set_mwi(pdev))
printk(KERN_WARNING PFX "Could not enable MWI for %s\n", printk(KERN_WARNING PFX "Could not enable MWI for %s\n",
pci_name(pdev)); pci_name(pdev));
/* /*
* On some architectures, the default cache line size set * On some architectures, the default cache line size set
* by pci_set_mwi reduces perforamnce. We have to increase * by pci_try_set_mwi reduces perforamnce. We have to increase
* it for this case. To start, we'll print some configuration * it for this case. To start, we'll print some configuration
* data. * data.
*/ */
......
...@@ -740,7 +740,7 @@ static int __devinit starfire_init_one(struct pci_dev *pdev, ...@@ -740,7 +740,7 @@ static int __devinit starfire_init_one(struct pci_dev *pdev,
pci_set_master(pdev); pci_set_master(pdev);
/* enable MWI -- it vastly improves Rx performance on sparc64 */ /* enable MWI -- it vastly improves Rx performance on sparc64 */
pci_set_mwi(pdev); pci_try_set_mwi(pdev);
#ifdef ZEROCOPY #ifdef ZEROCOPY
/* Starfire can do TCP/UDP checksumming */ /* Starfire can do TCP/UDP checksumming */
......
...@@ -1155,7 +1155,7 @@ static void __devinit tulip_mwi_config (struct pci_dev *pdev, ...@@ -1155,7 +1155,7 @@ static void __devinit tulip_mwi_config (struct pci_dev *pdev,
/* set or disable MWI in the standard PCI command bit. /* set or disable MWI in the standard PCI command bit.
* Check for the case where mwi is desired but not available * Check for the case where mwi is desired but not available
*/ */
if (csr0 & MWI) pci_set_mwi(pdev); if (csr0 & MWI) pci_try_set_mwi(pdev);
else pci_clear_mwi(pdev); else pci_clear_mwi(pdev);
/* read result from hardware (in case bit refused to enable) */ /* read result from hardware (in case bit refused to enable) */
......
...@@ -166,8 +166,7 @@ prism54_probe(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -166,8 +166,7 @@ prism54_probe(struct pci_dev *pdev, const struct pci_device_id *id)
pci_set_master(pdev); pci_set_master(pdev);
/* enable MWI */ /* enable MWI */
if (!pci_set_mwi(pdev)) pci_try_set_mwi(pdev);
printk(KERN_INFO "%s: pci_set_mwi(pdev) succeeded\n", DRV_NAME);
/* setup the network device interface and its structure */ /* setup the network device interface and its structure */
if (!(ndev = islpci_setup(pdev))) { if (!(ndev = islpci_setup(pdev))) {
......
...@@ -1186,6 +1186,11 @@ int pci_set_mwi(struct pci_dev *dev) ...@@ -1186,6 +1186,11 @@ int pci_set_mwi(struct pci_dev *dev)
return 0; return 0;
} }
int pci_try_set_mwi(struct pci_dev *dev)
{
return 0;
}
void pci_clear_mwi(struct pci_dev *dev) void pci_clear_mwi(struct pci_dev *dev)
{ {
} }
...@@ -1242,9 +1247,7 @@ pci_set_cacheline_size(struct pci_dev *dev) ...@@ -1242,9 +1247,7 @@ pci_set_cacheline_size(struct pci_dev *dev)
* pci_set_mwi - enables memory-write-invalidate PCI transaction * pci_set_mwi - enables memory-write-invalidate PCI transaction
* @dev: the PCI device for which MWI is enabled * @dev: the PCI device for which MWI is enabled
* *
* Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND, * Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND.
* and then calls @pcibios_set_mwi to do the needed arch specific
* operations or a generic mwi-prep function.
* *
* RETURNS: An appropriate -ERRNO error value on error, or zero for success. * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
*/ */
...@@ -1260,7 +1263,8 @@ pci_set_mwi(struct pci_dev *dev) ...@@ -1260,7 +1263,8 @@ pci_set_mwi(struct pci_dev *dev)
pci_read_config_word(dev, PCI_COMMAND, &cmd); pci_read_config_word(dev, PCI_COMMAND, &cmd);
if (! (cmd & PCI_COMMAND_INVALIDATE)) { if (! (cmd & PCI_COMMAND_INVALIDATE)) {
pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n", pci_name(dev)); pr_debug("PCI: Enabling Mem-Wr-Inval for device %s\n",
pci_name(dev));
cmd |= PCI_COMMAND_INVALIDATE; cmd |= PCI_COMMAND_INVALIDATE;
pci_write_config_word(dev, PCI_COMMAND, cmd); pci_write_config_word(dev, PCI_COMMAND, cmd);
} }
...@@ -1268,6 +1272,21 @@ pci_set_mwi(struct pci_dev *dev) ...@@ -1268,6 +1272,21 @@ pci_set_mwi(struct pci_dev *dev)
return 0; return 0;
} }
/**
* pci_try_set_mwi - enables memory-write-invalidate PCI transaction
* @dev: the PCI device for which MWI is enabled
*
* Enables the Memory-Write-Invalidate transaction in %PCI_COMMAND.
* Callers are not required to check the return value.
*
* RETURNS: An appropriate -ERRNO error value on error, or zero for success.
*/
int pci_try_set_mwi(struct pci_dev *dev)
{
int rc = pci_set_mwi(dev);
return rc;
}
/** /**
* pci_clear_mwi - disables Memory-Write-Invalidate for device dev * pci_clear_mwi - disables Memory-Write-Invalidate for device dev
* @dev: the PCI device to disable * @dev: the PCI device to disable
...@@ -1600,6 +1619,7 @@ EXPORT_SYMBOL(pci_release_selected_regions); ...@@ -1600,6 +1619,7 @@ EXPORT_SYMBOL(pci_release_selected_regions);
EXPORT_SYMBOL(pci_request_selected_regions); EXPORT_SYMBOL(pci_request_selected_regions);
EXPORT_SYMBOL(pci_set_master); EXPORT_SYMBOL(pci_set_master);
EXPORT_SYMBOL(pci_set_mwi); EXPORT_SYMBOL(pci_set_mwi);
EXPORT_SYMBOL(pci_try_set_mwi);
EXPORT_SYMBOL(pci_clear_mwi); EXPORT_SYMBOL(pci_clear_mwi);
EXPORT_SYMBOL_GPL(pci_intx); EXPORT_SYMBOL_GPL(pci_intx);
EXPORT_SYMBOL(pci_set_dma_mask); EXPORT_SYMBOL(pci_set_dma_mask);
......
...@@ -1578,10 +1578,7 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) ...@@ -1578,10 +1578,7 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
INIT_LIST_HEAD(&phba->fc_nodes); INIT_LIST_HEAD(&phba->fc_nodes);
pci_set_master(pdev); pci_set_master(pdev);
retval = pci_set_mwi(pdev); pci_try_set_mwi(pdev);
if (retval)
dev_printk(KERN_WARNING, &pdev->dev,
"Warning: pci_set_mwi returned %d\n", retval);
if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0) if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0) if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
......
...@@ -2964,7 +2964,7 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -2964,7 +2964,7 @@ static int net2280_probe (struct pci_dev *pdev, const struct pci_device_id *id)
, &dev->pci->pcimstctl); , &dev->pci->pcimstctl);
/* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */ /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
pci_set_master (pdev); pci_set_master (pdev);
pci_set_mwi (pdev); pci_try_set_mwi (pdev);
/* ... also flushes any posted pci writes */ /* ... also flushes any posted pci writes */
dev->chiprev = get_idx_reg (dev->regs, REG_CHIPREV) & 0xffff; dev->chiprev = get_idx_reg (dev->regs, REG_CHIPREV) & 0xffff;
......
...@@ -545,6 +545,7 @@ void pci_set_master(struct pci_dev *dev); ...@@ -545,6 +545,7 @@ void pci_set_master(struct pci_dev *dev);
int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
#define HAVE_PCI_SET_MWI #define HAVE_PCI_SET_MWI
int __must_check pci_set_mwi(struct pci_dev *dev); int __must_check pci_set_mwi(struct pci_dev *dev);
int pci_try_set_mwi(struct pci_dev *dev);
void pci_clear_mwi(struct pci_dev *dev); void pci_clear_mwi(struct pci_dev *dev);
void pci_intx(struct pci_dev *dev, int enable); void pci_intx(struct pci_dev *dev, int enable);
void pci_msi_off(struct pci_dev *dev); void pci_msi_off(struct pci_dev *dev);
......
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