ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: NZhiwu Song <zhiwu.song@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
Showing
arch/arm/mach-prima2/rtciobrg.c
0 → 100644
想要评论请 注册 或 登录