clk: renesas: r8a77995: Correct parent clock of DU
[ Upstream commit 515b2915ee08060ad4f6a3b3de38c5c2c5258e8b ] According to the R-Car Gen3 Hardware Manual Rev 1.00, the parent clock of the DU module clocks on R-Car D3 is S1D1. Fixes: d71e851d ("clk: renesas: cpg-mssr: Add R8A77995 support") Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NStephen Boyd <sboyd@kernel.org> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NSasha Levin <sashal@kernel.org>
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