提交 6301b132 编写于 作者: S Sylwester Nawrocki 提交者: Mauro Carvalho Chehab

[media] exynos4-is: Remove "sysreg" clock handling

The "sysreg" clock is required by multiple subsystems and none of the
other drivers handles this clock explicitly. It is currently assumed
that this clock is always on, left in its default state after system
reset.
Remove handling of this clock from the FIMC-IS driver to avoid breaking
other subsystems.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
上级 ac2a4a86
......@@ -48,7 +48,6 @@ static char *fimc_is_clocks[ISS_CLKS_MAX] = {
[ISS_CLK_LITE0] = "lite0",
[ISS_CLK_LITE1] = "lite1",
[ISS_CLK_MPLL] = "mpll",
[ISS_CLK_SYSREG] = "sysreg",
[ISS_CLK_ISP] = "isp",
[ISS_CLK_DRC] = "drc",
[ISS_CLK_FD] = "fd",
......
......@@ -73,7 +73,6 @@ enum {
ISS_CLK_LITE0,
ISS_CLK_LITE1,
ISS_CLK_MPLL,
ISS_CLK_SYSREG,
ISS_CLK_ISP,
ISS_CLK_DRC,
ISS_CLK_FD,
......
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