提交 62c78329 编写于 作者: B Ben Hutchings 提交者: Jeff Garzik

sfc: Reduce I2C udelay to 5 resulting in a clock frequency of 100 kHz

Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>
上级 37b5a603
......@@ -222,7 +222,7 @@ static struct i2c_algo_bit_data falcon_i2c_bit_operations = {
.setscl = falcon_setscl,
.getsda = falcon_getsda,
.getscl = falcon_getscl,
.udelay = 100,
.udelay = 5,
/*
* This is the number of system clock ticks after which
* i2c-algo-bit gives up waiting for SCL to become high.
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册