提交 5fbbe378 编写于 作者: A Arnd Bergmann 提交者: Kalle Valo

rt2x00: convert rt2*_bbp_read return type

This is a semi-automated conversion to change *_bbp_read()
to return the register contents instead of passing them by value,
resulting in much better object code. The majority of the patch
was done using:

sed -i 's:\(\<rt.*_bbp_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \
    -i 's:\(\<rt.*_bbp_dcoc_read\>(.*, .*\), &\(.*\));:\2 = \1);:' \
    -i 's:= _\(rt.*_bbp_read\):\1:' drivers/net/wireless/ralink/rt2x00/*
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NKalle Valo <kvalo@codeaurora.org>
上级 eebd68e7
...@@ -77,10 +77,11 @@ static void rt2400pci_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -77,10 +77,11 @@ static void rt2400pci_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value) const unsigned int word)
{ {
u32 reg; u32 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -103,9 +104,11 @@ static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -103,9 +104,11 @@ static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev,
WAIT_FOR_BBP(rt2x00dev, &reg); WAIT_FOR_BBP(rt2x00dev, &reg);
} }
*value = rt2x00_get_field32(reg, BBPCSR_VALUE); value = rt2x00_get_field32(reg, BBPCSR_VALUE);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt2400pci_rf_write(struct rt2x00_dev *rt2x00dev, static void rt2400pci_rf_write(struct rt2x00_dev *rt2x00dev,
...@@ -164,16 +167,6 @@ static void rt2400pci_eepromregister_write(struct eeprom_93cx6 *eeprom) ...@@ -164,16 +167,6 @@ static void rt2400pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
} }
#ifdef CONFIG_RT2X00_LIB_DEBUGFS #ifdef CONFIG_RT2X00_LIB_DEBUGFS
static u8 _rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word)
{
u8 value;
rt2400pci_bbp_read(rt2x00dev, word, &value);
return value;
}
static const struct rt2x00debug rt2400pci_rt2x00debug = { static const struct rt2x00debug rt2400pci_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -192,7 +185,7 @@ static const struct rt2x00debug rt2400pci_rt2x00debug = { ...@@ -192,7 +185,7 @@ static const struct rt2x00debug rt2400pci_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt2400pci_bbp_read, .read = rt2400pci_bbp_read,
.write = rt2400pci_bbp_write, .write = rt2400pci_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -418,8 +411,8 @@ static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev, ...@@ -418,8 +411,8 @@ static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev,
BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
ant->tx == ANTENNA_SW_DIVERSITY); ant->tx == ANTENNA_SW_DIVERSITY);
rt2400pci_bbp_read(rt2x00dev, 4, &r4); r4 = rt2400pci_bbp_read(rt2x00dev, 4);
rt2400pci_bbp_read(rt2x00dev, 1, &r1); r1 = rt2400pci_bbp_read(rt2x00dev, 1);
/* /*
* Configure the TX antenna. * Configure the TX antenna.
...@@ -600,7 +593,7 @@ static void rt2400pci_link_stats(struct rt2x00_dev *rt2x00dev, ...@@ -600,7 +593,7 @@ static void rt2400pci_link_stats(struct rt2x00_dev *rt2x00dev,
/* /*
* Update False CCA count from register. * Update False CCA count from register.
*/ */
rt2400pci_bbp_read(rt2x00dev, 39, &bbp); bbp = rt2400pci_bbp_read(rt2x00dev, 39);
qual->false_cca = bbp; qual->false_cca = bbp;
} }
...@@ -921,7 +914,7 @@ static int rt2400pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -921,7 +914,7 @@ static int rt2400pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
u8 value; u8 value;
for (i = 0; i < REGISTER_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2400pci_bbp_read(rt2x00dev, 0, &value); value = rt2400pci_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
......
...@@ -77,10 +77,11 @@ static void rt2500pci_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -77,10 +77,11 @@ static void rt2500pci_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value) const unsigned int word)
{ {
u32 reg; u32 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -103,9 +104,11 @@ static void rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -103,9 +104,11 @@ static void rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev,
WAIT_FOR_BBP(rt2x00dev, &reg); WAIT_FOR_BBP(rt2x00dev, &reg);
} }
*value = rt2x00_get_field32(reg, BBPCSR_VALUE); value = rt2x00_get_field32(reg, BBPCSR_VALUE);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt2500pci_rf_write(struct rt2x00_dev *rt2x00dev, static void rt2500pci_rf_write(struct rt2x00_dev *rt2x00dev,
...@@ -164,16 +167,6 @@ static void rt2500pci_eepromregister_write(struct eeprom_93cx6 *eeprom) ...@@ -164,16 +167,6 @@ static void rt2500pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
} }
#ifdef CONFIG_RT2X00_LIB_DEBUGFS #ifdef CONFIG_RT2X00_LIB_DEBUGFS
static u8 _rt2500pci_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word)
{
u8 value;
rt2500pci_bbp_read(rt2x00dev, word, &value);
return value;
}
static const struct rt2x00debug rt2500pci_rt2x00debug = { static const struct rt2x00debug rt2500pci_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -192,7 +185,7 @@ static const struct rt2x00debug rt2500pci_rt2x00debug = { ...@@ -192,7 +185,7 @@ static const struct rt2x00debug rt2500pci_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt2500pci_bbp_read, .read = rt2500pci_bbp_read,
.write = rt2500pci_bbp_write, .write = rt2500pci_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -426,8 +419,8 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev, ...@@ -426,8 +419,8 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
ant->tx == ANTENNA_SW_DIVERSITY); ant->tx == ANTENNA_SW_DIVERSITY);
reg = rt2x00mmio_register_read(rt2x00dev, BBPCSR1); reg = rt2x00mmio_register_read(rt2x00dev, BBPCSR1);
rt2500pci_bbp_read(rt2x00dev, 14, &r14); r14 = rt2500pci_bbp_read(rt2x00dev, 14);
rt2500pci_bbp_read(rt2x00dev, 2, &r2); r2 = rt2500pci_bbp_read(rt2x00dev, 2);
/* /*
* Configure the TX antenna. * Configure the TX antenna.
...@@ -1059,7 +1052,7 @@ static int rt2500pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -1059,7 +1052,7 @@ static int rt2500pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
u8 value; u8 value;
for (i = 0; i < REGISTER_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2500pci_bbp_read(rt2x00dev, 0, &value); value = rt2500pci_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
......
...@@ -153,10 +153,11 @@ static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -153,10 +153,11 @@ static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value) const unsigned int word)
{ {
u16 reg; u16 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -179,9 +180,11 @@ static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -179,9 +180,11 @@ static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
reg = rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7); reg = rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7);
} }
*value = rt2x00_get_field16(reg, PHY_CSR7_DATA); value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
...@@ -227,16 +230,6 @@ static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, ...@@ -227,16 +230,6 @@ static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
rt2500usb_register_write(rt2x00dev, offset, value); rt2500usb_register_write(rt2x00dev, offset, value);
} }
static u8 _rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word)
{
u8 value;
rt2500usb_bbp_read(rt2x00dev, word, &value);
return value;
}
static const struct rt2x00debug rt2500usb_rt2x00debug = { static const struct rt2x00debug rt2500usb_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -255,7 +248,7 @@ static const struct rt2x00debug rt2500usb_rt2x00debug = { ...@@ -255,7 +248,7 @@ static const struct rt2x00debug rt2500usb_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt2500usb_bbp_read, .read = rt2500usb_bbp_read,
.write = rt2500usb_bbp_write, .write = rt2500usb_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -530,8 +523,8 @@ static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, ...@@ -530,8 +523,8 @@ static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
ant->tx == ANTENNA_SW_DIVERSITY); ant->tx == ANTENNA_SW_DIVERSITY);
rt2500usb_bbp_read(rt2x00dev, 2, &r2); r2 = rt2500usb_bbp_read(rt2x00dev, 2);
rt2500usb_bbp_read(rt2x00dev, 14, &r14); r14 = rt2500usb_bbp_read(rt2x00dev, 14);
csr5 = rt2500usb_register_read(rt2x00dev, PHY_CSR5); csr5 = rt2500usb_register_read(rt2x00dev, PHY_CSR5);
csr6 = rt2500usb_register_read(rt2x00dev, PHY_CSR6); csr6 = rt2500usb_register_read(rt2x00dev, PHY_CSR6);
...@@ -903,7 +896,7 @@ static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -903,7 +896,7 @@ static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
u8 value; u8 value;
for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
rt2500usb_bbp_read(rt2x00dev, 0, &value); value = rt2500usb_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
...@@ -1391,7 +1384,7 @@ static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) ...@@ -1391,7 +1384,7 @@ static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
* Switch lower vgc bound to current BBP R17 value, * Switch lower vgc bound to current BBP R17 value,
* lower the value a bit for better quality. * lower the value a bit for better quality.
*/ */
rt2500usb_bbp_read(rt2x00dev, 17, &bbp); bbp = rt2500usb_bbp_read(rt2x00dev, 17);
bbp -= 6; bbp -= 6;
rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
......
...@@ -110,10 +110,10 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -110,10 +110,10 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int word)
const unsigned int word, u8 *value)
{ {
u32 reg; u32 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -137,9 +137,11 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -137,9 +137,11 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
WAIT_FOR_BBP(rt2x00dev, &reg); WAIT_FOR_BBP(rt2x00dev, &reg);
} }
*value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE); value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev, static void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev,
...@@ -1228,15 +1230,6 @@ void rt2800_clear_beacon(struct queue_entry *entry) ...@@ -1228,15 +1230,6 @@ void rt2800_clear_beacon(struct queue_entry *entry)
EXPORT_SYMBOL_GPL(rt2800_clear_beacon); EXPORT_SYMBOL_GPL(rt2800_clear_beacon);
#ifdef CONFIG_RT2X00_LIB_DEBUGFS #ifdef CONFIG_RT2X00_LIB_DEBUGFS
static u8 _rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int word)
{
u8 value;
rt2800_bbp_read(rt2x00dev, word, &value);
return value;
}
const struct rt2x00debug rt2800_rt2x00debug = { const struct rt2x00debug rt2800_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -1258,7 +1251,7 @@ const struct rt2x00debug rt2800_rt2x00debug = { ...@@ -1258,7 +1251,7 @@ const struct rt2x00debug rt2800_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt2800_bbp_read, .read = rt2800_bbp_read,
.write = rt2800_bbp_write, .write = rt2800_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -1960,8 +1953,8 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) ...@@ -1960,8 +1953,8 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
u8 r3; u8 r3;
u16 eeprom; u16 eeprom;
rt2800_bbp_read(rt2x00dev, 1, &r1); r1 = rt2800_bbp_read(rt2x00dev, 1);
rt2800_bbp_read(rt2x00dev, 3, &r3); r3 = rt2800_bbp_read(rt2x00dev, 3);
if (rt2x00_rt(rt2x00dev, RT3572) && if (rt2x00_rt(rt2x00dev, RT3572) &&
rt2x00_has_cap_bt_coexist(rt2x00dev)) rt2x00_has_cap_bt_coexist(rt2x00dev))
...@@ -2437,12 +2430,12 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev, ...@@ -2437,12 +2430,12 @@ static void rt2800_config_channel_rf3053(struct rt2x00_dev *rt2x00dev,
const bool txbf_enabled = false; /* TODO */ const bool txbf_enabled = false; /* TODO */
/* TODO: use TX{0,1,2}FinePowerControl values from EEPROM */ /* TODO: use TX{0,1,2}FinePowerControl values from EEPROM */
rt2800_bbp_read(rt2x00dev, 109, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 109);
rt2x00_set_field8(&bbp, BBP109_TX0_POWER, 0); rt2x00_set_field8(&bbp, BBP109_TX0_POWER, 0);
rt2x00_set_field8(&bbp, BBP109_TX1_POWER, 0); rt2x00_set_field8(&bbp, BBP109_TX1_POWER, 0);
rt2800_bbp_write(rt2x00dev, 109, bbp); rt2800_bbp_write(rt2x00dev, 109, bbp);
rt2800_bbp_read(rt2x00dev, 110, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 110);
rt2x00_set_field8(&bbp, BBP110_TX2_POWER, 0); rt2x00_set_field8(&bbp, BBP110_TX2_POWER, 0);
rt2800_bbp_write(rt2x00dev, 110, bbp); rt2800_bbp_write(rt2x00dev, 110, bbp);
...@@ -3399,7 +3392,7 @@ static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev, ...@@ -3399,7 +3392,7 @@ static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,
rt2x00_warn(rt2x00dev, "Wait MAC Status to MAX !!!\n"); rt2x00_warn(rt2x00dev, "Wait MAC Status to MAX !!!\n");
if (chan->center_freq > 2457) { if (chan->center_freq > 2457) {
rt2800_bbp_read(rt2x00dev, 30, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 30);
bbp = 0x40; bbp = 0x40;
rt2800_bbp_write(rt2x00dev, 30, bbp); rt2800_bbp_write(rt2x00dev, 30, bbp);
rt2800_rfcsr_write(rt2x00dev, 39, 0); rt2800_rfcsr_write(rt2x00dev, 39, 0);
...@@ -3408,7 +3401,7 @@ static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev, ...@@ -3408,7 +3401,7 @@ static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,
else else
rt2800_rfcsr_write(rt2x00dev, 42, 0x7b); rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
} else { } else {
rt2800_bbp_read(rt2x00dev, 30, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 30);
bbp = 0x1f; bbp = 0x1f;
rt2800_bbp_write(rt2x00dev, 30, bbp); rt2800_bbp_write(rt2x00dev, 30, bbp);
rt2800_rfcsr_write(rt2x00dev, 39, 0x80); rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
...@@ -3429,7 +3422,7 @@ static void rt2800_bbp_write_with_rx_chain(struct rt2x00_dev *rt2x00dev, ...@@ -3429,7 +3422,7 @@ static void rt2800_bbp_write_with_rx_chain(struct rt2x00_dev *rt2x00dev,
u8 chain, reg; u8 chain, reg;
for (chain = 0; chain < rt2x00dev->default_ant.rx_chain_num; chain++) { for (chain = 0; chain < rt2x00dev->default_ant.rx_chain_num; chain++) {
rt2800_bbp_read(rt2x00dev, 27, &reg); reg = rt2800_bbp_read(rt2x00dev, 27);
rt2x00_set_field8(&reg, BBP27_RX_CHAIN_SEL, chain); rt2x00_set_field8(&reg, BBP27_RX_CHAIN_SEL, chain);
rt2800_bbp_write(rt2x00dev, 27, reg); rt2800_bbp_write(rt2x00dev, 27, reg);
...@@ -3843,11 +3836,11 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, ...@@ -3843,11 +3836,11 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
rt2800_iq_calibrate(rt2x00dev, rf->channel); rt2800_iq_calibrate(rt2x00dev, rf->channel);
} }
rt2800_bbp_read(rt2x00dev, 4, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf)); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
rt2800_bbp_write(rt2x00dev, 4, bbp); rt2800_bbp_write(rt2x00dev, 4, bbp);
rt2800_bbp_read(rt2x00dev, 3, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 3);
rt2x00_set_field8(&bbp, BBP3_HT40_MINUS, conf_is_ht40_minus(conf)); rt2x00_set_field8(&bbp, BBP3_HT40_MINUS, conf_is_ht40_minus(conf));
rt2800_bbp_write(rt2x00dev, 3, bbp); rt2800_bbp_write(rt2x00dev, 3, bbp);
...@@ -3877,7 +3870,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, ...@@ -3877,7 +3870,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
*/ */
if (rt2x00_rt(rt2x00dev, RT3352) || if (rt2x00_rt(rt2x00dev, RT3352) ||
rt2x00_rt(rt2x00dev, RT5350)) { rt2x00_rt(rt2x00dev, RT5350)) {
rt2800_bbp_read(rt2x00dev, 49, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 49);
rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0); rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
rt2800_bbp_write(rt2x00dev, 49, bbp); rt2800_bbp_write(rt2x00dev, 49, bbp);
} }
...@@ -3979,7 +3972,7 @@ static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev) ...@@ -3979,7 +3972,7 @@ static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev)
/* /*
* Read current TSSI (BBP 49). * Read current TSSI (BBP 49).
*/ */
rt2800_bbp_read(rt2x00dev, 49, &current_tssi); current_tssi = rt2800_bbp_read(rt2x00dev, 49);
/* /*
* Compare TSSI value (BBP49) with the compensation boundaries * Compare TSSI value (BBP49) with the compensation boundaries
...@@ -4713,7 +4706,7 @@ static void rt2800_config_txpower_rt28xx(struct rt2x00_dev *rt2x00dev, ...@@ -4713,7 +4706,7 @@ static void rt2800_config_txpower_rt28xx(struct rt2x00_dev *rt2x00dev,
} else { } else {
power_ctrl = 0; power_ctrl = 0;
} }
rt2800_bbp_read(rt2x00dev, 1, &r1); r1 = rt2800_bbp_read(rt2x00dev, 1);
rt2x00_set_field8(&r1, BBP1_TX_POWER_CTRL, power_ctrl); rt2x00_set_field8(&r1, BBP1_TX_POWER_CTRL, power_ctrl);
rt2800_bbp_write(rt2x00dev, 1, r1); rt2800_bbp_write(rt2x00dev, 1, r1);
...@@ -5683,7 +5676,7 @@ static int rt2800_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -5683,7 +5676,7 @@ static int rt2800_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
msleep(1); msleep(1);
for (i = 0; i < REGISTER_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2800_bbp_read(rt2x00dev, 0, &value); value = rt2800_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
...@@ -5697,7 +5690,7 @@ static void rt2800_bbp4_mac_if_ctrl(struct rt2x00_dev *rt2x00dev) ...@@ -5697,7 +5690,7 @@ static void rt2800_bbp4_mac_if_ctrl(struct rt2x00_dev *rt2x00dev)
{ {
u8 value; u8 value;
rt2800_bbp_read(rt2x00dev, 4, &value); value = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);
rt2800_bbp_write(rt2x00dev, 4, value); rt2800_bbp_write(rt2x00dev, 4, value);
} }
...@@ -5754,7 +5747,7 @@ static void rt2800_disable_unused_dac_adc(struct rt2x00_dev *rt2x00dev) ...@@ -5754,7 +5747,7 @@ static void rt2800_disable_unused_dac_adc(struct rt2x00_dev *rt2x00dev)
u16 eeprom; u16 eeprom;
u8 value; u8 value;
rt2800_bbp_read(rt2x00dev, 138, &value); value = rt2800_bbp_read(rt2x00dev, 138);
rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1) if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_TXPATH) == 1)
value |= 0x20; value |= 0x20;
...@@ -5938,12 +5931,12 @@ static void rt2800_init_bbp_3290(struct rt2x00_dev *rt2x00dev) ...@@ -5938,12 +5931,12 @@ static void rt2800_init_bbp_3290(struct rt2x00_dev *rt2x00dev)
rt2800_bbp_write(rt2x00dev, 155, 0x3b); rt2800_bbp_write(rt2x00dev, 155, 0x3b);
rt2800_bbp_write(rt2x00dev, 253, 0x04); rt2800_bbp_write(rt2x00dev, 253, 0x04);
rt2800_bbp_read(rt2x00dev, 47, &value); value = rt2800_bbp_read(rt2x00dev, 47);
rt2x00_set_field8(&value, BBP47_TSSI_ADC6, 1); rt2x00_set_field8(&value, BBP47_TSSI_ADC6, 1);
rt2800_bbp_write(rt2x00dev, 47, value); rt2800_bbp_write(rt2x00dev, 47, value);
/* Use 5-bit ADC for Acquisition and 8-bit ADC for data */ /* Use 5-bit ADC for Acquisition and 8-bit ADC for data */
rt2800_bbp_read(rt2x00dev, 3, &value); value = rt2800_bbp_read(rt2x00dev, 3);
rt2x00_set_field8(&value, BBP3_ADC_MODE_SWITCH, 1); rt2x00_set_field8(&value, BBP3_ADC_MODE_SWITCH, 1);
rt2x00_set_field8(&value, BBP3_ADC_INIT_MODE, 1); rt2x00_set_field8(&value, BBP3_ADC_INIT_MODE, 1);
rt2800_bbp_write(rt2x00dev, 3, value); rt2800_bbp_write(rt2x00dev, 3, value);
...@@ -6230,7 +6223,7 @@ static void rt2800_init_bbp_53xx(struct rt2x00_dev *rt2x00dev) ...@@ -6230,7 +6223,7 @@ static void rt2800_init_bbp_53xx(struct rt2x00_dev *rt2x00dev)
rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */ rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */
} }
rt2800_bbp_read(rt2x00dev, 152, &value); value = rt2800_bbp_read(rt2x00dev, 152);
if (ant == 0) if (ant == 0)
rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 1); rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 1);
else else
...@@ -6248,7 +6241,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev) ...@@ -6248,7 +6241,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev)
rt2800_init_bbp_early(rt2x00dev); rt2800_init_bbp_early(rt2x00dev);
rt2800_bbp_read(rt2x00dev, 105, &value); value = rt2800_bbp_read(rt2x00dev, 105);
rt2x00_set_field8(&value, BBP105_MLD, rt2x00_set_field8(&value, BBP105_MLD,
rt2x00dev->default_ant.rx_chain_num == 2); rt2x00dev->default_ant.rx_chain_num == 2);
rt2800_bbp_write(rt2x00dev, 105, value); rt2800_bbp_write(rt2x00dev, 105, value);
...@@ -6291,7 +6284,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev) ...@@ -6291,7 +6284,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev)
rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
div_mode = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_ANT_DIVERSITY); div_mode = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_ANT_DIVERSITY);
ant = (div_mode == 3) ? 1 : 0; ant = (div_mode == 3) ? 1 : 0;
rt2800_bbp_read(rt2x00dev, 152, &value); value = rt2800_bbp_read(rt2x00dev, 152);
if (ant == 0) { if (ant == 0) {
/* Main antenna */ /* Main antenna */
rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 1); rt2x00_set_field8(&value, BBP152_RX_DEFAULT_ANT, 1);
...@@ -6302,7 +6295,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev) ...@@ -6302,7 +6295,7 @@ static void rt2800_init_bbp_5592(struct rt2x00_dev *rt2x00dev)
rt2800_bbp_write(rt2x00dev, 152, value); rt2800_bbp_write(rt2x00dev, 152, value);
if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C)) { if (rt2x00_rt_rev_gte(rt2x00dev, RT5592, REV_RT5592C)) {
rt2800_bbp_read(rt2x00dev, 254, &value); value = rt2800_bbp_read(rt2x00dev, 254);
rt2x00_set_field8(&value, BBP254_BIT7, 1); rt2x00_set_field8(&value, BBP254_BIT7, 1);
rt2800_bbp_write(rt2x00dev, 254, value); rt2800_bbp_write(rt2x00dev, 254, value);
} }
...@@ -6328,11 +6321,10 @@ static void rt2800_bbp_dcoc_write(struct rt2x00_dev *rt2x00dev, ...@@ -6328,11 +6321,10 @@ static void rt2800_bbp_dcoc_write(struct rt2x00_dev *rt2x00dev,
rt2800_bbp_write(rt2x00dev, 159, value); rt2800_bbp_write(rt2x00dev, 159, value);
} }
static void rt2800_bbp_dcoc_read(struct rt2x00_dev *rt2x00dev, static u8 rt2800_bbp_dcoc_read(struct rt2x00_dev *rt2x00dev, const u8 reg)
const u8 reg, u8 *value)
{ {
rt2800_bbp_write(rt2x00dev, 158, reg); rt2800_bbp_write(rt2x00dev, 158, reg);
rt2800_bbp_read(rt2x00dev, 159, value); return rt2800_bbp_read(rt2x00dev, 159);
} }
static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev) static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
...@@ -6340,7 +6332,7 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev) ...@@ -6340,7 +6332,7 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
u8 bbp; u8 bbp;
/* Apply Maximum Likelihood Detection (MLD) for 2 stream case */ /* Apply Maximum Likelihood Detection (MLD) for 2 stream case */
rt2800_bbp_read(rt2x00dev, 105, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 105);
rt2x00_set_field8(&bbp, BBP105_MLD, rt2x00_set_field8(&bbp, BBP105_MLD,
rt2x00dev->default_ant.rx_chain_num == 2); rt2x00dev->default_ant.rx_chain_num == 2);
rt2800_bbp_write(rt2x00dev, 105, bbp); rt2800_bbp_write(rt2x00dev, 105, bbp);
...@@ -6349,7 +6341,7 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev) ...@@ -6349,7 +6341,7 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
rt2800_bbp4_mac_if_ctrl(rt2x00dev); rt2800_bbp4_mac_if_ctrl(rt2x00dev);
/* Fix I/Q swap issue */ /* Fix I/Q swap issue */
rt2800_bbp_read(rt2x00dev, 1, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 1);
bbp |= 0x04; bbp |= 0x04;
rt2800_bbp_write(rt2x00dev, 1, bbp); rt2800_bbp_write(rt2x00dev, 1, bbp);
...@@ -6622,7 +6614,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40, ...@@ -6622,7 +6614,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40,
rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24); rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
rt2800_bbp_read(rt2x00dev, 4, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
rt2800_bbp_write(rt2x00dev, 4, bbp); rt2800_bbp_write(rt2x00dev, 4, bbp);
...@@ -6643,7 +6635,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40, ...@@ -6643,7 +6635,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40,
rt2800_bbp_write(rt2x00dev, 25, 0x90); rt2800_bbp_write(rt2x00dev, 25, 0x90);
msleep(1); msleep(1);
rt2800_bbp_read(rt2x00dev, 55, &passband); passband = rt2800_bbp_read(rt2x00dev, 55);
if (passband) if (passband)
break; break;
} }
...@@ -6657,7 +6649,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40, ...@@ -6657,7 +6649,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40,
rt2800_bbp_write(rt2x00dev, 25, 0x90); rt2800_bbp_write(rt2x00dev, 25, 0x90);
msleep(1); msleep(1);
rt2800_bbp_read(rt2x00dev, 55, &stopband); stopband = rt2800_bbp_read(rt2x00dev, 55);
if ((passband - stopband) <= filter_target) { if ((passband - stopband) <= filter_target) {
rfcsr24++; rfcsr24++;
...@@ -6713,8 +6705,8 @@ static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev) ...@@ -6713,8 +6705,8 @@ static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev)
/* /*
* Save BBP 25 & 26 values for later use in channel switching (for 3052) * Save BBP 25 & 26 values for later use in channel switching (for 3052)
*/ */
rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); drv_data->bbp25 = rt2800_bbp_read(rt2x00dev, 25);
rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); drv_data->bbp26 = rt2800_bbp_read(rt2x00dev, 26);
/* /*
* Set back to initial state * Set back to initial state
...@@ -6728,7 +6720,7 @@ static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev) ...@@ -6728,7 +6720,7 @@ static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev)
/* /*
* Set BBP back to BW20 * Set BBP back to BW20
*/ */
rt2800_bbp_read(rt2x00dev, 4, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
rt2800_bbp_write(rt2x00dev, 4, bbp); rt2800_bbp_write(rt2x00dev, 4, bbp);
} }
...@@ -6760,7 +6752,7 @@ static void rt2800_normal_mode_setup_3xxx(struct rt2x00_dev *rt2x00dev) ...@@ -6760,7 +6752,7 @@ static void rt2800_normal_mode_setup_3xxx(struct rt2x00_dev *rt2x00dev)
if (rt2x00_rt(rt2x00dev, RT3090)) { if (rt2x00_rt(rt2x00dev, RT3090)) {
/* Turn off unused DAC1 and ADC1 to reduce power consumption */ /* Turn off unused DAC1 and ADC1 to reduce power consumption */
rt2800_bbp_read(rt2x00dev, 138, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 138);
rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1) if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0); rt2x00_set_field8(&bbp, BBP138_RX_ADC1, 0);
...@@ -6846,7 +6838,7 @@ static void rt2800_normal_mode_setup_5xxx(struct rt2x00_dev *rt2x00dev) ...@@ -6846,7 +6838,7 @@ static void rt2800_normal_mode_setup_5xxx(struct rt2x00_dev *rt2x00dev)
u16 eeprom; u16 eeprom;
/* Turn off unused DAC1 and ADC1 to reduce power consumption */ /* Turn off unused DAC1 and ADC1 to reduce power consumption */
rt2800_bbp_read(rt2x00dev, 138, &reg); reg = rt2800_bbp_read(rt2x00dev, 138);
rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1) if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RXPATH) == 1)
rt2x00_set_field8(&reg, BBP138_RX_ADC1, 0); rt2x00_set_field8(&reg, BBP138_RX_ADC1, 0);
...@@ -7253,7 +7245,7 @@ static void rt3593_post_bbp_init(struct rt2x00_dev *rt2x00dev) ...@@ -7253,7 +7245,7 @@ static void rt3593_post_bbp_init(struct rt2x00_dev *rt2x00dev)
u8 bbp; u8 bbp;
bool txbf_enabled = false; /* FIXME */ bool txbf_enabled = false; /* FIXME */
rt2800_bbp_read(rt2x00dev, 105, &bbp); bbp = rt2800_bbp_read(rt2x00dev, 105);
if (rt2x00dev->default_ant.rx_chain_num == 1) if (rt2x00dev->default_ant.rx_chain_num == 1)
rt2x00_set_field8(&bbp, BBP105_MLD, 0); rt2x00_set_field8(&bbp, BBP105_MLD, 0);
else else
...@@ -7367,8 +7359,8 @@ static void rt2800_init_rfcsr_3593(struct rt2x00_dev *rt2x00dev) ...@@ -7367,8 +7359,8 @@ static void rt2800_init_rfcsr_3593(struct rt2x00_dev *rt2x00dev)
drv_data->calibration_bw40 = 0x2f; drv_data->calibration_bw40 = 0x2f;
/* Save BBP 25 & 26 values for later use in channel switching */ /* Save BBP 25 & 26 values for later use in channel switching */
rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); drv_data->bbp25 = rt2800_bbp_read(rt2x00dev, 25);
rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); drv_data->bbp26 = rt2800_bbp_read(rt2x00dev, 26);
rt2800_led_open_drain_enable(rt2x00dev); rt2800_led_open_drain_enable(rt2x00dev);
rt2800_normal_mode_setup_3593(rt2x00dev); rt2800_normal_mode_setup_3593(rt2x00dev);
...@@ -7662,19 +7654,19 @@ static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev, ...@@ -7662,19 +7654,19 @@ static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
{ {
u8 bbp_val; u8 bbp_val;
rt2800_bbp_read(rt2x00dev, 21, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 21);
bbp_val |= 0x1; bbp_val |= 0x1;
rt2800_bbp_write(rt2x00dev, 21, bbp_val); rt2800_bbp_write(rt2x00dev, 21, bbp_val);
usleep_range(100, 200); usleep_range(100, 200);
if (set_bw) { if (set_bw) {
rt2800_bbp_read(rt2x00dev, 4, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH, 2 * is_ht40); rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH, 2 * is_ht40);
rt2800_bbp_write(rt2x00dev, 4, bbp_val); rt2800_bbp_write(rt2x00dev, 4, bbp_val);
usleep_range(100, 200); usleep_range(100, 200);
} }
rt2800_bbp_read(rt2x00dev, 21, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 21);
bbp_val &= (~0x1); bbp_val &= (~0x1);
rt2800_bbp_write(rt2x00dev, 21, bbp_val); rt2800_bbp_write(rt2x00dev, 21, bbp_val);
usleep_range(100, 200); usleep_range(100, 200);
...@@ -7736,14 +7728,14 @@ static char rt2800_lp_tx_filter_bw_cal(struct rt2x00_dev *rt2x00dev) ...@@ -7736,14 +7728,14 @@ static char rt2800_lp_tx_filter_bw_cal(struct rt2x00_dev *rt2x00dev)
cnt = 0; cnt = 0;
do { do {
usleep_range(500, 2000); usleep_range(500, 2000);
rt2800_bbp_read(rt2x00dev, 159, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 159);
if (bbp_val == 0x02 || cnt == 20) if (bbp_val == 0x02 || cnt == 20)
break; break;
cnt++; cnt++;
} while (cnt < 20); } while (cnt < 20);
rt2800_bbp_dcoc_read(rt2x00dev, 0x39, &bbp_val); bbp_val = rt2800_bbp_dcoc_read(rt2x00dev, 0x39);
cal_val = bbp_val & 0x7F; cal_val = bbp_val & 0x7F;
if (cal_val >= 0x40) if (cal_val >= 0x40)
cal_val -= 128; cal_val -= 128;
...@@ -7776,10 +7768,10 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev, ...@@ -7776,10 +7768,10 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0); MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
/* save BBP registers */ /* save BBP registers */
rt2800_bbp_read(rt2x00dev, 23, &savebbpr23); savebbpr23 = rt2800_bbp_read(rt2x00dev, 23);
rt2800_bbp_dcoc_read(rt2x00dev, 0, &savebbp159r0); savebbp159r0 = rt2800_bbp_dcoc_read(rt2x00dev, 0);
rt2800_bbp_dcoc_read(rt2x00dev, 2, &savebbp159r2); savebbp159r2 = rt2800_bbp_dcoc_read(rt2x00dev, 2);
/* Save RF registers */ /* Save RF registers */
saverfb5r00 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 0); saverfb5r00 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 0);
...@@ -7832,7 +7824,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev, ...@@ -7832,7 +7824,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val); rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val);
/* I-3 */ /* I-3 */
rt2800_bbp_read(rt2x00dev, 23, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 23);
bbp_val &= (~0x1F); bbp_val &= (~0x1F);
bbp_val |= 0x10; bbp_val |= 0x10;
rt2800_bbp_write(rt2x00dev, 23, bbp_val); rt2800_bbp_write(rt2x00dev, 23, bbp_val);
...@@ -7885,7 +7877,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev, ...@@ -7885,7 +7877,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
usleep_range(1000, 2000); usleep_range(1000, 2000);
rt2800_bbp_dcoc_read(rt2x00dev, 2, &bbp_val); bbp_val = rt2800_bbp_dcoc_read(rt2x00dev, 2);
bbp_val &= (~0x6); bbp_val &= (~0x6);
rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val); rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val);
...@@ -7893,7 +7885,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev, ...@@ -7893,7 +7885,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
cal_r32_init = rt2800_lp_tx_filter_bw_cal(rt2x00dev); cal_r32_init = rt2800_lp_tx_filter_bw_cal(rt2x00dev);
rt2800_bbp_dcoc_read(rt2x00dev, 2, &bbp_val); bbp_val = rt2800_bbp_dcoc_read(rt2x00dev, 2);
bbp_val |= 0x6; bbp_val |= 0x6;
rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val); rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val);
do_cal: do_cal:
...@@ -7991,7 +7983,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev, ...@@ -7991,7 +7983,7 @@ static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
rt2800_bbp_dcoc_write(rt2x00dev, 0, savebbp159r0); rt2800_bbp_dcoc_write(rt2x00dev, 0, savebbp159r0);
rt2800_bbp_dcoc_write(rt2x00dev, 2, savebbp159r2); rt2800_bbp_dcoc_write(rt2x00dev, 2, savebbp159r2);
rt2800_bbp_read(rt2x00dev, 4, &bbp_val); bbp_val = rt2800_bbp_read(rt2x00dev, 4);
rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH, rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH,
2 * test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags)); 2 * test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags));
rt2800_bbp_write(rt2x00dev, 4, bbp_val); rt2800_bbp_write(rt2x00dev, 4, bbp_val);
......
...@@ -86,10 +86,11 @@ static void rt61pci_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -86,10 +86,11 @@ static void rt61pci_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value) const unsigned int word)
{ {
u32 reg; u32 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -112,9 +113,11 @@ static void rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -112,9 +113,11 @@ static void rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev,
WAIT_FOR_BBP(rt2x00dev, &reg); WAIT_FOR_BBP(rt2x00dev, &reg);
} }
*value = rt2x00_get_field32(reg, PHY_CSR3_VALUE); value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt61pci_rf_write(struct rt2x00_dev *rt2x00dev, static void rt61pci_rf_write(struct rt2x00_dev *rt2x00dev,
...@@ -202,15 +205,6 @@ static void rt61pci_eepromregister_write(struct eeprom_93cx6 *eeprom) ...@@ -202,15 +205,6 @@ static void rt61pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
} }
#ifdef CONFIG_RT2X00_LIB_DEBUGFS #ifdef CONFIG_RT2X00_LIB_DEBUGFS
static u8 _rt61pci_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int word)
{
u8 value;
rt61pci_bbp_read(rt2x00dev, word, &value);
return value;
}
static const struct rt2x00debug rt61pci_rt2x00debug = { static const struct rt2x00debug rt61pci_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -229,7 +223,7 @@ static const struct rt2x00debug rt61pci_rt2x00debug = { ...@@ -229,7 +223,7 @@ static const struct rt2x00debug rt61pci_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt61pci_bbp_read, .read = rt61pci_bbp_read,
.write = rt61pci_bbp_write, .write = rt61pci_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -639,9 +633,9 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev, ...@@ -639,9 +633,9 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
u8 r4; u8 r4;
u8 r77; u8 r77;
rt61pci_bbp_read(rt2x00dev, 3, &r3); r3 = rt61pci_bbp_read(rt2x00dev, 3);
rt61pci_bbp_read(rt2x00dev, 4, &r4); r4 = rt61pci_bbp_read(rt2x00dev, 4);
rt61pci_bbp_read(rt2x00dev, 77, &r77); r77 = rt61pci_bbp_read(rt2x00dev, 77);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF5325)); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF5325));
...@@ -685,9 +679,9 @@ static void rt61pci_config_antenna_2x(struct rt2x00_dev *rt2x00dev, ...@@ -685,9 +679,9 @@ static void rt61pci_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
u8 r4; u8 r4;
u8 r77; u8 r77;
rt61pci_bbp_read(rt2x00dev, 3, &r3); r3 = rt61pci_bbp_read(rt2x00dev, 3);
rt61pci_bbp_read(rt2x00dev, 4, &r4); r4 = rt61pci_bbp_read(rt2x00dev, 4);
rt61pci_bbp_read(rt2x00dev, 77, &r77); r77 = rt61pci_bbp_read(rt2x00dev, 77);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529)); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529));
rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
...@@ -739,9 +733,9 @@ static void rt61pci_config_antenna_2529(struct rt2x00_dev *rt2x00dev, ...@@ -739,9 +733,9 @@ static void rt61pci_config_antenna_2529(struct rt2x00_dev *rt2x00dev,
u8 r4; u8 r4;
u8 r77; u8 r77;
rt61pci_bbp_read(rt2x00dev, 3, &r3); r3 = rt61pci_bbp_read(rt2x00dev, 3);
rt61pci_bbp_read(rt2x00dev, 4, &r4); r4 = rt61pci_bbp_read(rt2x00dev, 4);
rt61pci_bbp_read(rt2x00dev, 77, &r77); r77 = rt61pci_bbp_read(rt2x00dev, 77);
/* /*
* Configure the RX antenna. * Configure the RX antenna.
...@@ -884,7 +878,7 @@ static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev, ...@@ -884,7 +878,7 @@ static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527)); smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
rt61pci_bbp_read(rt2x00dev, 3, &r3); r3 = rt61pci_bbp_read(rt2x00dev, 3);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
rt61pci_bbp_write(rt2x00dev, 3, r3); rt61pci_bbp_write(rt2x00dev, 3, r3);
...@@ -1658,7 +1652,7 @@ static int rt61pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -1658,7 +1652,7 @@ static int rt61pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
u8 value; u8 value;
for (i = 0; i < REGISTER_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt61pci_bbp_read(rt2x00dev, 0, &value); value = rt61pci_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
......
...@@ -84,10 +84,11 @@ static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev, ...@@ -84,10 +84,11 @@ static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
} }
static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, static u8 rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value) const unsigned int word)
{ {
u32 reg; u32 reg;
u8 value;
mutex_lock(&rt2x00dev->csr_mutex); mutex_lock(&rt2x00dev->csr_mutex);
...@@ -110,9 +111,11 @@ static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, ...@@ -110,9 +111,11 @@ static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
WAIT_FOR_BBP(rt2x00dev, &reg); WAIT_FOR_BBP(rt2x00dev, &reg);
} }
*value = rt2x00_get_field32(reg, PHY_CSR3_VALUE); value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
mutex_unlock(&rt2x00dev->csr_mutex); mutex_unlock(&rt2x00dev->csr_mutex);
return value;
} }
static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev, static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
...@@ -147,15 +150,6 @@ static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev, ...@@ -147,15 +150,6 @@ static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
} }
#ifdef CONFIG_RT2X00_LIB_DEBUGFS #ifdef CONFIG_RT2X00_LIB_DEBUGFS
static u8 _rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int word)
{
u8 value;
rt73usb_bbp_read(rt2x00dev, word, &value);
return value;
}
static const struct rt2x00debug rt73usb_rt2x00debug = { static const struct rt2x00debug rt73usb_rt2x00debug = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.csr = { .csr = {
...@@ -174,7 +168,7 @@ static const struct rt2x00debug rt73usb_rt2x00debug = { ...@@ -174,7 +168,7 @@ static const struct rt2x00debug rt73usb_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16), .word_count = EEPROM_SIZE / sizeof(u16),
}, },
.bbp = { .bbp = {
.read = _rt73usb_bbp_read, .read = rt73usb_bbp_read,
.write = rt73usb_bbp_write, .write = rt73usb_bbp_write,
.word_base = BBP_BASE, .word_base = BBP_BASE,
.word_size = sizeof(u8), .word_size = sizeof(u8),
...@@ -589,9 +583,9 @@ static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev, ...@@ -589,9 +583,9 @@ static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
u8 r77; u8 r77;
u8 temp; u8 temp;
rt73usb_bbp_read(rt2x00dev, 3, &r3); r3 = rt73usb_bbp_read(rt2x00dev, 3);
rt73usb_bbp_read(rt2x00dev, 4, &r4); r4 = rt73usb_bbp_read(rt2x00dev, 4);
rt73usb_bbp_read(rt2x00dev, 77, &r77); r77 = rt73usb_bbp_read(rt2x00dev, 77);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
...@@ -636,9 +630,9 @@ static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev, ...@@ -636,9 +630,9 @@ static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
u8 r4; u8 r4;
u8 r77; u8 r77;
rt73usb_bbp_read(rt2x00dev, 3, &r3); r3 = rt73usb_bbp_read(rt2x00dev, 3);
rt73usb_bbp_read(rt2x00dev, 4, &r4); r4 = rt73usb_bbp_read(rt2x00dev, 4);
rt73usb_bbp_read(rt2x00dev, 77, &r77); r77 = rt73usb_bbp_read(rt2x00dev, 77);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
...@@ -771,7 +765,7 @@ static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev, ...@@ -771,7 +765,7 @@ static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527)); smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
rt73usb_bbp_read(rt2x00dev, 3, &r3); r3 = rt73usb_bbp_read(rt2x00dev, 3);
rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart); rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
rt73usb_bbp_write(rt2x00dev, 3, r3); rt73usb_bbp_write(rt2x00dev, 3, r3);
...@@ -1305,7 +1299,7 @@ static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) ...@@ -1305,7 +1299,7 @@ static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
u8 value; u8 value;
for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) { for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
rt73usb_bbp_read(rt2x00dev, 0, &value); value = rt73usb_bbp_read(rt2x00dev, 0);
if ((value != 0xff) && (value != 0x00)) if ((value != 0xff) && (value != 0x00))
return 0; return 0;
udelay(REGISTER_BUSY_DELAY); udelay(REGISTER_BUSY_DELAY);
......
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