x86: block irq balancing for timer
Disable irq balancing on IRQ0. Several SIS chipsets lock up when you try to change affinity of IRQ #0. Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: NAndi Kleen <ak@suse.de> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
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