提交 5d55f299 编写于 作者: W Wei Yongjun 提交者: Avi Kivity

KVM: x86 emulator: re-implementing 'mov AL,moffs' instruction decoding

This patch change to use DstAcc for decoding 'mov AL, moffs'
and introduced SrcAcc for decoding 'mov moffs, AL'.
Signed-off-by: NWei Yongjun <yjwei@cn.fujitsu.com>
Signed-off-by: NAvi Kivity <avi@redhat.com>
上级 07cbc6c1
...@@ -70,6 +70,7 @@ ...@@ -70,6 +70,7 @@
#define SrcSI (0xa<<4) /* Source is in the DS:RSI */ #define SrcSI (0xa<<4) /* Source is in the DS:RSI */
#define SrcImmFAddr (0xb<<4) /* Source is immediate far address */ #define SrcImmFAddr (0xb<<4) /* Source is immediate far address */
#define SrcMemFAddr (0xc<<4) /* Source is far address in memory */ #define SrcMemFAddr (0xc<<4) /* Source is far address in memory */
#define SrcAcc (0xd<<4) /* Source Accumulator */
#define SrcMask (0xf<<4) #define SrcMask (0xf<<4)
/* Generic ModRM decode. */ /* Generic ModRM decode. */
#define ModRM (1<<8) #define ModRM (1<<8)
...@@ -177,8 +178,8 @@ static u32 opcode_table[256] = { ...@@ -177,8 +178,8 @@ static u32 opcode_table[256] = {
0, 0, SrcImmFAddr | No64, 0, 0, 0, SrcImmFAddr | No64, 0,
ImplicitOps | Stack, ImplicitOps | Stack, 0, 0, ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
/* 0xA0 - 0xA7 */ /* 0xA0 - 0xA7 */
ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs, ByteOp | DstAcc | SrcMem | Mov | MemAbs, DstAcc | SrcMem | Mov | MemAbs,
ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs, ByteOp | DstMem | SrcAcc | Mov | MemAbs, DstMem | SrcAcc | Mov | MemAbs,
ByteOp | SrcSI | DstDI | Mov | String, SrcSI | DstDI | Mov | String, ByteOp | SrcSI | DstDI | Mov | String, SrcSI | DstDI | Mov | String,
ByteOp | SrcSI | DstDI | String, SrcSI | DstDI | String, ByteOp | SrcSI | DstDI | String, SrcSI | DstDI | String,
/* 0xA8 - 0xAF */ /* 0xA8 - 0xAF */
...@@ -1186,6 +1187,25 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) ...@@ -1186,6 +1187,25 @@ x86_decode_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
else else
c->src.val = insn_fetch(u8, 1, c->eip); c->src.val = insn_fetch(u8, 1, c->eip);
break; break;
case SrcAcc:
c->src.type = OP_REG;
c->src.bytes = (c->d & ByteOp) ? 1 : c->op_bytes;
c->src.ptr = &c->regs[VCPU_REGS_RAX];
switch (c->src.bytes) {
case 1:
c->src.val = *(u8 *)c->src.ptr;
break;
case 2:
c->src.val = *(u16 *)c->src.ptr;
break;
case 4:
c->src.val = *(u32 *)c->src.ptr;
break;
case 8:
c->src.val = *(u64 *)c->src.ptr;
break;
}
break;
case SrcOne: case SrcOne:
c->src.bytes = 1; c->src.bytes = 1;
c->src.val = 1; c->src.val = 1;
...@@ -2854,13 +2874,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) ...@@ -2854,13 +2874,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
if (rc != X86EMUL_CONTINUE) if (rc != X86EMUL_CONTINUE)
goto done; goto done;
break; break;
case 0xa0 ... 0xa1: /* mov */ case 0xa0 ... 0xa3: /* mov */
c->dst.ptr = (unsigned long *)&c->regs[VCPU_REGS_RAX];
c->dst.val = c->src.val;
break;
case 0xa2 ... 0xa3: /* mov */
c->dst.val = (unsigned long)c->regs[VCPU_REGS_RAX];
break;
case 0xa4 ... 0xa5: /* movs */ case 0xa4 ... 0xa5: /* movs */
goto mov; goto mov;
case 0xa6 ... 0xa7: /* cmps */ case 0xa6 ... 0xa7: /* cmps */
......
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