提交 5a0c7fb5 编写于 作者: M Madhavan Srinivasan 提交者: Greg Kroah-Hartman

powerpc/perf: Fix thresholding counter data for unknown type

[ Upstream commit 17cfccc91545682513541924245abb876d296063 ]

MMCRA[34:36] and MMCRA[38:44] expose the thresholding counter value.
Thresholding counter can be used to count latency cycles such as
load miss to reload. But threshold counter value is not relevant
when the sampled instruction type is unknown or reserved. Patch to
fix the thresholding counter value to zero when sampled instruction
type is unknown or reserved.

Fixes: 170a315f('powerpc/perf: Support to export MMCRA[TEC*] field to userspace')
Signed-off-by: NMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
Signed-off-by: NSasha Levin <sashal@kernel.org>
上级 d5e2df9f
...@@ -226,8 +226,13 @@ void isa207_get_mem_weight(u64 *weight) ...@@ -226,8 +226,13 @@ void isa207_get_mem_weight(u64 *weight)
u64 mmcra = mfspr(SPRN_MMCRA); u64 mmcra = mfspr(SPRN_MMCRA);
u64 exp = MMCRA_THR_CTR_EXP(mmcra); u64 exp = MMCRA_THR_CTR_EXP(mmcra);
u64 mantissa = MMCRA_THR_CTR_MANT(mmcra); u64 mantissa = MMCRA_THR_CTR_MANT(mmcra);
u64 sier = mfspr(SPRN_SIER);
u64 val = (sier & ISA207_SIER_TYPE_MASK) >> ISA207_SIER_TYPE_SHIFT;
*weight = mantissa << (2 * exp); if (val == 0 || val == 7)
*weight = 0;
else
*weight = mantissa << (2 * exp);
} }
int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp)
......
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