MIPS: mark R4K clockevent device with CLOCK_EVT_FEAT_C3STOP
When a core enters a clock off or power down state its CP0 counter will
be stopped along with it.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
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When a core enters a clock off or power down state its CP0 counter will
be stopped along with it.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>