提交 57886616 编写于 作者: J Joseph Lo 提交者: Stephen Warren

ARM: tegra: update the cache maintenance order for CPU shutdown

Updating the cache maintenance order before CPU shutdown when doing CPU
hotplug.
The old order:
* clean L1 by flush_cache_all
* exit SMP
* CPU shutdown
Adapt to:
* disable L1 data cache by clear C bit
* clean L1 by v7_flush_dcache_louis
* exit SMP
* CPU shutdown

For CPU hotplug case, it's no need to do "flush_cache_all". And we should
disable L1 data cache before clean L1 data cache. Then leaving the SMP
coherency.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>
上级 130bfed7
......@@ -28,8 +28,8 @@ void __ref tegra_cpu_die(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
/* Flush the L1 data cache. */
flush_cache_all();
/* Clean L1 data cache */
tegra_disable_clean_inv_dcache();
/* Shut down the current CPU. */
tegra_hotplug_shutdown();
......
......@@ -33,9 +33,6 @@
* should never return
*/
ENTRY(tegra20_hotplug_shutdown)
/* Turn off SMP coherency */
exit_smp r4, r5
/* Put this CPU down */
cpu_id r0
bl tegra20_cpu_shutdown
......
......@@ -32,9 +32,6 @@
* Should never return.
*/
ENTRY(tegra30_hotplug_shutdown)
/* Turn off SMP coherency */
exit_smp r4, r5
/* Powergate this CPU */
mov r0, #TEGRA30_POWER_HOTPLUG_SHUTDOWN
bl tegra30_cpu_shutdown
......
......@@ -34,7 +34,7 @@
#include "flowctrl.h"
#include "sleep.h"
#ifdef CONFIG_PM_SLEEP
#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
/*
* tegra_disable_clean_inv_dcache
*
......@@ -60,7 +60,9 @@ ENTRY(tegra_disable_clean_inv_dcache)
ldmfd sp!, {r0, r4-r5, r7, r9-r11, pc}
ENDPROC(tegra_disable_clean_inv_dcache)
#endif
#ifdef CONFIG_PM_SLEEP
/*
* tegra_sleep_cpu_finish(unsigned long v2p)
*
......
......@@ -106,6 +106,7 @@
#else
void tegra_resume(void);
int tegra_sleep_cpu_finish(unsigned long);
void tegra_disable_clean_inv_dcache(void);
#ifdef CONFIG_HOTPLUG_CPU
void tegra20_hotplug_init(void);
......
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