Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openanolis
cloud-kernel
提交
56d604de
cloud-kernel
项目概览
openanolis
/
cloud-kernel
1 年多 前同步成功
通知
160
Star
36
Fork
7
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
10
列表
看板
标记
里程碑
合并请求
2
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
cloud-kernel
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
10
Issue
10
列表
看板
标记
里程碑
合并请求
2
合并请求
2
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
提交
56d604de
编写于
3月 06, 2009
作者:
P
Paul Mundt
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
sh: multiple vectors per irq - sh7710.
Signed-off-by:
N
Paul Mundt
<
lethal@linux-sh.org
>
上级
0caedb02
变更
1
隐藏空白更改
内联
并排
Showing
1 changed file
with
21 addition
and
48 deletion
+21
-48
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
+21
-48
未找到文件。
arch/sh/kernel/cpu/sh3/setup-sh7710.c
浏览文件 @
56d604de
/*
* SH3 Setup code for SH7710, SH7712
*
* Copyright (C) 2006
, 2007
Paul Mundt
* Copyright (C) 2006
- 2009
Paul Mundt
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
...
...
@@ -20,59 +20,40 @@ enum {
/* interrupt sources */
IRQ0
,
IRQ1
,
IRQ2
,
IRQ3
,
IRQ4
,
IRQ5
,
DMAC_DEI0
,
DMAC_DEI1
,
DMAC_DEI2
,
DMAC_DEI3
,
SCIF0_ERI
,
SCIF0_RXI
,
SCIF0_BRI
,
SCIF0_TXI
,
SCIF1_ERI
,
SCIF1_RXI
,
SCIF1_BRI
,
SCIF1_TXI
,
DMAC_DEI4
,
DMAC_DEI5
,
IPSEC
,
DMAC1
,
SCIF0
,
SCIF1
,
DMAC2
,
IPSEC
,
EDMAC0
,
EDMAC1
,
EDMAC2
,
SIOF0_ERI
,
SIOF0_TXI
,
SIOF0_RXI
,
SIOF0_CCI
,
SIOF1_ERI
,
SIOF1_TXI
,
SIOF1_RXI
,
SIOF1_CCI
,
TMU0
,
TMU1
,
TMU2
,
RTC_ATI
,
RTC_PRI
,
RTC_CUI
,
WDT
,
REF
,
SIOF0
,
SIOF1
,
/* interrupt groups */
RTC
,
DMAC1
,
SCIF0
,
SCIF1
,
DMAC2
,
SIOF0
,
SIOF1
,
TMU0
,
TMU1
,
TMU2
,
RTC
,
WDT
,
REF
,
};
static
struct
intc_vect
vectors
[]
__initdata
=
{
/* IRQ0->5 are handled in setup-sh3.c */
INTC_VECT
(
DMAC
_DEI0
,
0x800
),
INTC_VECT
(
DMAC_DEI
1
,
0x820
),
INTC_VECT
(
DMAC
_DEI2
,
0x840
),
INTC_VECT
(
DMAC_DEI3
,
0x860
),
INTC_VECT
(
SCIF0
_ERI
,
0x880
),
INTC_VECT
(
SCIF0_RXI
,
0x8a0
),
INTC_VECT
(
SCIF0
_BRI
,
0x8c0
),
INTC_VECT
(
SCIF0_TXI
,
0x8e0
),
INTC_VECT
(
SCIF1
_ERI
,
0x900
),
INTC_VECT
(
SCIF1_RXI
,
0x920
),
INTC_VECT
(
SCIF1
_BRI
,
0x940
),
INTC_VECT
(
SCIF1_TXI
,
0x960
),
INTC_VECT
(
DMAC
_DEI4
,
0xb80
),
INTC_VECT
(
DMAC_DEI5
,
0xba0
),
INTC_VECT
(
DMAC
1
,
0x800
),
INTC_VECT
(
DMAC
1
,
0x820
),
INTC_VECT
(
DMAC
1
,
0x840
),
INTC_VECT
(
DMAC1
,
0x860
),
INTC_VECT
(
SCIF0
,
0x880
),
INTC_VECT
(
SCIF0
,
0x8a0
),
INTC_VECT
(
SCIF0
,
0x8c0
),
INTC_VECT
(
SCIF0
,
0x8e0
),
INTC_VECT
(
SCIF1
,
0x900
),
INTC_VECT
(
SCIF1
,
0x920
),
INTC_VECT
(
SCIF1
,
0x940
),
INTC_VECT
(
SCIF1
,
0x960
),
INTC_VECT
(
DMAC
2
,
0xb80
),
INTC_VECT
(
DMAC2
,
0xba0
),
#ifdef CONFIG_CPU_SUBTYPE_SH7710
INTC_VECT
(
IPSEC
,
0xbe0
),
#endif
INTC_VECT
(
EDMAC0
,
0xc00
),
INTC_VECT
(
EDMAC1
,
0xc20
),
INTC_VECT
(
EDMAC2
,
0xc40
),
INTC_VECT
(
SIOF0
_ERI
,
0xe00
),
INTC_VECT
(
SIOF0_TXI
,
0xe20
),
INTC_VECT
(
SIOF0
_RXI
,
0xe40
),
INTC_VECT
(
SIOF0_CCI
,
0xe60
),
INTC_VECT
(
SIOF1
_ERI
,
0xe80
),
INTC_VECT
(
SIOF1_TXI
,
0xea0
),
INTC_VECT
(
SIOF1
_RXI
,
0xec0
),
INTC_VECT
(
SIOF1_CCI
,
0xee0
),
INTC_VECT
(
SIOF0
,
0xe00
),
INTC_VECT
(
SIOF0
,
0xe20
),
INTC_VECT
(
SIOF0
,
0xe40
),
INTC_VECT
(
SIOF0
,
0xe60
),
INTC_VECT
(
SIOF1
,
0xe80
),
INTC_VECT
(
SIOF1
,
0xea0
),
INTC_VECT
(
SIOF1
,
0xec0
),
INTC_VECT
(
SIOF1
,
0xee0
),
INTC_VECT
(
TMU0
,
0x400
),
INTC_VECT
(
TMU1
,
0x420
),
INTC_VECT
(
TMU2
,
0x440
),
INTC_VECT
(
RTC
_ATI
,
0x480
),
INTC_VECT
(
RTC_PRI
,
0x4a0
),
INTC_VECT
(
RTC
_CUI
,
0x4c0
),
INTC_VECT
(
RTC
,
0x480
),
INTC_VECT
(
RTC
,
0x4a0
),
INTC_VECT
(
RTC
,
0x4c0
),
INTC_VECT
(
WDT
,
0x560
),
INTC_VECT
(
REF
,
0x580
),
};
static
struct
intc_group
groups
[]
__initdata
=
{
INTC_GROUP
(
RTC
,
RTC_ATI
,
RTC_PRI
,
RTC_CUI
),
INTC_GROUP
(
DMAC1
,
DMAC_DEI0
,
DMAC_DEI1
,
DMAC_DEI2
,
DMAC_DEI3
),
INTC_GROUP
(
SCIF0
,
SCIF0_ERI
,
SCIF0_RXI
,
SCIF0_BRI
,
SCIF0_TXI
),
INTC_GROUP
(
SCIF1
,
SCIF1_ERI
,
SCIF1_RXI
,
SCIF1_BRI
,
SCIF1_TXI
),
INTC_GROUP
(
DMAC2
,
DMAC_DEI4
,
DMAC_DEI5
),
INTC_GROUP
(
SIOF0
,
SIOF0_ERI
,
SIOF0_TXI
,
SIOF0_RXI
,
SIOF0_CCI
),
INTC_GROUP
(
SIOF1
,
SIOF1_ERI
,
SIOF1_TXI
,
SIOF1_RXI
,
SIOF1_CCI
),
};
static
struct
intc_prio_reg
prio_registers
[]
__initdata
=
{
{
0xfffffee2
,
0
,
16
,
4
,
/* IPRA */
{
TMU0
,
TMU1
,
TMU2
,
RTC
}
},
{
0xfffffee4
,
0
,
16
,
4
,
/* IPRB */
{
WDT
,
REF
,
0
,
0
}
},
...
...
@@ -85,7 +66,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
{
0xa4080006
,
0
,
16
,
4
,
/* IPRI */
{
0
,
0
,
SIOF1
}
},
};
static
DECLARE_INTC_DESC
(
intc_desc
,
"sh7710"
,
vectors
,
groups
,
static
DECLARE_INTC_DESC
(
intc_desc
,
"sh7710"
,
vectors
,
NULL
,
NULL
,
prio_registers
,
NULL
);
static
struct
resource
rtc_resources
[]
=
{
...
...
@@ -98,14 +79,6 @@ static struct resource rtc_resources[] = {
.
start
=
20
,
.
flags
=
IORESOURCE_IRQ
,
},
[
2
]
=
{
.
start
=
21
,
.
flags
=
IORESOURCE_IRQ
,
},
[
3
]
=
{
.
start
=
22
,
.
flags
=
IORESOURCE_IRQ
,
},
};
static
struct
sh_rtc_platform_info
rtc_info
=
{
...
...
@@ -127,12 +100,12 @@ static struct plat_sci_port sci_platform_data[] = {
.
mapbase
=
0xa4400000
,
.
flags
=
UPF_BOOT_AUTOCONF
,
.
type
=
PORT_SCIF
,
.
irqs
=
{
52
,
5
3
,
55
,
54
},
.
irqs
=
{
52
,
5
2
,
52
,
52
},
},
{
.
mapbase
=
0xa4410000
,
.
flags
=
UPF_BOOT_AUTOCONF
,
.
type
=
PORT_SCIF
,
.
irqs
=
{
56
,
5
7
,
59
,
58
},
.
irqs
=
{
56
,
5
6
,
56
,
56
},
},
{
.
flags
=
0
,
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录