Use an irq_enable_hazard hazard barrier in unmask_mips_irq. This

hasn't been an actual bug, so it's more a change to be 100% compliant
with the requirements of the architecture spec.  Similar fix to
mask_mips_irq where there was a slightly less theoretical chance of
getting hit.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/kernel/irq_cpu.c

@@ -40,11 +40,13 @@ static int mips_cpu_irq_base;
 static inline void unmask_mips_irq(unsigned int irq)
 {
 	set_c0_status(0x100 << (irq - mips_cpu_irq_base));
+	irq_enable_hazard();
 }
 
 static inline void mask_mips_irq(unsigned int irq)
 {
 	clear_c0_status(0x100 << (irq - mips_cpu_irq_base));
+	irq_disable_hazard();
 }
 
 static inline void mips_cpu_irq_enable(unsigned int irq)