ASoC: Intel: bxtn: Disable interrupt when DSP is in D3
When DSP is in D3, no interrupts are expected, so disable interrupt while entering D3. Signed-off-by: NJeeja KP <jeeja.kp@intel.com> Acked-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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