提交 51b8dc51 编写于 作者: S Sakari Ailus 提交者: Mauro Carvalho Chehab

media: staging: atomisp: Remove driver

The atomisp driver has a long list of todo items and little has been done
to address these lately while more has been added. The driver is also not
functional. In other words, the driver would not be getting out of staging
in the foreseeable future. At the same time it consumes developer
resources in order to maintain the flaky code base. Remove it.
Signed-off-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
上级 6522aa1b
......@@ -13272,13 +13272,6 @@ L: stable@vger.kernel.org
S: Supported
F: Documentation/process/stable-kernel-rules.rst
STAGING - ATOMISP DRIVER
M: Alan Cox <alan@linux.intel.com>
M: Sakari Ailus <sakari.ailus@linux.intel.com>
L: linux-media@vger.kernel.org
S: Maintained
F: drivers/staging/media/atomisp/
STAGING - COMEDI
M: Ian Abbott <abbotti@mev.co.uk>
M: H Hartley Sweeten <hsweeten@visionengravers.com>
......
......@@ -19,8 +19,6 @@ menuconfig STAGING_MEDIA
if STAGING_MEDIA && MEDIA_SUPPORT
# Please keep them in alphabetic order
source "drivers/staging/media/atomisp/Kconfig"
source "drivers/staging/media/bcm2048/Kconfig"
source "drivers/staging/media/davinci_vpfe/Kconfig"
......
......@@ -5,5 +5,4 @@ obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074/
obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031/
obj-$(CONFIG_VIDEO_DM365_VPFE) += davinci_vpfe/
obj-$(CONFIG_VIDEO_OMAP4) += omap4iss/
obj-$(CONFIG_INTEL_ATOMISP) += atomisp/
obj-$(CONFIG_TEGRA_VDE) += tegra-vde/
menuconfig INTEL_ATOMISP
bool "Enable support to Intel MIPI camera drivers"
depends on X86 && EFI && MEDIA_CONTROLLER && PCI && ACPI
select COMMON_CLK
help
Enable support for the Intel ISP2 camera interfaces and MIPI
sensor drivers.
if INTEL_ATOMISP
source "drivers/staging/media/atomisp/pci/Kconfig"
source "drivers/staging/media/atomisp/i2c/Kconfig"
endif
#
# Makefile for camera drivers.
#
obj-$(CONFIG_INTEL_ATOMISP) += pci/
obj-$(CONFIG_INTEL_ATOMISP) += i2c/
obj-$(CONFIG_INTEL_ATOMISP) += platform/
1. A single AtomISP driver needs to be implemented to support both BYT and
CHT platforms. The current driver is a mechanical and hand combined merge
of the two using an ifdef ISP2401 to select the CHT version, which at the
moment is not enabled. Eventually this should become a runtime if check,
but there are some quite tricky things that need sorting out before that
will be possible.
2. The file structure needs to get tidied up to resemble a normal Linux
driver.
3. Lots of the midlayer glue. unused code and abstraction needs removing.
3. The sensor drivers read MIPI settings from EFI variables or default to the
settings hard-coded in the platform data file for different platforms.
This isn't ideal but may be hard to improve as this is how existing
platforms work.
4. The sensor drivers use the regulator framework API. In the ideal world it
would be using ACPI but that's not how the existing devices work.
5. The AtomISP driver includes some special IOCTLS (ATOMISP_IOC_XXXX_XXXX)
that may need some cleaning up.
6. Correct Coding Style. Please don't send coding style patches for this
driver until the other work is done.
7. The ISP code depends on the exact FW version. The version defined in
BYT:
drivers/staging/media/atomisp/pci/atomisp2/css2400/sh_css_firmware.c
static const char *release_version = STR(irci_stable_candrpv_0415_20150521_0458);
CHT:
drivers/staging/media/atomisp/pci/atomisp2/css/sh_css_firmware.c
static const char *release_version = STR(irci_ecr-master_20150911_0724);
At some point we may need to round up a few driver versions and see if
there are any specific things that can be done to fold in support for
multiple firmware versions.
8. Switch to V4L2 async API to set up sensor, lens and flash devices.
Control those devices using V4L2 sub-device API without custom
extensions.
9. Switch to standard V4L2 sub-device API for sensor and lens. In
particular, the user space API needs to support V4L2 controls as
defined in the V4L2 spec and references to atomisp must be removed from
these drivers.
10. Use LED flash API for flash LED drivers such as LM3554 (which already
has a LED class driver).
11. Switch from videobuf1 to videobuf2. Videobuf1 is being removed!
Limitations:
1. To test the patches, you also need the ISP firmware
for BYT:/lib/firmware/shisp_2400b0_v21.bin
for CHT:/lib/firmware/shisp_2401a0_v21.bin
The firmware files will usually be found in /etc/firmware on an Android
device but can also be extracted from the upgrade kit if you've managed
to lose them somehow.
2. Without a 3A libary the capture behaviour is not very good. To take a good
picture, you need tune ISP parameters by IOCTL functions or use a 3A libary
such as libxcam.
3. The driver is intended to drive the PCI exposed versions of the device.
It will not detect those devices enumerated via ACPI as a field of the
i915 GPU driver.
4. The driver supports only v2 of the IPU/Camera. It will not work with the
versions of the hardware in other SoCs.
#
# Kconfig for sensor drivers
#
source "drivers/staging/media/atomisp/i2c/ov5693/Kconfig"
config VIDEO_ATOMISP_OV2722
tristate "OVT ov2722 sensor support"
depends on ACPI
depends on I2C && VIDEO_V4L2
---help---
This is a Video4Linux2 sensor-level driver for the OVT
OV2722 raw camera.
OVT is a 2M raw sensor.
It currently only works with the atomisp driver.
config VIDEO_ATOMISP_GC2235
tristate "Galaxy gc2235 sensor support"
depends on ACPI
depends on I2C && VIDEO_V4L2
---help---
This is a Video4Linux2 sensor-level driver for the OVT
GC2235 raw camera.
GC2235 is a 2M raw sensor.
It currently only works with the atomisp driver.
config VIDEO_ATOMISP_MSRLIST_HELPER
tristate "Helper library to load, parse and apply large register lists."
depends on I2C
---help---
This is a helper library to be used from a sensor driver to load, parse
and apply large register lists.
To compile this driver as a module, choose M here: the
module will be called libmsrlisthelper.
config VIDEO_ATOMISP_MT9M114
tristate "Aptina mt9m114 sensor support"
depends on ACPI
depends on I2C && VIDEO_V4L2
---help---
This is a Video4Linux2 sensor-level driver for the Micron
mt9m114 1.3 Mpixel camera.
mt9m114 is video camera sensor.
It currently only works with the atomisp driver.
config VIDEO_ATOMISP_GC0310
tristate "GC0310 sensor support"
depends on ACPI
depends on I2C && VIDEO_V4L2
---help---
This is a Video4Linux2 sensor-level driver for the Galaxycore
GC0310 0.3MP sensor.
config VIDEO_ATOMISP_OV2680
tristate "Omnivision OV2680 sensor support"
depends on ACPI
depends on I2C && VIDEO_V4L2
---help---
This is a Video4Linux2 sensor-level driver for the Omnivision
OV2680 raw camera.
ov2680 is a 2M raw sensor.
It currently only works with the atomisp driver.
#
# Kconfig for flash drivers
#
config VIDEO_ATOMISP_LM3554
tristate "LM3554 flash light driver"
depends on ACPI
depends on VIDEO_V4L2 && I2C
---help---
This is a Video4Linux2 sub-dev driver for the LM3554
flash light driver.
To compile this driver as a module, choose M here: the
module will be called lm3554
# SPDX-License-Identifier: GPL-2.0
#
# Makefile for sensor drivers
#
obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += ov5693/
obj-$(CONFIG_VIDEO_ATOMISP_MT9M114) += atomisp-mt9m114.o
obj-$(CONFIG_VIDEO_ATOMISP_GC2235) += atomisp-gc2235.o
obj-$(CONFIG_VIDEO_ATOMISP_OV2722) += atomisp-ov2722.o
obj-$(CONFIG_VIDEO_ATOMISP_OV2680) += atomisp-ov2680.o
obj-$(CONFIG_VIDEO_ATOMISP_GC0310) += atomisp-gc0310.o
obj-$(CONFIG_VIDEO_ATOMISP_MSRLIST_HELPER) += atomisp-libmsrlisthelper.o
# Makefile for flash drivers
#
obj-$(CONFIG_VIDEO_ATOMISP_LM3554) += atomisp-lm3554.o
/*
* Copyright (c) 2013 Intel Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
*/
#include <linux/i2c.h>
#include <linux/firmware.h>
#include <linux/device.h>
#include <linux/export.h>
#include "../include/linux/libmsrlisthelper.h"
#include <linux/module.h>
#include <linux/slab.h>
/* Tagged binary data container structure definitions. */
struct tbd_header {
uint32_t tag; /*!< Tag identifier, also checks endianness */
uint32_t size; /*!< Container size including this header */
uint32_t version; /*!< Version, format 0xYYMMDDVV */
uint32_t revision; /*!< Revision, format 0xYYMMDDVV */
uint32_t config_bits; /*!< Configuration flag bits set */
uint32_t checksum; /*!< Global checksum, header included */
} __packed;
struct tbd_record_header {
uint32_t size; /*!< Size of record including header */
uint8_t format_id; /*!< tbd_format_t enumeration values used */
uint8_t packing_key; /*!< Packing method; 0 = no packing */
uint16_t class_id; /*!< tbd_class_t enumeration values used */
} __packed;
struct tbd_data_record_header {
uint16_t next_offset;
uint16_t flags;
uint16_t data_offset;
uint16_t data_size;
} __packed;
#define TBD_CLASS_DRV_ID 2
static int set_msr_configuration(struct i2c_client *client, uint8_t *bufptr,
unsigned int size)
{
/* The configuration data contains any number of sequences where
* the first byte (that is, uint8_t) that marks the number of bytes
* in the sequence to follow, is indeed followed by the indicated
* number of bytes of actual data to be written to sensor.
* By convention, the first two bytes of actual data should be
* understood as an address in the sensor address space (hibyte
* followed by lobyte) where the remaining data in the sequence
* will be written. */
uint8_t *ptr = bufptr;
while (ptr < bufptr + size) {
struct i2c_msg msg = {
.addr = client->addr,
.flags = 0,
};
int ret;
/* How many bytes */
msg.len = *ptr++;
/* Where the bytes are located */
msg.buf = ptr;
ptr += msg.len;
if (ptr > bufptr + size)
/* Accessing data beyond bounds is not tolerated */
return -EINVAL;
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "i2c write error: %d", ret);
return ret;
}
}
return 0;
}
static int parse_and_apply(struct i2c_client *client, uint8_t *buffer,
unsigned int size)
{
uint8_t *endptr8 = buffer + size;
struct tbd_data_record_header *header =
(struct tbd_data_record_header *)buffer;
/* There may be any number of datasets present */
unsigned int dataset = 0;
do {
/* In below, four variables are read from buffer */
if ((uint8_t *)header + sizeof(*header) > endptr8)
return -EINVAL;
/* All data should be located within given buffer */
if ((uint8_t *)header + header->data_offset +
header->data_size > endptr8)
return -EINVAL;
/* We have a new valid dataset */
dataset++;
/* See whether there is MSR data */
/* If yes, update the reg info */
if (header->data_size && (header->flags & 1)) {
int ret;
dev_info(&client->dev,
"New MSR data for sensor driver (dataset %02d) size:%d\n",
dataset, header->data_size);
ret = set_msr_configuration(client,
buffer + header->data_offset,
header->data_size);
if (ret)
return ret;
}
header = (struct tbd_data_record_header *)(buffer +
header->next_offset);
} while (header->next_offset);
return 0;
}
int apply_msr_data(struct i2c_client *client, const struct firmware *fw)
{
struct tbd_header *header;
struct tbd_record_header *record;
if (!fw) {
dev_warn(&client->dev, "Drv data is not loaded.\n");
return -EINVAL;
}
if (sizeof(*header) > fw->size)
return -EINVAL;
header = (struct tbd_header *)fw->data;
/* Check that we have drvb block. */
if (memcmp(&header->tag, "DRVB", 4))
return -EINVAL;
/* Check the size */
if (header->size != fw->size)
return -EINVAL;
if (sizeof(*header) + sizeof(*record) > fw->size)
return -EINVAL;
record = (struct tbd_record_header *)(header + 1);
/* Check that class id mathes tbd's drv id. */
if (record->class_id != TBD_CLASS_DRV_ID)
return -EINVAL;
/* Size 0 shall not be treated as an error */
if (!record->size)
return 0;
return parse_and_apply(client, (uint8_t *)(record + 1), record->size);
}
EXPORT_SYMBOL_GPL(apply_msr_data);
int load_msr_list(struct i2c_client *client, char *name,
const struct firmware **fw)
{
int ret = request_firmware(fw, name, &client->dev);
if (ret) {
dev_err(&client->dev,
"Error %d while requesting firmware %s\n",
ret, name);
return ret;
}
dev_info(&client->dev, "Received %lu bytes drv data\n",
(unsigned long)(*fw)->size);
return 0;
}
EXPORT_SYMBOL_GPL(load_msr_list);
void release_msr_list(struct i2c_client *client, const struct firmware *fw)
{
release_firmware(fw);
}
EXPORT_SYMBOL_GPL(release_msr_list);
static int init_msrlisthelper(void)
{
return 0;
}
static void exit_msrlisthelper(void)
{
}
module_init(init_msrlisthelper);
module_exit(exit_msrlisthelper);
MODULE_AUTHOR("Jukka Kaartinen <jukka.o.kaartinen@intel.com>");
MODULE_LICENSE("GPL");
/*
* Support for GalaxyCore GC0310 VGA camera sensor.
*
* Copyright (c) 2013 Intel Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
*/
#ifndef __GC0310_H__
#define __GC0310_H__
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include <linux/spinlock.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <linux/v4l2-mediabus.h>
#include <media/media-entity.h>
#include "../include/linux/atomisp_platform.h"
/* Defines for register writes and register array processing */
#define I2C_MSG_LENGTH 1
#define I2C_RETRY_COUNT 5
#define GC0310_FOCAL_LENGTH_NUM 278 /*2.78mm*/
#define GC0310_FOCAL_LENGTH_DEM 100
#define GC0310_F_NUMBER_DEFAULT_NUM 26
#define GC0310_F_NUMBER_DEM 10
#define MAX_FMTS 1
/*
* focal length bits definition:
* bits 31-16: numerator, bits 15-0: denominator
*/
#define GC0310_FOCAL_LENGTH_DEFAULT 0x1160064
/*
* current f-number bits definition:
* bits 31-16: numerator, bits 15-0: denominator
*/
#define GC0310_F_NUMBER_DEFAULT 0x1a000a
/*
* f-number range bits definition:
* bits 31-24: max f-number numerator
* bits 23-16: max f-number denominator
* bits 15-8: min f-number numerator
* bits 7-0: min f-number denominator
*/
#define GC0310_F_NUMBER_RANGE 0x1a0a1a0a
#define GC0310_ID 0xa310
#define GC0310_RESET_RELATED 0xFE
#define GC0310_REGISTER_PAGE_0 0x0
#define GC0310_REGISTER_PAGE_3 0x3
#define GC0310_FINE_INTG_TIME_MIN 0
#define GC0310_FINE_INTG_TIME_MAX_MARGIN 0
#define GC0310_COARSE_INTG_TIME_MIN 1
#define GC0310_COARSE_INTG_TIME_MAX_MARGIN 6
/*
* GC0310 System control registers
*/
#define GC0310_SW_STREAM 0x10
#define GC0310_SC_CMMN_CHIP_ID_H 0xf0
#define GC0310_SC_CMMN_CHIP_ID_L 0xf1
#define GC0310_AEC_PK_EXPO_H 0x03
#define GC0310_AEC_PK_EXPO_L 0x04
#define GC0310_AGC_ADJ 0x48
#define GC0310_DGC_ADJ 0x71
#if 0
#define GC0310_GROUP_ACCESS 0x3208
#endif
#define GC0310_H_CROP_START_H 0x09
#define GC0310_H_CROP_START_L 0x0A
#define GC0310_V_CROP_START_H 0x0B
#define GC0310_V_CROP_START_L 0x0C
#define GC0310_H_OUTSIZE_H 0x0F
#define GC0310_H_OUTSIZE_L 0x10
#define GC0310_V_OUTSIZE_H 0x0D
#define GC0310_V_OUTSIZE_L 0x0E
#define GC0310_H_BLANKING_H 0x05
#define GC0310_H_BLANKING_L 0x06
#define GC0310_V_BLANKING_H 0x07
#define GC0310_V_BLANKING_L 0x08
#define GC0310_SH_DELAY 0x11
#define GC0310_START_STREAMING 0x94 /* 8-bit enable */
#define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */
#define GC0310_BIN_FACTOR_MAX 3
struct regval_list {
u16 reg_num;
u8 value;
};
struct gc0310_resolution {
u8 *desc;
const struct gc0310_reg *regs;
int res;
int width;
int height;
int fps;
int pix_clk_freq;
u32 skip_frames;
u16 pixels_per_line;
u16 lines_per_frame;
u8 bin_factor_x;
u8 bin_factor_y;
u8 bin_mode;
bool used;
};
struct gc0310_format {
u8 *desc;
u32 pixelformat;
struct gc0310_reg *regs;
};
/*
* gc0310 device structure.
*/
struct gc0310_device {
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_mbus_framefmt format;
struct mutex input_lock;
struct v4l2_ctrl_handler ctrl_handler;
struct camera_sensor_platform_data *platform_data;
int vt_pix_clk_freq_mhz;
int fmt_idx;
u8 res;
u8 type;
};
enum gc0310_tok_type {
GC0310_8BIT = 0x0001,
GC0310_TOK_TERM = 0xf000, /* terminating token for reg list */
GC0310_TOK_DELAY = 0xfe00, /* delay token for reg list */
GC0310_TOK_MASK = 0xfff0
};
/**
* struct gc0310_reg - MI sensor register format
* @type: type of the register
* @reg: 16-bit offset to register
* @val: 8/16/32-bit register value
*
* Define a structure for sensor register initialization values
*/
struct gc0310_reg {
enum gc0310_tok_type type;
u8 reg;
u8 val; /* @set value for read/mod/write, @mask */
};
#define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd)
#define GC0310_MAX_WRITE_BUF_SIZE 30
struct gc0310_write_buffer {
u8 addr;
u8 data[GC0310_MAX_WRITE_BUF_SIZE];
};
struct gc0310_write_ctrl {
int index;
struct gc0310_write_buffer buffer;
};
/*
* Register settings for various resolution
*/
static const struct gc0310_reg gc0310_reset_register[] = {
/////////////////////////////////////////////////
///////////////// system reg /////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0xfe, 0xf0},
{GC0310_8BIT, 0xfe, 0xf0},
{GC0310_8BIT, 0xfe, 0x00},
{GC0310_8BIT, 0xfc, 0x0e}, //4e
{GC0310_8BIT, 0xfc, 0x0e}, //16//4e // [0]apwd [6]regf_clk_gate
{GC0310_8BIT, 0xf2, 0x80}, //sync output
{GC0310_8BIT, 0xf3, 0x00}, //1f//01 data output
{GC0310_8BIT, 0xf7, 0x33}, //f9
{GC0310_8BIT, 0xf8, 0x05}, //00
{GC0310_8BIT, 0xf9, 0x0e}, // 0x8e //0f
{GC0310_8BIT, 0xfa, 0x11},
/////////////////////////////////////////////////
/////////////////// MIPI ////////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0xfe, 0x03},
{GC0310_8BIT, 0x01, 0x03}, ///mipi 1lane
{GC0310_8BIT, 0x02, 0x22}, // 0x33
{GC0310_8BIT, 0x03, 0x94},
{GC0310_8BIT, 0x04, 0x01}, // fifo_prog
{GC0310_8BIT, 0x05, 0x00}, //fifo_prog
{GC0310_8BIT, 0x06, 0x80}, //b0 //YUV ISP data
{GC0310_8BIT, 0x11, 0x2a},//1e //LDI set YUV422
{GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] //
{GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8]
{GC0310_8BIT, 0x15, 0x12}, // 0x10 //DPHYY_MODE read_ready
{GC0310_8BIT, 0x17, 0x01},
{GC0310_8BIT, 0x40, 0x08},
{GC0310_8BIT, 0x41, 0x00},
{GC0310_8BIT, 0x42, 0x00},
{GC0310_8BIT, 0x43, 0x00},
{GC0310_8BIT, 0x21, 0x02}, // 0x01
{GC0310_8BIT, 0x22, 0x02}, // 0x01
{GC0310_8BIT, 0x23, 0x01}, // 0x05 //Nor:0x05 DOU:0x06
{GC0310_8BIT, 0x29, 0x00},
{GC0310_8BIT, 0x2A, 0x25}, // 0x05 //data zero 0x7a de
{GC0310_8BIT, 0x2B, 0x02},
{GC0310_8BIT, 0xfe, 0x00},
/////////////////////////////////////////////////
///////////////// CISCTL reg /////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0x00, 0x2f}, //2f//0f//02//01
{GC0310_8BIT, 0x01, 0x0f}, //06
{GC0310_8BIT, 0x02, 0x04},
{GC0310_8BIT, 0x4f, 0x00}, //AEC 0FF
{GC0310_8BIT, 0x03, 0x01}, // 0x03 //04
{GC0310_8BIT, 0x04, 0xc0}, // 0xe8 //58
{GC0310_8BIT, 0x05, 0x00},
{GC0310_8BIT, 0x06, 0xb2}, // 0x0a //HB
{GC0310_8BIT, 0x07, 0x00},
{GC0310_8BIT, 0x08, 0x0c}, // 0x89 //VB
{GC0310_8BIT, 0x09, 0x00}, //row start
{GC0310_8BIT, 0x0a, 0x00}, //
{GC0310_8BIT, 0x0b, 0x00}, //col start
{GC0310_8BIT, 0x0c, 0x00},
{GC0310_8BIT, 0x0d, 0x01}, //height
{GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height
{GC0310_8BIT, 0x0f, 0x02}, //width
{GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height
{GC0310_8BIT, 0x17, 0x14},
{GC0310_8BIT, 0x18, 0x1a}, //0a//[4]double reset
{GC0310_8BIT, 0x19, 0x14}, //AD pipeline
{GC0310_8BIT, 0x1b, 0x48},
{GC0310_8BIT, 0x1e, 0x6b}, //3b//col bias
{GC0310_8BIT, 0x1f, 0x28}, //20//00//08//txlow
{GC0310_8BIT, 0x20, 0x89}, //88//0c//[3:2]DA15
{GC0310_8BIT, 0x21, 0x49}, //48//[3] txhigh
{GC0310_8BIT, 0x22, 0xb0},
{GC0310_8BIT, 0x23, 0x04}, //[1:0]vcm_r
{GC0310_8BIT, 0x24, 0x16}, //15
{GC0310_8BIT, 0x34, 0x20}, //[6:4] rsg high//range
/////////////////////////////////////////////////
//////////////////// BLK ////////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0x26, 0x23}, //[1]dark_current_en [0]offset_en
{GC0310_8BIT, 0x28, 0xff}, //BLK_limie_value
{GC0310_8BIT, 0x29, 0x00}, //global offset
{GC0310_8BIT, 0x33, 0x18}, //offset_ratio
{GC0310_8BIT, 0x37, 0x20}, //dark_current_ratio
{GC0310_8BIT, 0x2a, 0x00},
{GC0310_8BIT, 0x2b, 0x00},
{GC0310_8BIT, 0x2c, 0x00},
{GC0310_8BIT, 0x2d, 0x00},
{GC0310_8BIT, 0x2e, 0x00},
{GC0310_8BIT, 0x2f, 0x00},
{GC0310_8BIT, 0x30, 0x00},
{GC0310_8BIT, 0x31, 0x00},
{GC0310_8BIT, 0x47, 0x80}, //a7
{GC0310_8BIT, 0x4e, 0x66}, //select_row
{GC0310_8BIT, 0xa8, 0x02}, //win_width_dark, same with crop_win_width
{GC0310_8BIT, 0xa9, 0x80},
/////////////////////////////////////////////////
////////////////// ISP reg ///////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0x40, 0x06}, // 0xff //ff //48
{GC0310_8BIT, 0x41, 0x00}, // 0x21 //00//[0]curve_en
{GC0310_8BIT, 0x42, 0x04}, // 0xcf //0a//[1]awn_en
{GC0310_8BIT, 0x44, 0x18}, // 0x18 //02
{GC0310_8BIT, 0x46, 0x02}, // 0x03 //sync
{GC0310_8BIT, 0x49, 0x03},
{GC0310_8BIT, 0x4c, 0x20}, //00[5]pretect exp
{GC0310_8BIT, 0x50, 0x01}, //crop enable
{GC0310_8BIT, 0x51, 0x00},
{GC0310_8BIT, 0x52, 0x00},
{GC0310_8BIT, 0x53, 0x00},
{GC0310_8BIT, 0x54, 0x01},
{GC0310_8BIT, 0x55, 0x01}, //crop window height
{GC0310_8BIT, 0x56, 0xf0},
{GC0310_8BIT, 0x57, 0x02}, //crop window width
{GC0310_8BIT, 0x58, 0x90},
/////////////////////////////////////////////////
/////////////////// GAIN ////////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0x70, 0x70}, //70 //80//global gain
{GC0310_8BIT, 0x71, 0x20}, // pregain gain
{GC0310_8BIT, 0x72, 0x40}, // post gain
{GC0310_8BIT, 0x5a, 0x84}, //84//analog gain 0
{GC0310_8BIT, 0x5b, 0xc9}, //c9
{GC0310_8BIT, 0x5c, 0xed}, //ed//not use pga gain highest level
{GC0310_8BIT, 0x77, 0x40}, // R gain 0x74 //awb gain
{GC0310_8BIT, 0x78, 0x40}, // G gain
{GC0310_8BIT, 0x79, 0x40}, // B gain 0x5f
{GC0310_8BIT, 0x48, 0x00},
{GC0310_8BIT, 0xfe, 0x01},
{GC0310_8BIT, 0x0a, 0x45}, //[7]col gain mode
{GC0310_8BIT, 0x3e, 0x40},
{GC0310_8BIT, 0x3f, 0x5c},
{GC0310_8BIT, 0x40, 0x7b},
{GC0310_8BIT, 0x41, 0xbd},
{GC0310_8BIT, 0x42, 0xf6},
{GC0310_8BIT, 0x43, 0x63},
{GC0310_8BIT, 0x03, 0x60},
{GC0310_8BIT, 0x44, 0x03},
/////////////////////////////////////////////////
///////////////// dark sun //////////////////
/////////////////////////////////////////////////
{GC0310_8BIT, 0xfe, 0x01},
{GC0310_8BIT, 0x45, 0xa4}, // 0xf7
{GC0310_8BIT, 0x46, 0xf0}, // 0xff //f0//sun vaule th
{GC0310_8BIT, 0x48, 0x03}, //sun mode
{GC0310_8BIT, 0x4f, 0x60}, //sun_clamp
{GC0310_8BIT, 0xfe, 0x00},
{GC0310_TOK_TERM, 0, 0},
};
static struct gc0310_reg const gc0310_VGA_30fps[] = {
{GC0310_8BIT, 0xfe, 0x00},
{GC0310_8BIT, 0x0d, 0x01}, //height
{GC0310_8BIT, 0x0e, 0xf2}, // 0xf7 //height
{GC0310_8BIT, 0x0f, 0x02}, //width
{GC0310_8BIT, 0x10, 0x94}, // 0xa0 //height
{GC0310_8BIT, 0x50, 0x01}, //crop enable
{GC0310_8BIT, 0x51, 0x00},
{GC0310_8BIT, 0x52, 0x00},
{GC0310_8BIT, 0x53, 0x00},
{GC0310_8BIT, 0x54, 0x01},
{GC0310_8BIT, 0x55, 0x01}, //crop window height
{GC0310_8BIT, 0x56, 0xf0},
{GC0310_8BIT, 0x57, 0x02}, //crop window width
{GC0310_8BIT, 0x58, 0x90},
{GC0310_8BIT, 0xfe, 0x03},
{GC0310_8BIT, 0x12, 0x90},//00 //04 //00 //04//00 //LWC[7:0] //
{GC0310_8BIT, 0x13, 0x02},//05 //05 //LWC[15:8]
{GC0310_8BIT, 0xfe, 0x00},
{GC0310_TOK_TERM, 0, 0},
};
static struct gc0310_resolution gc0310_res_preview[] = {
{
.desc = "gc0310_VGA_30fps",
.width = 656, // 648,
.height = 496, // 488,
.fps = 30,
//.pix_clk_freq = 73,
.used = 0,
#if 0
.pixels_per_line = 0x0314,
.lines_per_frame = 0x0213,
#endif
.bin_factor_x = 1,
.bin_factor_y = 1,
.bin_mode = 0,
.skip_frames = 2,
.regs = gc0310_VGA_30fps,
},
};
#define N_RES_PREVIEW (ARRAY_SIZE(gc0310_res_preview))
static struct gc0310_resolution *gc0310_res = gc0310_res_preview;
static unsigned long N_RES = N_RES_PREVIEW;
#endif
/*
* Support for GalaxyCore GC2235 2M camera sensor.
*
* Copyright (c) 2014 Intel Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version
* 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program.
*
*/
#ifndef __GC2235_H__
#define __GC2235_H__
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/videodev2.h>
#include <linux/spinlock.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <linux/v4l2-mediabus.h>
#include <media/media-entity.h>
#include "../include/linux/atomisp_platform.h"
/*
* FIXME: non-preview resolutions are currently broken
*/
#define ENABLE_NON_PREVIEW 0
/* Defines for register writes and register array processing */
#define I2C_MSG_LENGTH 0x2
#define I2C_RETRY_COUNT 5
#define GC2235_FOCAL_LENGTH_NUM 278 /*2.78mm*/
#define GC2235_FOCAL_LENGTH_DEM 100
#define GC2235_F_NUMBER_DEFAULT_NUM 26
#define GC2235_F_NUMBER_DEM 10
#define MAX_FMTS 1
/*
* focal length bits definition:
* bits 31-16: numerator, bits 15-0: denominator
*/
#define GC2235_FOCAL_LENGTH_DEFAULT 0x1160064
/*
* current f-number bits definition:
* bits 31-16: numerator, bits 15-0: denominator
*/
#define GC2235_F_NUMBER_DEFAULT 0x1a000a
/*
* f-number range bits definition:
* bits 31-24: max f-number numerator
* bits 23-16: max f-number denominator
* bits 15-8: min f-number numerator
* bits 7-0: min f-number denominator
*/
#define GC2235_F_NUMBER_RANGE 0x1a0a1a0a
#define GC2235_ID 0x2235
#define GC2235_FINE_INTG_TIME_MIN 0
#define GC2235_FINE_INTG_TIME_MAX_MARGIN 0
#define GC2235_COARSE_INTG_TIME_MIN 1
#define GC2235_COARSE_INTG_TIME_MAX_MARGIN 6
/*
* GC2235 System control registers
*/
/*
* GC2235 System control registers
*/
#define GC2235_SENSOR_ID_H 0xF0
#define GC2235_SENSOR_ID_L 0xF1
#define GC2235_RESET_RELATED 0xFE
#define GC2235_SW_RESET 0x8
#define GC2235_MIPI_RESET 0x3
#define GC2235_RESET_BIT 0x4
#define GC2235_REGISTER_PAGE_0 0x0
#define GC2235_REGISTER_PAGE_3 0x3
#define GC2235_V_CROP_START_H 0x91
#define GC2235_V_CROP_START_L 0x92
#define GC2235_H_CROP_START_H 0x93
#define GC2235_H_CROP_START_L 0x94
#define GC2235_V_OUTSIZE_H 0x95
#define GC2235_V_OUTSIZE_L 0x96
#define GC2235_H_OUTSIZE_H 0x97
#define GC2235_H_OUTSIZE_L 0x98
#define GC2235_HB_H 0x5
#define GC2235_HB_L 0x6
#define GC2235_VB_H 0x7
#define GC2235_VB_L 0x8
#define GC2235_SH_DELAY_H 0x11
#define GC2235_SH_DELAY_L 0x12
#define GC2235_CSI2_MODE 0x10
#define GC2235_EXPOSURE_H 0x3
#define GC2235_EXPOSURE_L 0x4
#define GC2235_GLOBAL_GAIN 0xB0
#define GC2235_PRE_GAIN 0xB1
#define GC2235_AWB_R_GAIN 0xB3
#define GC2235_AWB_G_GAIN 0xB4
#define GC2235_AWB_B_GAIN 0xB5
#define GC2235_START_STREAMING 0x91
#define GC2235_STOP_STREAMING 0x0
struct regval_list {
u16 reg_num;
u8 value;
};
struct gc2235_resolution {
u8 *desc;
const struct gc2235_reg *regs;
int res;
int width;
int height;
int fps;
int pix_clk_freq;
u32 skip_frames;
u16 pixels_per_line;
u16 lines_per_frame;
u8 bin_factor_x;
u8 bin_factor_y;
u8 bin_mode;
bool used;
};
struct gc2235_format {
u8 *desc;
u32 pixelformat;
struct gc2235_reg *regs;
};
/*
* gc2235 device structure.
*/
struct gc2235_device {
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_mbus_framefmt format;
struct mutex input_lock;
struct v4l2_ctrl_handler ctrl_handler;
struct camera_sensor_platform_data *platform_data;
int vt_pix_clk_freq_mhz;
int fmt_idx;
u8 res;
u8 type;
};
enum gc2235_tok_type {
GC2235_8BIT = 0x0001,
GC2235_16BIT = 0x0002,
GC2235_32BIT = 0x0004,
GC2235_TOK_TERM = 0xf000, /* terminating token for reg list */
GC2235_TOK_DELAY = 0xfe00, /* delay token for reg list */
GC2235_TOK_MASK = 0xfff0
};
/**
* struct gc2235_reg - MI sensor register format
* @type: type of the register
* @reg: 8-bit offset to register
* @val: 8/16/32-bit register value
*
* Define a structure for sensor register initialization values
*/
struct gc2235_reg {
enum gc2235_tok_type type;
u8 reg;
u32 val; /* @set value for read/mod/write, @mask */
};
#define to_gc2235_sensor(x) container_of(x, struct gc2235_device, sd)
#define GC2235_MAX_WRITE_BUF_SIZE 30
struct gc2235_write_buffer {
u8 addr;
u8 data[GC2235_MAX_WRITE_BUF_SIZE];
};
struct gc2235_write_ctrl {
int index;
struct gc2235_write_buffer buffer;
};
static struct gc2235_reg const gc2235_stream_on[] = {
{ GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */
{ GC2235_8BIT, 0x10, 0x91}, /* start mipi */
{ GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_reg const gc2235_stream_off[] = {
{ GC2235_8BIT, 0xfe, 0x03}, /* switch to P3 */
{ GC2235_8BIT, 0x10, 0x01}, /* stop mipi */
{ GC2235_8BIT, 0xfe, 0x00}, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_reg const gc2235_init_settings[] = {
/* Sysytem */
{ GC2235_8BIT, 0xfe, 0x80 },
{ GC2235_8BIT, 0xfe, 0x80 },
{ GC2235_8BIT, 0xfe, 0x80 },
{ GC2235_8BIT, 0xf2, 0x00 },
{ GC2235_8BIT, 0xf6, 0x00 },
{ GC2235_8BIT, 0xfc, 0x06 },
{ GC2235_8BIT, 0xf7, 0x15 },
{ GC2235_8BIT, 0xf8, 0x84 },
{ GC2235_8BIT, 0xf9, 0xfe },
{ GC2235_8BIT, 0xfa, 0x00 },
{ GC2235_8BIT, 0xfe, 0x00 },
/* Analog & cisctl */
{ GC2235_8BIT, 0x03, 0x04 },
{ GC2235_8BIT, 0x04, 0x9E },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x06, 0xfd },
{ GC2235_8BIT, 0x07, 0x00 },
{ GC2235_8BIT, 0x08, 0x14 },
{ GC2235_8BIT, 0x0a, 0x02 }, /* row start */
{ GC2235_8BIT, 0x0c, 0x00 }, /* col start */
{ GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */
{ GC2235_8BIT, 0x0e, 0xd0 },
{ GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */
{ GC2235_8BIT, 0x10, 0x60 },
{ GC2235_8BIT, 0x17, 0x15 }, /* mirror flip */
{ GC2235_8BIT, 0x18, 0x1a },
{ GC2235_8BIT, 0x19, 0x06 },
{ GC2235_8BIT, 0x1a, 0x01 },
{ GC2235_8BIT, 0x1b, 0x4d },
{ GC2235_8BIT, 0x1e, 0x88 },
{ GC2235_8BIT, 0x1f, 0x48 },
{ GC2235_8BIT, 0x20, 0x03 },
{ GC2235_8BIT, 0x21, 0x7f },
{ GC2235_8BIT, 0x22, 0x83 },
{ GC2235_8BIT, 0x23, 0x42 },
{ GC2235_8BIT, 0x24, 0x16 },
{ GC2235_8BIT, 0x26, 0x01 }, /*analog gain*/
{ GC2235_8BIT, 0x27, 0x30 },
{ GC2235_8BIT, 0x3f, 0x00 }, /* PRC */
/* blk */
{ GC2235_8BIT, 0x40, 0xa3 },
{ GC2235_8BIT, 0x41, 0x82 },
{ GC2235_8BIT, 0x43, 0x20 },
{ GC2235_8BIT, 0x5e, 0x18 },
{ GC2235_8BIT, 0x5f, 0x18 },
{ GC2235_8BIT, 0x60, 0x18 },
{ GC2235_8BIT, 0x61, 0x18 },
{ GC2235_8BIT, 0x62, 0x18 },
{ GC2235_8BIT, 0x63, 0x18 },
{ GC2235_8BIT, 0x64, 0x18 },
{ GC2235_8BIT, 0x65, 0x18 },
{ GC2235_8BIT, 0x66, 0x20 },
{ GC2235_8BIT, 0x67, 0x20 },
{ GC2235_8BIT, 0x68, 0x20 },
{ GC2235_8BIT, 0x69, 0x20 },
/* Gain */
{ GC2235_8BIT, 0xb2, 0x00 },
{ GC2235_8BIT, 0xb3, 0x40 },
{ GC2235_8BIT, 0xb4, 0x40 },
{ GC2235_8BIT, 0xb5, 0x40 },
/* Dark sun */
{ GC2235_8BIT, 0xbc, 0x00 },
{ GC2235_8BIT, 0xfe, 0x03 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
/*
* Register settings for various resolution
*/
#if ENABLE_NON_PREVIEW
static struct gc2235_reg const gc2235_1296_736_30fps[] = {
{ GC2235_8BIT, 0x8b, 0xa0 },
{ GC2235_8BIT, 0x8c, 0x02 },
{ GC2235_8BIT, 0x07, 0x01 }, /* VBI */
{ GC2235_8BIT, 0x08, 0x44 },
{ GC2235_8BIT, 0x09, 0x00 }, /* row start */
{ GC2235_8BIT, 0x0a, 0xf0 },
{ GC2235_8BIT, 0x0b, 0x00 }, /* col start */
{ GC2235_8BIT, 0x0c, 0xa0 },
{ GC2235_8BIT, 0x0d, 0x02 }, /* win height 736 */
{ GC2235_8BIT, 0x0e, 0xf0 },
{ GC2235_8BIT, 0x0f, 0x05 }, /* win width: 1296 */
{ GC2235_8BIT, 0x10, 0x20 },
{ GC2235_8BIT, 0x90, 0x01 },
{ GC2235_8BIT, 0x92, 0x08 },
{ GC2235_8BIT, 0x94, 0x08 },
{ GC2235_8BIT, 0x95, 0x02 }, /* crop win height 736 */
{ GC2235_8BIT, 0x96, 0xe0 },
{ GC2235_8BIT, 0x97, 0x05 }, /* crop win width 1296 */
{ GC2235_8BIT, 0x98, 0x10 },
/* mimi init */
{ GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */
{ GC2235_8BIT, 0x01, 0x07 },
{ GC2235_8BIT, 0x02, 0x11 },
{ GC2235_8BIT, 0x03, 0x11 },
{ GC2235_8BIT, 0x06, 0x80 },
{ GC2235_8BIT, 0x11, 0x2b },
/* set mipi buffer */
{ GC2235_8BIT, 0x12, 0x54 }, /* val_low = (width * 10 / 8) & 0xFF */
{ GC2235_8BIT, 0x13, 0x06 }, /* val_high = (width * 10 / 8) >> 8 */
{ GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/
{ GC2235_8BIT, 0x04, 0x10 },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x17, 0x01 },
{ GC2235_8BIT, 0x22, 0x01 },
{ GC2235_8BIT, 0x23, 0x05 },
{ GC2235_8BIT, 0x24, 0x10 },
{ GC2235_8BIT, 0x25, 0x10 },
{ GC2235_8BIT, 0x26, 0x02 },
{ GC2235_8BIT, 0x21, 0x10 },
{ GC2235_8BIT, 0x29, 0x01 },
{ GC2235_8BIT, 0x2a, 0x02 },
{ GC2235_8BIT, 0x2b, 0x02 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_reg const gc2235_960_640_30fps[] = {
{ GC2235_8BIT, 0x8b, 0xa0 },
{ GC2235_8BIT, 0x8c, 0x02 },
{ GC2235_8BIT, 0x07, 0x02 }, /* VBI */
{ GC2235_8BIT, 0x08, 0xA4 },
{ GC2235_8BIT, 0x09, 0x01 }, /* row start */
{ GC2235_8BIT, 0x0a, 0x18 },
{ GC2235_8BIT, 0x0b, 0x01 }, /* col start */
{ GC2235_8BIT, 0x0c, 0x40 },
{ GC2235_8BIT, 0x0d, 0x02 }, /* win height 656 */
{ GC2235_8BIT, 0x0e, 0x90 },
{ GC2235_8BIT, 0x0f, 0x03 }, /* win width: 976 */
{ GC2235_8BIT, 0x10, 0xd0 },
{ GC2235_8BIT, 0x90, 0x01 },
{ GC2235_8BIT, 0x92, 0x02 },
{ GC2235_8BIT, 0x94, 0x06 },
{ GC2235_8BIT, 0x95, 0x02 }, /* crop win height 640 */
{ GC2235_8BIT, 0x96, 0x80 },
{ GC2235_8BIT, 0x97, 0x03 }, /* crop win width 960 */
{ GC2235_8BIT, 0x98, 0xc0 },
/* mimp init */
{ GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */
{ GC2235_8BIT, 0x01, 0x07 },
{ GC2235_8BIT, 0x02, 0x11 },
{ GC2235_8BIT, 0x03, 0x11 },
{ GC2235_8BIT, 0x06, 0x80 },
{ GC2235_8BIT, 0x11, 0x2b },
/* set mipi buffer */
{ GC2235_8BIT, 0x12, 0xb0 }, /* val_low = (width * 10 / 8) & 0xFF */
{ GC2235_8BIT, 0x13, 0x04 }, /* val_high = (width * 10 / 8) >> 8 */
{ GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/
{ GC2235_8BIT, 0x04, 0x10 },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x17, 0x01 },
{ GC2235_8BIT, 0x22, 0x01 },
{ GC2235_8BIT, 0x23, 0x05 },
{ GC2235_8BIT, 0x24, 0x10 },
{ GC2235_8BIT, 0x25, 0x10 },
{ GC2235_8BIT, 0x26, 0x02 },
{ GC2235_8BIT, 0x21, 0x10 },
{ GC2235_8BIT, 0x29, 0x01 },
{ GC2235_8BIT, 0x2a, 0x02 },
{ GC2235_8BIT, 0x2b, 0x02 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
#endif
static struct gc2235_reg const gc2235_1600_900_30fps[] = {
{ GC2235_8BIT, 0x8b, 0xa0 },
{ GC2235_8BIT, 0x8c, 0x02 },
{ GC2235_8BIT, 0x0d, 0x03 }, /* win height 932 */
{ GC2235_8BIT, 0x0e, 0xa4 },
{ GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1632 */
{ GC2235_8BIT, 0x10, 0x50 },
{ GC2235_8BIT, 0x90, 0x01 },
{ GC2235_8BIT, 0x92, 0x02 },
{ GC2235_8BIT, 0x94, 0x06 },
{ GC2235_8BIT, 0x95, 0x03 }, /* crop win height 900 */
{ GC2235_8BIT, 0x96, 0x84 },
{ GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1600 */
{ GC2235_8BIT, 0x98, 0x40 },
/* mimi init */
{ GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */
{ GC2235_8BIT, 0x01, 0x07 },
{ GC2235_8BIT, 0x02, 0x11 },
{ GC2235_8BIT, 0x03, 0x11 },
{ GC2235_8BIT, 0x06, 0x80 },
{ GC2235_8BIT, 0x11, 0x2b },
/* set mipi buffer */
{ GC2235_8BIT, 0x12, 0xd0 }, /* val_low = (width * 10 / 8) & 0xFF */
{ GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */
{ GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/
{ GC2235_8BIT, 0x04, 0x10 },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x17, 0x01 },
{ GC2235_8BIT, 0x22, 0x01 },
{ GC2235_8BIT, 0x23, 0x05 },
{ GC2235_8BIT, 0x24, 0x10 },
{ GC2235_8BIT, 0x25, 0x10 },
{ GC2235_8BIT, 0x26, 0x02 },
{ GC2235_8BIT, 0x21, 0x10 },
{ GC2235_8BIT, 0x29, 0x01 },
{ GC2235_8BIT, 0x2a, 0x02 },
{ GC2235_8BIT, 0x2b, 0x02 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_reg const gc2235_1616_1082_30fps[] = {
{ GC2235_8BIT, 0x8b, 0xa0 },
{ GC2235_8BIT, 0x8c, 0x02 },
{ GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */
{ GC2235_8BIT, 0x0e, 0xd0 },
{ GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */
{ GC2235_8BIT, 0x10, 0x50 },
{ GC2235_8BIT, 0x90, 0x01 },
{ GC2235_8BIT, 0x92, 0x4a },
{ GC2235_8BIT, 0x94, 0x00 },
{ GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1082 */
{ GC2235_8BIT, 0x96, 0x3a },
{ GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */
{ GC2235_8BIT, 0x98, 0x50 },
/* mimp init */
{ GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */
{ GC2235_8BIT, 0x01, 0x07 },
{ GC2235_8BIT, 0x02, 0x11 },
{ GC2235_8BIT, 0x03, 0x11 },
{ GC2235_8BIT, 0x06, 0x80 },
{ GC2235_8BIT, 0x11, 0x2b },
/* set mipi buffer */
{ GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */
{ GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */
{ GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/
{ GC2235_8BIT, 0x04, 0x10 },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x17, 0x01 },
{ GC2235_8BIT, 0x22, 0x01 },
{ GC2235_8BIT, 0x23, 0x05 },
{ GC2235_8BIT, 0x24, 0x10 },
{ GC2235_8BIT, 0x25, 0x10 },
{ GC2235_8BIT, 0x26, 0x02 },
{ GC2235_8BIT, 0x21, 0x10 },
{ GC2235_8BIT, 0x29, 0x01 },
{ GC2235_8BIT, 0x2a, 0x02 },
{ GC2235_8BIT, 0x2b, 0x02 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_reg const gc2235_1616_1216_30fps[] = {
{ GC2235_8BIT, 0x8b, 0xa0 },
{ GC2235_8BIT, 0x8c, 0x02 },
{ GC2235_8BIT, 0x0d, 0x04 }, /* win height 1232 */
{ GC2235_8BIT, 0x0e, 0xd0 },
{ GC2235_8BIT, 0x0f, 0x06 }, /* win width: 1616 */
{ GC2235_8BIT, 0x10, 0x50 },
{ GC2235_8BIT, 0x90, 0x01 },
{ GC2235_8BIT, 0x92, 0x02 },
{ GC2235_8BIT, 0x94, 0x00 },
{ GC2235_8BIT, 0x95, 0x04 }, /* crop win height 1216 */
{ GC2235_8BIT, 0x96, 0xc0 },
{ GC2235_8BIT, 0x97, 0x06 }, /* crop win width 1616 */
{ GC2235_8BIT, 0x98, 0x50 },
/* mimi init */
{ GC2235_8BIT, 0xfe, 0x03 }, /* switch to P3 */
{ GC2235_8BIT, 0x01, 0x07 },
{ GC2235_8BIT, 0x02, 0x11 },
{ GC2235_8BIT, 0x03, 0x11 },
{ GC2235_8BIT, 0x06, 0x80 },
{ GC2235_8BIT, 0x11, 0x2b },
/* set mipi buffer */
{ GC2235_8BIT, 0x12, 0xe4 }, /* val_low = (width * 10 / 8) & 0xFF */
{ GC2235_8BIT, 0x13, 0x07 }, /* val_high = (width * 10 / 8) >> 8 */
{ GC2235_8BIT, 0x15, 0x12 }, /* DPHY mode*/
{ GC2235_8BIT, 0x04, 0x10 },
{ GC2235_8BIT, 0x05, 0x00 },
{ GC2235_8BIT, 0x17, 0x01 },
{ GC2235_8BIT, 0x22, 0x01 },
{ GC2235_8BIT, 0x23, 0x05 },
{ GC2235_8BIT, 0x24, 0x10 },
{ GC2235_8BIT, 0x25, 0x10 },
{ GC2235_8BIT, 0x26, 0x02 },
{ GC2235_8BIT, 0x21, 0x10 },
{ GC2235_8BIT, 0x29, 0x01 },
{ GC2235_8BIT, 0x2a, 0x02 },
{ GC2235_8BIT, 0x2b, 0x02 },
{ GC2235_8BIT, 0x10, 0x01 }, /* disable mipi */
{ GC2235_8BIT, 0xfe, 0x00 }, /* switch to P0 */
{ GC2235_TOK_TERM, 0, 0 }
};
static struct gc2235_resolution gc2235_res_preview[] = {
{
.desc = "gc2235_1600_900_30fps",
.width = 1600,
.height = 900,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1068,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1600_900_30fps,
},
{
.desc = "gc2235_1600_1066_30fps",
.width = 1616,
.height = 1082,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1368,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1616_1082_30fps,
},
{
.desc = "gc2235_1600_1200_30fps",
.width = 1616,
.height = 1216,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1368,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1616_1216_30fps,
},
};
#define N_RES_PREVIEW (ARRAY_SIZE(gc2235_res_preview))
/*
* Disable non-preview configurations until the configuration selection is
* improved.
*/
#if ENABLE_NON_PREVIEW
static struct gc2235_resolution gc2235_res_still[] = {
{
.desc = "gc2235_1600_900_30fps",
.width = 1600,
.height = 900,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1068,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1600_900_30fps,
},
{
.desc = "gc2235_1600_1066_30fps",
.width = 1616,
.height = 1082,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1368,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1616_1082_30fps,
},
{
.desc = "gc2235_1600_1200_30fps",
.width = 1616,
.height = 1216,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 2132,
.lines_per_frame = 1368,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1616_1216_30fps,
},
};
#define N_RES_STILL (ARRAY_SIZE(gc2235_res_still))
static struct gc2235_resolution gc2235_res_video[] = {
{
.desc = "gc2235_1296_736_30fps",
.width = 1296,
.height = 736,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 1828,
.lines_per_frame = 888,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_1296_736_30fps,
},
{
.desc = "gc2235_960_640_30fps",
.width = 960,
.height = 640,
.pix_clk_freq = 30,
.fps = 30,
.used = 0,
.pixels_per_line = 1492,
.lines_per_frame = 792,
.bin_factor_x = 0,
.bin_factor_y = 0,
.bin_mode = 0,
.skip_frames = 3,
.regs = gc2235_960_640_30fps,
},
};
#define N_RES_VIDEO (ARRAY_SIZE(gc2235_res_video))
#endif
static struct gc2235_resolution *gc2235_res = gc2235_res_preview;
static unsigned long N_RES = N_RES_PREVIEW;
#endif
此差异已折叠。
此差异已折叠。
此差异已折叠。
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_VIDEO_ATOMISP_OV5693) += atomisp-ov5693.o
此差异已折叠。
#
# Makefile for ISP driver
#
obj-$(CONFIG_VIDEO_ATOMISP) += atomisp2/
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